JP3799254B2 - Electric apparatus, computer apparatus, charging method in electric apparatus, and program - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an electric device having a chargeable / dischargeable battery such as a notebook PC (notebook personal computer), and more particularly to an electric device that allows a user to control a charging time.
[0002]
[Prior art]
In various types of electrical devices such as notebook PCs, PDAs, information terminals represented by mobile phones, MD (Mini Disc) devices, video cameras, etc., in addition to those that can be equipped with storage batteries (batteries, batteries), there are chargers and batteries in the main body. Some of them have a built-in battery pack. These storage batteries can be charged by a charger, and the electric device can be operated using the voltage of the charged storage battery.
[0003]
For example, in a notebook PC, an AC adapter is provided as a power supply device that is connected to a commercial power supply of AC 100V and performs AC / DC conversion. Conventionally, from the power capacity (Pmax) of the AC adapter, the system power consumption The remaining power (Pmax−Psys) minus (Psys) is used to charge the battery. That is, if the power capacity (Psys) of the AC adapter does not change and the power consumption (Psys) of the system increases, the power allocated to charging the battery tends to decrease.
[0004]
[Problems to be solved by the invention]
On the other hand, power consumption in notebook PCs, for example, tends to increase further in the future, but the capacity and size of the AC adapter cannot be increased unnecessarily. As described above, the higher the power consumption of the system, the smaller the power allocated to charging the battery, resulting in longer battery charging time. If this charging time becomes long, it is not preferable especially for a user who wants to finish charging in a short time.
[0005]
The present invention has been made in order to solve the technical problems as described above, and the object of the present invention is to charge time as necessary in an electric device using a battery for charging and discharging. It is to shorten.
Another object is to allow the user to control the charging time of the battery while the user is operating the electrical device.
[0006]
[Means for Solving the Problems]
For this purpose, the present invention provides an interface through which the user can select the charging time. Furthermore, when the charging time is predicted and the estimated time is longer than the charging time set by the user, the power management function is activated to lower the power consumption of the system, and the charging time is shortened by increasing the charging power. It is characterized by meeting the requirements of
[0007]
That is, the electric device to which the present invention is applied is a battery that discharges after charging and supplies power to the main body, and a power supply that supplies charging power to the battery and supplies power to the main body. And power management means for reducing the power consumption of the main body in order to increase the charging power to the battery when power is supplied to the battery and the main body by the power supply means.
[0008]
Here, the charging time prediction means for predicting the charging time of the battery, and the user request grasping means for grasping the user's request for the charging time, the power management means, the charging time predicted by the charging time prediction means The level of performance degradation for the main body may be controlled based on the above. Further, the power management means operates the power management function based on the charging time predicted by the charging time prediction means to reduce the power consumption of the main body, and then the predicted charging time is determined by the user request grasping means. It is characterized by determining whether or not there is a margin for the grasped required charging time, and when there is a margin, controlling the power consumption reduction level for the main body so as to loosen the power management function. it can.
[0010]
From another point of view, the computer device to which the present invention is applied is a battery that discharges after charging and supplies power to the system body, and supplies charging power to the battery from an external commercial power source. A power supply device that supplies power to the system main body, an interface that allows the user to specify the required charging time for the battery, and the battery from the power supply device based on the required charging time specified by the user via this interface And a controller for controlling the charging power level.
[0011]
Here, the controller grasps the estimated charging time required for charging the battery, and operates the power management function for the system body based on the grasped estimated charging time and the requested charging time specified by the user. When the estimated charging time has a margin with respect to the required charging time after the power consumption is reduced, the charging power level to the battery is controlled so as to loosen the power management function. This estimated charging time can be grasped by information output from the intelligent battery if it is an intelligent battery equipped with a CPU inside, and in the case of a so-called dam battery not equipped with a CPU inside, current measurement provided elsewhere It can be grasped by the controller itself from the charging current value that can be detected from the circuit. Further, the control of the charging power level to the battery can be controlled by, for example, an instruction of a utility program executed by a CPU provided in the system main body, in addition to the case where the controller itself controls all.
[0014]
On the other hand, the charging method in the electric device to which the present invention is applied recognizes the required charging time which is the charging time to be executed by the designation from the user, grasps the remaining charging time of the battery, and grasps the remaining charging time. It is characterized in that it is determined whether or not it conforms to the recognized required charging time, and when it is determined that it does not conform, the power management function is operated to reduce the power consumption in the electrical equipment. Then, after operating the power management function to reduce power consumption, determine whether the remaining charging time has a margin for the required charging time, and if there is a margin, charge the battery with the power management function relaxed It is characterized by.
[0016]
Furthermore, the present invention can be grasped as a program for causing a computer device to realize these functions. These programs may be stored in a storage medium such as a CD-ROM and read by a computer device configured to be able to read the storage medium such as a CD-ROM drive. Further, for example, a form that is downloaded to a computer device via a network such as the Internet is conceivable. In the form of downloading the program, it is sufficient if the transmission device for transmitting the program includes storage means for storing the program and transmission means for transmitting the program read from the storage means.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in detail based on embodiments shown in the accompanying drawings.
FIG. 1 is a diagram showing a hardware configuration of a computer system 10 to which this exemplary embodiment is applied. The computer apparatus including the computer system 10 is configured as a notebook PC (notebook type personal computer) equipped with a predetermined OS (operating system) in accordance with, for example, the OADG (Open Architecture Developer's Group) specification. .
[0018]
In the computer system 10 shown in FIG. 1, the CPU 11 functions as the brain of the entire computer system 10 and executes various programs under the control of the OS. The CPU 11 includes an FSB (Front Side Bus) 12 as a system bus, a PCI (Peripheral Component Interconnect) bus 20 as a high-speed I / O device bus, and an ISA (Industry Standard Architecture) as a low-speed I / O device bus. Each component is interconnected via a three-stage bus called a bus 40. The CPU 11 stores the program code and data in the cache memory to increase the processing speed. In recent years, SRAM of about 128 Kbytes is integrated as a primary cache in the CPU 11. In order to compensate for the shortage of capacity, 512 K to 2 Mbytes are provided via a BSB (Back Side Bus) 13 which is a dedicated bus. About the secondary cache 14 is placed. Note that it is possible to reduce the cost by omitting the BSB 13 and connecting the secondary cache 14 to the FSB 12 to avoid a package having a large number of terminals.
[0019]
The FSB 12 and the PCI bus 20 are connected by a CPU bridge (host-PCI bridge) 15 called a memory / PCI chip. The CPU bridge 15 includes a memory controller function for controlling an access operation to the main memory 16 and a data buffer for absorbing a difference in data transfer speed between the FSB 12 and the PCI bus 20. It has become. The main memory 16 is a writable memory used as an execution program reading area of the CPU 11 or a work area for writing processing data of the execution program. For example, it is composed of a plurality of DRAM chips, for example, 64 MB is standard equipment and can be expanded to 320 MB. This execution program includes various drivers for operating the OS and peripheral devices in hardware, application programs for specific tasks, and a BIOS (Basic Input / Output System: Basic Input / Output System) stored in a flash ROM 44 described later. ) Etc. are included.
[0020]
The video subsystem 17 is a subsystem for realizing functions related to video, and includes a video controller. The video controller processes a drawing command from the CPU 11, writes the processed drawing information into the video memory, reads out the drawing information from the video memory, and outputs the drawing information to the liquid crystal display (LCD) 18 as drawing data.
[0021]
The PCI bus 20 is a bus capable of relatively high-speed data transfer, and has a data bus width of 32 or 64 bits, a maximum operating frequency of 33 MHz or 66 MHz, and a maximum data transfer rate of 132 MB / second or 528 MB / second. It is standardized by the specification. An I / O bridge 21, a card bus controller 22, an audio subsystem 25, a docking station interface (Dock I / F) 26, and a mini PCI connector 27 are connected to the PCI bus 20.
[0022]
The card bus controller 22 is a dedicated controller for directly connecting the bus signal of the PCI bus 20 to the interface connector (card bus) of the card bus slot 23. The card bus slot 23 can be loaded with a PC card 24. Is possible. The docking station interface 26 is hardware for connecting a docking station (not shown) that is a function expansion device of the computer system 10. When the notebook PC is set in the docking station, various hardware elements connected to the internal bus of the docking station are connected to the PCI bus 20 via the docking station interface 26. The mini PCI connector 27 is connected to a mini PCI (miniPCI) card 28.
[0023]
The I / O bridge 21 has a bridge function between the PCI bus 20 and the ISA bus 40. DMA controller function, programmable interrupt controller (PIC) function, programmable interval timer (PIT) function, IDE (Integrated Device Electronics) interface function, USB (Universal Serial Bus) function, SMB (System Management Bus) interface function A real-time clock (RTC) is built in.
[0024]
The DMA controller function is a function for executing data transfer between a peripheral device such as FDD and the main memory 16 without intervention of the CPU 11. The PIC function is a function for executing a predetermined program (interrupt handler) in response to an interrupt request (IRQ) from a peripheral device. The PIT function is a function for generating a timer signal at a predetermined cycle. As an interface realized by the IDE interface function, an IDE hard disk drive (HDD) 31 is connected and a CD-ROM drive 32 is connected by ATAPI (AT Attachment Packet Interface). Instead of the CD-ROM drive 32, another type of IDE device such as a DVD (Digital Versatile Disc) drive may be connected. The external storage device such as the HDD 31 or the CD-ROM drive 32 is stored in a storage place called “media bay” or “device bay” in the notebook PC main body, for example. These external storage devices equipped as standard may be exchangeable and exclusively attached to other devices such as an FDD or a battery pack.
[0025]
Further, the I / O bridge 21 is provided with a USB port, and this USB port is connected to, for example, a USB connector 30 provided on the wall surface of the notebook PC main body. Furthermore, an EEPROM 33 is connected to the I / O bridge 21 via an SM bus. The EEPROM 33 is a memory for holding information such as a password registered by the user, a supervisor password, and a product serial number, and is nonvolatile and can electrically rewrite the stored contents.
[0026]
Furthermore, the I / O bridge 21 is connected to the power supply circuit 50. For example, the power supply circuit 50 is connected to a commercial power supply of AC 100V and performs AC / DC conversion, an intelligent battery 52 as a battery (secondary battery, battery), the intelligent battery 52 is charged and the AC adapter 51 A battery switching circuit 54 for switching a power supply path from the intelligent battery 52, a DC / DC converter (DC / DC) 55 for generating a DC constant voltage such as + 15V, + 5V, + 3.3V and the like used in the computer system 10. It has a circuit.
[0027]
The intelligent battery 52 may be provided inside the casing of the main system as well as a battery pack that can be freely removed from the main system. The intelligent battery 52 may be replaced with a dumb battery that does not include a CPU. Further, the AC adapter 51 that is one of the power supply apparatuses is generally provided outside the casing of the main system, but may be provided inside the casing of the main system. As the main body system, for example, a configuration in which an AC inlet or a DC inlet into which a cable connector can be inserted and removed is provided. For example, when the AC adapter 51 is outside, the AC inlet and the DC inlet are configured so that a connector coming out of a cable connected to the AC adapter 51 can be inserted and removed. For example, when the AC adapter 51 is inside the main system. Is configured so that a connector directly connected from a commercial power source can be inserted and removed.
[0028]
On the other hand, inside the core chip constituting the I / O bridge 21 is an internal register for managing the power state of the computer system 10 and a logic for managing the power state of the computer system 10 including the operation of the internal register ( State machine) is provided. This logic transmits / receives various signals to / from the power supply circuit 50, and recognizes an actual power supply state from the power supply circuit 50 to the computer system 10 by transmitting / receiving these signals. The power supply circuit 50 controls power supply to the computer system 10 in accordance with an instruction from this logic.
[0029]
The ISA bus 40 is a bus having a lower data transfer rate than the PCI bus 20 (for example, a bus width of 16 bits and a maximum data transfer rate of 4 MB / second). Connected to the ISA bus 40 are an embedded controller 41, a CMOS 43, a flash ROM 44, and a super I / O controller 45 connected to the gate array logic 42. It is also used to connect peripheral devices that operate at a relatively low speed such as a keyboard / mouse controller. The Super I / O controller 45 is connected to an I / O port 46, which drives FDD, inputs / outputs parallel data via the parallel port (PIO), and inputs / outputs serial data via the serial port (SIO). ) Is controlled.
[0030]
The embedded controller 41 controls a keyboard (not shown) and is connected to the power supply circuit 50, and performs a part of the power management function together with the gate array logic 42 by a built-in power management controller (PMC). I'm in charge.
[0031]
FIG. 2 is a diagram showing a configuration of a power supply system to which the present embodiment is applied. In this power supply system, a current detector 62 that detects a current value from an AC adapter 51 that is a power supply device, a charger 61 that supplies a charging voltage to the intelligent battery 52, an output of an inverter 66 of the CPU 11 and the LCD 18, etc. A voltage regulator 63 that regulates the voltage to be applied is provided. In addition, a basic input / output / operating system (BIOS / OS) 64 that passes power control information from the utility program of the CPU 11 to the embedded controller via the gate array logic 42, and an operating frequency of the CPU 11 based on mode control from the embedded controller 41. CPU operating mode control logic 65 for controlling the above and an inverter circuit 66 for driving the lamp 67 of the LCD 18 based on the luminance control of the embedded controller 41.
[0032]
The intelligent battery 52 used here is equipped with a CPU (not shown) in itself and can manage the state of the battery (remaining battery level, charge / discharge state), for example, SBS (Smart Battery System), which is a standard specification. Is compliant. The intelligent battery 52 in the present embodiment calculates the remaining charging time in the battery pack and outputs the calculated value to the embedded controller 41.
[0033]
Instead of the intelligent battery 52, a simple battery (dam battery) without a CPU can be used. In such a case, a charging current detection mechanism for measuring a current value is provided between the charger 61 and the battery, and the charging current value of the battery detected by the charging current detection mechanism is input to the embedded controller 41. Thus, the input current value may be integrated to hold the battery capacity value.
[0034]
The remaining charge time calculated by the SBS-compliant intelligent battery 52 is sent to the embedded controller 41 as AverageTimeToFull (command 0x13) together with information about a series of batteries. The utility program of the CPU 11 can receive this information via the gate array logic 42 and the BIOS / OS 64. The utility program issues a power control instruction to the embedded controller 41 via the BIOS / OS 64 and the gate array logic 42.
[0035]
The embedded controller 41 has a power management control function as well as ON / OFF control of the charger 61. As this power management function, the embedded controller 41 instructs the CPU operating mode control logic 65 to operate the CPU 11 (control of the operating speed). The CPU operating mode control logic 65 controls the operating frequency of the CPU 11 and the voltage, for example. The supply voltage to the regulator 63 is controlled. Further, the embedded controller 41 gives an instruction to the inverter circuit 66 in order to adjust the luminance level of the lamp 67 in the LCD 18.
[0036]
Next, charging speed adjustment processing in the present embodiment will be described.
FIG. 3 is a flowchart showing the charging speed adjustment process. In the charging speed adjustment process in the present embodiment, first, it is determined whether or not the power is currently on (step 101). If the power is not on, the system waits until the power is turned on. If the power is on, the user sets the charging mode using the utility program of the CPU 11 (step 102). Here, for example, there are some notebook PCs that do not charge unless a certain state (for example, the battery capacity is 95% or less) from the viewpoint of battery protection. Therefore, for example, whether Charging Current (command 0 × 14) indicates whether or not the battery is in a state of being charged, for example, whether the capacity of the battery detected by the intelligent battery 52 is 95% or less. It is sent to the embedded controller 41 (step 103). If it is not in a charging state, it waits until it is in a charging state. If it is in a charging state, the charger 61 is turned on to start charging (step 104).
[0037]
Next, the remaining charging time is calculated by the intelligent battery 52 (step 105). The embedded controller 41 determines whether or not the remaining charging time is suitable for the charging mode requested by the user (step 106). If it is determined that they are not compatible, the embedded controller 41 operates the power management function to reduce power consumption, and performs charging with increased charging capability (step 107). When the remaining charging time is suitable for the charging mode requested by the user, adjustment is performed according to the user's request. That is, it is determined whether or not there is a margin (step 108). If there is a margin, the power management function is relaxed (step 109), and the routine proceeds to step 110. If there is no room, the power management function is left as it is and the process proceeds to step 110.
[0038]
Next, the embedded controller 41 determines whether or not charging is complete (step 110). If charging is not complete, the process returns to step 105 and continues. If charging is complete, the power management function is returned to the state before charging (step 111), and the process ends.
[0039]
FIG. 4 is a diagram showing an example of a setting screen when the charging mode setting by the user shown in step 102 is performed. Such a setting screen is displayed on the LCD 18 by a utility program executed by the CPU 11. Here, the charging mode is set to “charge in the shortest time”, “charge within 2 hours”, “charge within 3 hours”, “charge within 4 hours”, “same as current setting” “Charge” is shown as a menu and is configured to be selectable by the user. In addition to these items, it is also possible to prepare a menu such as “charging while maximizing system performance (longest time)”. In the setting of the operation state, “Yes / No” can be selected for each item of “Permit CPU speed reduction” and “Allow LCD lower brightness”. In addition, if there is any appropriate power management function, it is only necessary to ask the user whether or not to allow these functions. The example shown in FIG. 4 shows a state in which “charging within 3 hours” is set as the charging mode, and “permission for slowing down the CPU” and “permitting lowering the brightness of the LCD” are set as the operation states. Has been.
[0040]
Next, it is assumed that the user has made settings as shown in FIG. 4 on the setting screen, and specific processing will be described with reference to FIG.
The utility program of the CPU 11 grasps the current remaining charging time in the intelligent battery 52 via the embedded controller 41, the gate array logic 42, and the BIOS / OS 64. The utility program compares the recognized remaining charging time with the time specified by the user. If the charging time is longer than expected by the user, the utility program passes through the BIOS / OS 64 and the gate array logic 42 to embed. The controller 41 is instructed to power down (power control).
[0041]
Based on this instruction, the embedded controller 41 instructs the CPU operating mode control logic 65 to operate the CPU 11 in the low power mode (low power mode) (mode control). Low power mode instructions can be used to slow down the CPU 11 operating speed, including Intel's SpeedStep technology (lowering the processor's operating frequency and operating voltage) and throttling technology (turning the processor on and off periodically). To reduce the operating frequency in a pseudo manner). When the CPU operating mode control logic 65 receives an instruction of Low Power Mode, for example, the CPU 11 controls the CPU 11 so as to reduce the operating frequency, and further controls the voltage regulator 63 so as to lower the voltage supplied to the CPU 11. To do. As a result, the CPU 11 operates in the low power mode. In the low power mode, for example, the clock of the CPU 11 is lowered to 750 MHz with respect to the normal 850 MHz, and the voltage of the CPU 11 is lowered to 1.35 V with respect to the normal 1.6 V.
[0042]
After the CPU 11 starts operating in the low power mode, the utility program receives remaining charge time data calculated inside the battery (intelligent battery 52) again. At this time, if the battery is charged within 3 hours, charging is continued in this state. When the charging time is longer than 3 hours, the utility program instructs the embedded controller 41 to further reduce power via the BIOS / OS 64 and the gate array logic 42.
[0043]
Next, the embedded controller 41 instructs the inverter circuit 66 to lower the luminance level of the lamp 67 in the LCD 18 by one level (luminance control). The utility program receives the remaining charging time data and instructs the embedded controller 41 to lower the luminance until the charging time set by the user is satisfied. When the utility program can be set in a state that satisfies the user's request, the utility program continues charging in that state. When the charging is completed, the embedded controller 41 returns the operation mode (operation speed) of the CPU 11 and the brightness of the LCD 18 to the original settings in accordance with an instruction of the utility program or its own determination.
[0044]
In the above description, the example in which the embedded controller 41 is operated by power control from the utility program of the CPU 11 has been described as an example. However, the embedded controller 41 receives information on the time expected by the user and determines the embedded controller 41 for the determination. It is also possible to configure to execute power control.
[0045]
FIGS. 5A to 5C are diagrams showing charging characteristics. FIG. 5A shows the charging characteristics during normal operation, FIG. 5B shows the charging characteristics when the CPU 11 is in the low power mode, and FIG. 5C shows the CPU 11 in the low power mode, LCD 18. The charging characteristics when the luminance of the lamp 67 is minimized are shown. The horizontal axis represents the charging time (min), the vertical axis represents the charging current value (mA) and the battery capacity (%), and the battery capacity change state and the charging current change state are shown. In the actual measurement data in the normal state shown in FIG. 5A, charging takes about 240 minutes (4 hours). On the other hand, in the measured data when the CPU 11 shown in FIG. 5B is in the low power mode, the charging is shortened to about 170 minutes (2 hours 50 minutes), and the CPU 11 shown in FIG. In the actual measurement data when the brightness of the lamp 67 in the LCD 18 is minimized, the charging is further shortened to about 161 minutes (2 hours 41 minutes). Thus, the charging time can be significantly shortened by performing power control.
[0046]
Next, a method for calculating the predicted charging time in the present embodiment will be described. The calculation of the predicted charging time is performed inside the intelligent battery 52 in the case of an intelligent type having a CPU therein. When taking a system configuration using a dumb battery that does not have a CPU in the battery, the embedded controller 41 executes the system configuration based on, for example, a measured charging current value.
[0047]
FIG. 6 is a diagram showing charging characteristics in a lithium ion battery. Here, the horizontal axis represents the charge capacity (mWh), and the vertical axis represents the charge current value (mA) and the voltage value (V), and the voltage change and the charge current change with respect to the charge capacity are shown. The charging characteristics of lithium-ion batteries have shifted from the constant current mode where the charging current value is constant to the constant voltage mode where the charging current is greatly reduced while the voltage value is almost constant. To do. The charge capacity when shifting from the constant current mode to the constant voltage mode is Cth. If the current capacity of the battery is Cnow, the remaining charging time T [min] can be obtained as follows.
(A) When Cnow <Cth, T [min] = (Cth [mWh] −Cnow [mWh]) × 60 / (charging current [mA] × voltage [V]) + Ttable [min]
(B) When Cnow ≧ Cth, T [min] = Ttable [min]
Here, Ttable is a table showing the relationship between the capacity and the charging time in the constant voltage mode.
[0048]
FIG. 7 is a diagram showing an example of a table showing the relationship between the battery capacity and the charging time in the constant voltage mode. For example, when the battery capacity is less than 80%, the value calculated by the above formula (A) is used as the constant current mode. For example, when the battery capacity is 80% or more, the remaining capacity from the battery capacity (%) shown in FIG. What is necessary is just to read charge time (min). When power management is activated, the value of “charging current [mA] × voltage [V]” indicating the charging power in the above formula (A) increases, and the remaining charging time T [min] Get smaller.
[0049]
As described above, according to the present embodiment, when the capacity (output power) of the AC adapter 51 does not change and the power of the system increases, the power management function of the system prevents the problem that the charging time of the battery becomes long. By combining with, the user can select the optimum charging time.
[0050]
In this embodiment, an interface (utility program) is provided that allows the user to select the charging time. As a result, the user can select the charging time, which has not been dealt with conventionally. Furthermore, when the charging time is predicted by the system body (embedded controller 41) or the intelligent battery 52, and the estimated time is longer than the charging time set by the user, the power management function is activated to reduce the power consumption of the system body. By increasing the charging power, it is possible to shorten the charging time and satisfy the user's request.
[0051]
As the power management function, in the above description, the CPU 11 is set to the low power mode and the brightness of the lamp 67 of the LCD 18 is reduced. When the CPU 11 is set in the low power mode, as described above, the clock of the CPU 11 is usually 750 MHz with respect to 850 MHz, and the voltage of the CPU 11 is usually about 1.35 V with respect to 1.6 V. It is possible to ensure the same level of performance as when the notebook computer 51 is removed and the notebook PC is driven by a battery.
[0052]
In addition to the above example, the power management function can be adopted as appropriate. For example, disable communication functions that are not being used, stop power supply to USB-compatible devices, reduce the performance of video chips and video controllers, etc., depending on the system performance and functions. Is possible. In addition, such a function that prioritizes rapid charging is not limited to a computer device such as a notebook PC, and can also be applied to other electrical devices.
[0053]
【The invention's effect】
As described above, according to the present invention, in an electrical device using a battery that performs charging and discharging, the charging time can be shortened as necessary.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a hardware configuration of a computer system to which the exemplary embodiment is applied.
FIG. 2 is a diagram illustrating a configuration of a power supply system to which the exemplary embodiment is applied.
FIG. 3 is a flowchart showing a charging speed adjustment process.
FIG. 4 is a diagram showing an example of a setting screen when the charging mode is set by the user shown in step 102.
5A to 5C are diagrams showing charging characteristics. FIG.
FIG. 6 is a diagram showing charging characteristics in a lithium ion battery.
FIG. 7 is a diagram showing an example of a table showing a relationship between battery capacity and charging time in a constant voltage mode.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Computer system, 11 ... CPU, 18 ... Liquid crystal display (LCD), 41 ... Embedded controller, 42 ... Gate array logic, 50 ... Power supply circuit, 51 ... AC adapter, 52 ... Intelligent battery, 61 ... Charger, 62 ... Current detector, 63 ... Voltage regulator, 64 ... Basic input / output / operating system (BIOS / OS), 65 ... CPU operating mode control logic, 66 ... Inverter circuit, 67 ... Lamp

Claims (9)

A battery that discharges after charging and supplies power to the main body;
Power supply means for supplying charging power to the battery and supplying power to the main body;
When supplying power to the battery and the main body by the power supply means, power management means for operating the power management function to increase the charging power to the battery and reducing the power consumption of the main body,
Charging time predicting means for predicting the charging time of the battery ;
A user request grasping means for grasping a request for a charging time of a user who uses an electric device ,
The power management means operates the power management function based on the charging time predicted by the charging time prediction means to reduce the power consumption of the main body, and then the predicted charging time is the user request grasping means. It is determined whether or not there is a margin with respect to the required charging time grasped by the control, and when there is a margin, the power consumption function for the main body is controlled so as to loosen the power management function. machine. 2. The electric apparatus according to claim 1 , wherein the power supply means is any one of an AC adapter, a DC inlet, an AC inlet, and a power supply device. A battery that discharges after charging and supplies power to the system body;
A power supply device that supplies charging power to the battery from an external commercial power source and supplies power to the system body;
An interface that allows the user to specify the required charging time for the battery;
A controller for controlling a charging power level from the power supply device to the battery based on the required charging time designated by a user via the interface;
The controller grasps an estimated charging time required for charging the battery , operates a power management function for the system main body based on the grasped estimated charging time and the required charging time specified by a user, and After the power consumption of the system main body is reduced, when the estimated charging time has a margin with respect to the required charging time , the charging power level to the battery is controlled so as to loosen the power management function. A computer device. When the controller supplies power to the battery and the system main body from the power supply device, the controller slows down the operation speed of the CPU in the system main body in order to increase charging power to the battery. The computer apparatus according to claim 3 . When the controller supplies power to the battery and the system body from the power supply device, the controller reduces power consumption of the LCD panel in the system body in order to increase charging power to the battery. The computer apparatus according to claim 3 . The computer device according to claim 3 , wherein the interface provides screen information for selecting a charging time to the user and recognizes a user input to the screen information. Recognize the required charging time , which is the charging time to be executed by the user's specification,
Know the remaining battery charge time,
It is determined whether the remaining charge time that has been grasped meets the recognized the requested charge time,
When it is judged that it is not compatible, operate the power management function to reduce the power consumption in the electrical equipment,
After operating the power management function to reduce the power consumption of the main body, determine whether the remaining charging time has room for the required charging time ,
A charging method in an electric device, wherein charging is performed by loosening the power management function when there is a margin. 8. The charging method for an electric device according to claim 7 , wherein the power management function lowers the power consumption of the electric device when charging power for the battery and power consumption for the main body are simultaneously supplied. In a computer device that operates using the voltage of a charged battery,
A function of displaying a setting screen on which a user can input a required charging time for the battery;
A function for recognizing input from the user on the displayed setting screen;
A function of recognizing the expected charging time of the battery;
A function to instruct a power management function to operate based on the input from the user and the estimated charging time and to reduce power;
After operating the power management function to reduce the power consumption of the main body, it is determined whether or not the estimated charging time has a margin with respect to the required charging time. If there is a margin, the power management function is relaxed. Program to realize the function to instruct

Images