JP3799120B2 - High capacity memory module - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a high-capacity memory module, and more particularly to the structure of a memory module used in a personal computer or the like.
[0002]
[Prior art]
A conventional memory module is often a memory module having a structure in which a mainstream memory IC chip (16M DRAM) molded by plastic such as a dual in-line package or a flat package is soldered to one or both surfaces of a plurality of glass epoxy substrates. Are known.
However, memory modules used in personal computers and the like are required to have higher capacity and higher integration according to the needs of the times, and advanced high-density mounting technology is required for mounting the memory. As a method for realizing this high capacity and high integration, there is a method using a next-generation type memory IC chip (64M DRAM). By using such a next-generation type memory IC chip (64M DRAM), a high memory capacity can be obtained in the same space as in the case of using a conventional mainstream memory IC chip (16M DRAM).
Conventionally, as a method for realizing high capacity and high integration, by mounting in two stages using a tape carrier package (TCP) IC, an IC chip can be compared with a conventional plastic molded memory IC chip. The thickness is reduced and a small space can be realized.
[0003]
Further, conventionally, as a method for realizing high capacity and high integration, a COB memory module in which a bare chip is bonded to a substrate and wired with a bonding wire is well known. Such a technique is described in, for example, Japanese Patent Application No. 6-293059. By using such a COB memory module, a memory bare chip is mounted on the substrate, and the chip pad and the substrate are wire-bonded so that the size and thickness can be easily realized and the cost can be reduced. can do.
As described above, the conventional memory module has realized high capacity and high integration by high-density mounting technology according to the high capacity and high integration according to the needs of the times.
[0004]
[Problems to be solved by the invention]
However, the conventional memory module uses a plastic-molded mainstream memory IC chip (16M DRAM), and is a JEDEC standard (144 pin 8-byte SO DIMM) module (height 25.4 mm) with a memory of 32 MB. There was a problem that it was difficult to realize a module due to restrictions on the mounting area (volume).
In addition, the memory module can be miniaturized using a next-generation memory IC chip (64M DRAM), but there is a problem that the cost per bit of the memory IC is high and optimal cost performance cannot be expected until the generation is changed.
[0005]
In addition, when a memory module is realized using a next-generation memory IC chip, the number of memory IC suppliers is limited until the generation changes and the mainstream, and the product lineup of memory ICs is limited, so desired performance (access time, refresh rate) , Voltage specifications, etc.) are less flexible in module design.
In addition, when a memory module is realized by mounting a tape carrier package (TCP), there is a problem in that high heat dissipation characteristics cannot be obtained because the heat dissipation effect must be expected only by heat conduction from the lead portion.
The tape carrier package is protected to prevent electrical failure because the substrate is biased to a negative potential (back bias) by a negative power supply circuit built into each IC due to the electrical characteristics of the DRAM memory IC. There was a problem that it was necessary to insulate with a cover and the cost was high.
[0006]
Further, when a memory module is realized using a plastic molded memory IC, it is necessary to prepare a mounted memory IC and a module substrate corresponding to the module specification.
Further, when a COB memory module is realized using a conventional bare chip, bonding wires are wired by I / O pads formed around the bare chip, so that a space must be secured on the board in mounting. There was a problem that the number of bare chips that could be mounted on the top was also limited.
[0007]
The present invention solves such problems of the prior art, improves the memory module that can mount a plurality of high-capacity memory bare chips and can be highly integrated on the substrate, and can improve the production efficiency and reduce the cost. An object is to provide a capacity memory module.
[0008]
[Means for Solving the Problems]
In order to solve the above-described problems, the present invention provides a memory bear chip having a center pad that is provided with a pad at the center of both sides facing each other in the longitudinal direction of the memory bear chip and can be freely wired left and right, and has a via hole and is bonded to the memory bear chip. Provided with a glass epoxy substrate having an I / O terminal connected to at least two connection pads capable of connecting signals with wires, and provided with a plurality of recesses on the substrate and mounting a plurality of memory bear chips in the recesses, A bonding wire that connects the center pad of the memory bare chip and the connection pad on the glass-epoxy substrate, a sealing resin that seals the memory bear chip mounted on the glass-epoxy substrate, and both sides of the glass-epoxy substrate are attached to surround and seal the recess. It provided a dam frame to facilitate stacking of the sealing resin, the memory bare chips, the dam frame Sealing resin, along with front and back around the module thickness direction is symmetrical with glass epoxy substrate, surface or back surface that have a symmetrical structure.
[0009]
Here, the glass-epoxy substrate is provided with a middle layer wiring pattern and a surface layer pattern for connecting via hole signals in the substrate, and the middle layer wiring pattern and the surface layer pattern are signal-connected to the I / O terminals, and a high-speed access mode for the glass-epoxy substrate. Signal lines for refresh cycles etc. are patterned so that pull-up to power supply and pull-down to ground can be freely changed depending on the presence or absence of jumper lines, capacitors to lower power supply impedance, and EEPROM for module identification providing a door to the real Sosu so that.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Next, an embodiment of a high capacity memory module according to the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a perspective view illustrating a state in which an embodiment of a high-capacity memory module according to the present invention is partially cut away, and FIG. 2 is a cross-sectional view taken along line AA ′ of the memory module illustrated in FIG. FIG. 3 is a top view showing an example of bonding wire bonding of the memory module shown in FIG. 1. FIG. 4 is a block diagram of a module that realizes a 32 MB memory by the memory module shown in FIG.
[0011]
As shown in FIGS. 1 to 3, the high-capacity memory module according to the present invention has a memory bare chip 3 having a center pad 3a at the center and is bonded to a glass epoxy substrate 1 and mounted by COB technology. This is a memory module in which the bare chip 3 is hermetically sealed.
The memory bare chip 3 is a LOC chip in which a plurality of memory elements are formed on a rectangular plate-shaped main body, and a center pad 3a is provided at the center of both the left and right sides opposed to the longitudinal direction of the main body. The memory bare chip 3 has an I / O pad formed at the center so that the bonding wires 4 can be freely distributed from the center to the left and right. At this time, wiring is performed so that the edge portions on both sides facing the longitudinal direction of the memory bear chip 3 and the bonding wire 4 do not come into electrical contact (see FIG. 2).
[0012]
As shown in FIG. 2, the glass-epoxy substrate 1 is provided with recesses 1a and 1b on the substrate surface and recesses 1c and 1d on the back surface in order to bond and mount the memory bare chip 3. The recesses 1 a, 1 b, 1 c, and 1 d provided on the front surface and the back surface of the substrate are provided with the same depth as the memory bare chip 3. At this time, the bonding surface of the memory bare chip and the bonding surface of the glass-epoxy substrate are within approximately ± 50 μm. Further, the concave portion 1a and the concave portion 1b on the front surface of the substrate are provided in a symmetrical shape with each other, and similarly, the concave portions 1c and 1d on the back surface of the substrate are also provided in a symmetrical shape.
[0013]
As shown in FIG. 1, four memory bare chips 3 are bonded to each of the recesses 1a, 1b, 1c, and 1d. The four memory bare chips 3 are installed so that the longitudinal sides of the glass epoxy substrate 1 and the memory bare chip 3 are parallel to each other and arranged in two vertical and two horizontal directions.
As described above, the high-capacity memory module according to the present invention is provided so that 16 memory bare chips 3 can be mounted on both the front and back surfaces of the glass epoxy substrate 1, and the heat dissipation effect is improved because the glass epoxy substrate 1 and the chip are in close contact with each other. . In the high-capacity memory module according to the present invention, the left and right sides of the substrate are symmetrical even after the chip is mounted, and the front surface and the back surface of the substrate have the same shape and are provided symmetrically. As a result, the thermal stress becomes uniform on the substrate, and a high effect can be obtained for warpage.
[0014]
Further, by combining the cavity-structured glass epoxy substrate 1 with the recesses and the memory bare chip 3, the module of the present invention can be reduced by 20% to 3.0 mm compared to the TCP product of 3.8 mm. . Further, by providing the cavity structure with the recess 1 in the glass epoxy substrate, the distance between the bonding wire and the memory bare chip can be secured approximately 100 μm.
As shown in FIG. 3, the wiring method of the memory bare chip 3 mounted in the recesses 1a and 1b on the glass epoxy substrate is based on the center pad 3a provided at the center of the LOC memory bare chip 3-1 and 3-2. The connection pads 10a, 10b, and 10c on 1 are distributed to the left and right by the bonding wires 4 and wired. Thus, even if the bonding wire 4 is long, it is possible to perform wiring so that adjacent wires do not come into contact with each other by allocating left and right alternately from the center pad 3a.
[0015]
Further, the connection pad 10b provided between the memory bare chip 3-1 and the memory bare chip 3-2 has two bonding wires 4 from the memory bare chip 3-1 and two bonding wires 4 from the memory bare chip 3-2. It is provided so that this wiring can be performed.
The connection pads 10a, 10b, and 10c to which the bonding wires 4 are wired are provided with via holes that penetrate the glass-epoxy substrate 1 so that wiring on the front and back surfaces can be easily performed (see FIG. 2).
Thus, in order to realize a high-capacity memory module by halving the wiring pattern by devising the wiring, the connection pad 10 capable of wiring two or more bonding wires 4 is provided, and the center pad 3a is provided at the center and the right and left can freely By using the memory bare chip 3 that can be wired, high integration can be realized without using a special method.
[0016]
The memory bare chip 3 is mounted symmetrically on the left and right recesses provided on the front surface and the back surface of the glass epoxy substrate 1 so that the front surface and the back surface have the same shape. Further, since the connection pad 10 having a via hole penetrating the glass epoxy substrate is provided and mounted, the memory bear chip 3 can be easily wired and wiring efficiency can be improved.
As shown in FIG. 1, the memory bare chip 3 mounted in the recesses 1a, 1b, 1c and 1d prevents contact between both side edge portions facing in the longitudinal direction and the bonding wire 4, and the memory bare chip 3 is exposed to the outside air. It is sealed with a sealing resin 5 so as not to be contaminated by touching contaminants. The dam frame 2 is mounted on the glass epoxy substrate so that the resin does not flow around the substrate when the sealing resin 5 flows.
[0017]
The dam frame 2 is provided with two substantially square frames 2a and 2b surrounding the recesses 1a and 1b into which the memory bare chip 3 is inserted, and is formed by an auxiliary member 2c that joins the frames 2a and 2b. The frame 2a and the frame 2b have the same dimensions and are symmetric with respect to the auxiliary member 2c, and both the front and back surfaces are provided symmetrically. The dam frame 2 is mounted on both sides of the glass epoxy substrate 1, and as shown in FIG. 2, the dam frame 2-2 is mounted on the back surface and the dam frame 2-1 is mounted on the front surface.
Thus, since the dam frame 2 is mounted on both the front and back surfaces of the glass epoxy substrate 1, it is possible to prevent the substrate from warping. Further, by using the parts in common like the dam frame 2 or the memory bare chip 3, it is possible to easily manufacture and reduce the cost.
[0018]
On the glass-epoxy substrate 1, a capacitor 6 for lowering the power supply impedance and an EEPROM 7 for module identification are soldered. Further, an I / O terminal 9 that can select the specifications of the memory module is provided. The capacitor 6, the EEPROM 7 and the I / O terminal 9 are provided on both the front and back surfaces of the glass epoxy substrate 1 and have the same structure.
As shown in FIG. 4, the 32 MB memory module of the high capacity memory module according to the present invention includes memory chips D0, D1. . . Sixteen D15 are mounted on the back and front surfaces of the glass epoxy substrate. This corresponds to the memory bare chips 3-1, 3-2, 3-3 and 3-4 shown in FIG. 2, and has a 1 bank × 4 bit specification per memory module.
[0019]
All the 16 memory bare chips use memory chips having the same access timing, and the common signal wired from the center pad 3a is, for example, 16 1/00 parts (DQ0, DQ4, DQ8, DQ12, DQ16, DQ20, DQ24, DQ28, DQ32, DQ36, DQ40, DQ44, DQ48, DQ52, DQ56, DQ60), and 16 memory chips are divided into two on both sides ing. In this case, for example, DQ0 on the front surface and DQ32 on the back surface are connected to one connection pad 10a, 10c by a via hole penetrating the glass epoxy substrate. In this way, two bonding wires are wired by one connection pad. Similarly, 1/1, 1/02, and 1/03 are also wired by via holes of connection pads.
[0020]
In addition, common signals such as CAS, RAS, WE, OE, power supply line Vcc (not shown), address line GND (not shown) are connected to four memory bare chips on one connection pad using connection pad 10b. The bonding wires (2 on the back surface and 2 on the front surface) are wired.
In this way, signal connection is performed using the connection pads 10a, 10b, and 10c while minimizing the wiring pattern on the glass epoxy substrate. Each connection pad is signal-connected to the I / O terminal 9 of the corresponding module by an intermediate layer wiring pattern 11a and surface layer patterns 11b and 11c (see FIG. 2). As a result, the use efficiency of the via hole is increased, so that the size can be reduced, and a high-capacity memory module that is twice as large as the conventional size can be realized.
[0021]
In addition, as shown in FIG. 4, in the conventional plastic molded memory IC, the selection of the fast access mode (FP / EDO) and the selection of the refresh cycle (2k / 4k) are set for each product specification. On the other hand, the memory module of the present invention can be switched by jumper settings (solder options J1, J2) provided as an internal wiring option of the mold package. Thus, a single memory module is provided so that a plurality of settings can be made freely.
The jumper setting is performed by the jumper 8 shown in FIG. 1, and the high-speed access mode and refresh rate of the module can be selected by OPEN / SHORT of the jumper 8 (J1, J2).
[0022]
The embodiments of the high-capacity memory module according to the present invention have been described above in detail. However, the present invention is not limited to the above-described embodiments, and can be changed without departing from the gist thereof.
The dam frame having a substantially square shape is not limited to a substantially square shape, and may be an elliptical dam frame, for example.
In the above embodiment, the memory module of the present invention has been described by taking as an example a memory module provided with a solder option that can select either the high-speed access mode or the refresh cycle. However, the present invention is not particularly limited to this, and can of course be applied to a memory module having any function without a solder option. In this case, the versatility as shown in the above embodiment is lost, but instead the circuit configuration is simplified, so that a memory module with high cost performance can be expected when mass production is performed individually. .
[0023]
【The invention's effect】
As described above, according to the high-capacity memory module according to the present invention, when a memory IC of the same capacity using a plastic mold product is used, it is possible to mount twice as many memory chips, and the JEDEC standard (144 pin 8-byte SO DIMM) Then, a memory module having a double capacity can be realized.
In addition, the module thickness can be reduced by 20% compared to a method in which two layers of TCP are stacked to realize a double capacity, and the substrate of the memory bare chip is bonded to the glass-epoxy substrate, resulting in good heat dissipation characteristics.
[0024]
In addition, in order to improve the production efficiency, the access mode and refresh cycle are designed so that the specifications can be selected depending on the presence or absence of jumpers with the internal wiring option of the mold package, so that the internal signals of the memory IC can be freely taken out to the memory module, Module specifications can be easily changed by jumper settings. As a result, only one type of module is produced, and it is sufficient to set the jumper to the module specification corresponding to the user needs at the time of shipment, and to inspect and ship the module, so that the production efficiency can be improved.
In addition, the glass epoxy board, dam frame, and sealing resin have the same shape on both the front and back sides in the module thickness direction and have a symmetrical structure, which makes the mounting process of the glass epoxy board easier and the thermal stress on both sides Therefore, the memory module can be prevented from warping.
[0025]
In addition, since the distance between the bonding wire and the memory bare chip can be ensured to be approximately 100 μm, a pretreatment for applying insulation is unnecessary in order to prevent an electrical short circuit as in the prior art. In addition, the bonding surface of the memory bare chip and the bonding surface of the glass-epoxy substrate have a small height error when attached to each other, so that bonding stability and high-speed bonding are possible, and high productivity can be obtained.
In addition, a center pad is provided at the center of the memory bear chip, and wiring is performed by alternately allocating left and right so that the bonding wires are not adjacent to each other. Reduced and stable production.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a state in which an embodiment of a high-capacity memory module according to the present invention is partially cut away.
2 is a cross-sectional view taken along the line AA ′ of the memory module shown in FIG. 1;
3 is a top view showing an example of bonding wire bonding of the memory module shown in FIG. 1. FIG.
4 is a block diagram of a module that realizes a 32 MB memory by the memory module shown in FIG. 1;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Glass epoxy board | substrate 1a 1b, 1c Recessed part 2 Dam frame 2a 2b Frame 2c Auxiliary member 3 Memory bear chip 3a Center pad 4 Bonding wire 5 Sealing resin 6 Capacitor 7 EEPROM
8 Jumper 9 I / O terminals 10a, 10b, 10c Connection pads 11a, 11b, 11c Wiring pattern

Claims (4)

In a COB memory module in which a substrate having a plurality of I / O terminals and a wiring pattern is provided, a plurality of memory bare chips are mounted on the substrate, wire bonded, and sealed with resin.
A memory bear chip having a center pad which is provided with a pad at the center of both sides opposed in the longitudinal direction of the memory bear chip and can be freely wired left and right;
The substrate is provided with a plurality of recesses and has a cavity structure, and a plurality of the memory bare chips are mounted in the recesses, and via holes penetrating the substrate are provided, and at least two bonding signals of the memory bear chips can be connected. A glass epoxy substrate having a connection pad and an I / O terminal communicated with the connection pad;
Bonding wires to connect the connection pads of the glass epoxy substrate and center pad of the memory bare chips,
A sealing resin for sealing the memory bear chip mounted on the glass epoxy substrate;
A dam frame that is attached to the glass epoxy substrate and surrounds the periphery of the recess to facilitate the lamination of the sealing resin ; and
The memory bare chip, the dam frame, and the sealing resin have a symmetrical structure on the surface of the glass epoxy substrate with respect to the thickness direction of the module, and have a symmetrical structure on the front or back surface. module. The high capacity memory module according to claim 1.
The glass-epoxy substrate connects the via hole signals with a middle layer wiring pattern and a surface layer pattern in the substrate, and these wiring patterns are signal-connected to the I / O terminals. . The high capacity memory module according to claim 1.
In the glass epoxy board, signal lines for high-speed access mode, refresh cycle, etc. are patterned so that the pull-up to power supply and pull-down to ground can be freely changed depending on the presence or absence of jumper lines. A high-capacity memory module. The high capacity memory module according to claim 1.
A high-capacity memory module, wherein a capacitor and a module identification EEPROM are mounted on the glass-epoxy substrate in order to reduce power supply impedance.

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