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JP3768099B2 - Light receiving element and optical semiconductor device including the same - Google Patents

Light receiving element and optical semiconductor device including the same Download PDF

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Publication number
JP3768099B2
JP3768099B2 JP2000385598A JP2000385598A JP3768099B2 JP 3768099 B2 JP3768099 B2 JP 3768099B2 JP 2000385598 A JP2000385598 A JP 2000385598A JP 2000385598 A JP2000385598 A JP 2000385598A JP 3768099 B2 JP3768099 B2 JP 3768099B2
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JP
Japan
Prior art keywords
light receiving
light emitting
electrode
semiconductor device
optical semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2000385598A
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Japanese (ja)
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JP2002185069A (en
Inventor
晋 西村
正治 本多
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tottori Sanyo Electric Co Ltd
Priority to JP2000385598A priority Critical patent/JP3768099B2/en
Priority to CN018165303A priority patent/CN1217422C/en
Priority to US10/380,861 priority patent/US7777234B2/en
Priority to PCT/JP2001/008481 priority patent/WO2002029904A1/en
Priority to EP01972551A priority patent/EP1324396A4/en
Priority to KR1020037004556A priority patent/KR100698350B1/en
Publication of JP2002185069A publication Critical patent/JP2002185069A/en
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Publication of JP3768099B2 publication Critical patent/JP3768099B2/en
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  • Light Receiving Elements (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Semiconductor Lasers (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は光通信用の発光ダイオードや半導体レーザのように単一波長を出力する装置等の光出力をモニターするために好適な受光素子とそれを備える光半導体装置に関する。
【0002】
【従来の技術】
半導体レーザ装置に代表されるように、素子の光出力を一定に制御する光半導体装置においては、素子出力をモニターするための受光素子を備えている。半導体レーザ装置においては、発光素子として半導体レーザ素子を備え、この素子をサブマウントの上に配置している(特開平6−53603号公報参照)。図7に示すようにサブマウントが主にシリコンによって構成されることを利用して、サブマウント内部にシリコン製の受光素子を内蔵させ、サブマウントと受光素子1を兼用する場合が有る。この場合は、サブマウント表面の受光領域4を外れた領域にレーザ素子18を配置するための電極10を形成する。この電極10は、酸化シリコンなどの絶縁膜8を介してサブマウント上面に形成される。
【0003】
【発明が解決しようとする課題】
上記のように、受光素子内臓のサブマウントの上に半導体レーザ素子を配置する場合、レーザ素子18と受光領域4の間隔Lが変動すると、それに伴って受光素子の出力が変動することがある。例えば図6に実線で示すように、受光素子の表面からレーザ素子の発光点までの高さHが130μmの場合は、受光素子の出力電流Imが間隔Lに係らず略一定であるのに対して、高さHが10μmの場合は、破線で示すように受光素子の出力電流Imが間隔Lが長くなるにしたがって急激に減少する。図6に破線で示すような傾向は、高さHが120μm以下の場合、例えば半導体レーザの活性層を下側に配置する際に現れ、実線で示すような傾向は、高さHが130μm以上の場合、例えば半導体レーザの活性層を上側に配置する際に現れる。
【0004】
したがって、活性層で発生する熱をサブマウントを介して有効に逃がすために活性層を下側に配置する場合は、図6に破線で示すように出力電流Imが間隔Lによって変動し易いので、レーザ素子の取り付け状態によって、受光素子毎に電流Imが相違するという問題が発生する。
【0005】
また、上記のように、レーザ素子配置用の電極を受光素子内臓のサブマウント上面に形成する場合、素子配置用電極に加わる電圧などよって形成される電荷が受光素子の出力に悪影響を与える場合が有る。この様な傾向は、発光素子の放熱特性を改善するために素子配置用の電極を絶縁膜を介在しないで直接半導体層に接触させて配置するような場合や、素子形状の小型化に伴い、素子配置用電極と受光素子の受光領域の間隔を短くする場合に顕著となる。
【0006】
そこで本発明は、受光素子の出力電流の変動を低減し出力特性を良好に維持することを課題の1つとする。また、素子配置用電極の放熱特性を改善することを課題の1つとする。また、使い勝手が良い光半導体装置を提供することを課題の1つとする。また、小型化を図った光半導体装置を提供することを課題の1つとする。
【0007】
【課題を解決するための手段】
本発明の受光素子は請求項1に記載のように、上面に発光素子配置用の電極と受光領域を備える受光素子であって、前記素子配置用電極と前記受光領域が平面的に重なっていることを特徴とする。この構成により、発光素子の発光点と受光領域の間隔変動を抑制し、取り付け状態による受光素子の出力変動を低減することができる。
【0008】
本発明の受光素子は請求項2に記載のように、上面に発光素子配置用の電極と受光領域を備える受光素子であって、前記素子配置用電極に平面的に見て凹部が、前記受光領域に平面的に見て凸部が形成され、前記凹部と凸部が互いに嵌まり込むように配置されていることを特徴とする。この構成により、発光素子の発光点と受光領域の間隔変動を抑制し、取り付け状態による受光素子の出力変動を低減することができる。また、発光素子を電極上に安定して取付けることができる。
【0009】
本発明の光半導体装置は請求項3に記載のように、端面に発光点を有する発光素子を受光素子上面の受光領域に隣接して配置した光半導体装置において、前記発光素子をその発光点が前記受光領域と平面的に重なるように配置したことを特徴とする。この構成により、発光素子の発光点と受光領域の間隔変動を抑制し、取り付け状態による受光素子の出力変動を低減することができる。
【0010】
本発明の光半導体装置は請求項4に記載のように、端面に発光点を有する発光素子を受光素子上面の受光領域に隣接した素子配置用電極上に配置した光半導体装置において、前記受光領域の前記素子配置用電極と対向する側に平面的に見て突出した凸部を形成し、前記素子配置用電極の前記受光領域と対向する側に前記凸部が嵌まり込む窪んだ凹部を形成し、前記発光点を有する端面が前記凸部と凹部が嵌まり込む部分を横切るように前記発光素子を配置したことを特徴とする。この構成により、発光素子の発光点と受光領域の間隔変動を抑制し、取り付け状態による受光素子の出力変動を低減することができる。また、発光素子を電極上に安定して取付けることができる。
【0011】
前記発光素子は、受光素子表面を基準とした発光点の高さが120μm以下になるように配置することができる。このような配置の発光素子であっても、その発光状態を受光素子によって確実に検出することができる。
【0012】
前記発光素子を配置するための電極が前記受光領域に隣接した隣接領域に配置されているとともに、この発光素子配置用の電極を前記隣接領域を構成する半導体層に接するように絶縁膜を貫通して配置した構成とすることができる。この様な構成により、素子配置用電極に配置した素子の放熱性を高めることができる。また、発光素子に加わる高電圧の放電路を確保することができ、素子の静電耐圧を高めることができる。
【0013】
前記発光素子配置用の電極と前記受光領域の間に位置するように、前記受光素子を構成する半導体層の表面に高濃度不純物層を形成することができる。この構成により、受光領域周辺の不用電荷をこの層によって吸収し、受光素子の特性改善を図ることができる。
【0014】
【発明の実施の形態】
以下本発明の実施形態を図面を参照して説明する。初めに第1の実施形態について図1、図2を参照して説明する。図1は本発明の受光素子1と発光素子18からなる光半導体装置の実施形態を示す断面図、図2はその平面図である。図1は図2のI−Iに沿った断面図である。
【0015】
受光素子1は、PN型もしくはPIN型の受光素子で構成され、シリコン基板2にボロン(B)などのp型不純物を選択的に拡散することによりp型高濃度不純物層3を島状に形成している。このp型高濃度不純物層3が実質的に受光素子1の受光領域4となる。シリコン基板2は、PN型受光素子の場合はn型高濃度不純物層(n+シリコン層)のみで形成することができるが、この例では、PIN型受光素子とするために、n型高濃度不純物層(n+シリコン層)5にn型低濃度不純物層(n−シリコン層)6を積層した形態としている。
【0016】
受光素子1の受光領域4に隣接する領域を隣接領域7と呼ぶ。すなわち、p型高濃度不純物層3によって覆われていないシリコン基板2の上面が実質的に隣接領域7となる。受光素子1の上面、すなわち、受光領域4と隣接領域7は酸化シリコン(SiO2)等の絶縁膜8によって実質的に覆われている。受光素子1の上面には、受光領域4上の絶縁膜8の孔8aを貫通してアルミニウム(Al)などからなる信号電極9を高濃度不純物層3に接続するようにして設けている。また、隣接領域7上の絶縁膜8の上には金(Au)などからなる素子配置用電極10を設けている。
【0017】
発光素子18は、前後方向の側端面に発光点18a,18bを有する端面発光型の半導体レーザ素子で、放熱性を高めるためにその活性層を素子の下部に近接して配置している。発光素子18は、正負の電極を備え、この例ではそれらを上下の面に配置している。
【0018】
前記受光領域4は、図2に示すように電極10に対向する側に凸部4aを突出して形成することによって、前記電極10との平面的な重なりを持っている。この凸部4aは、発光素子18と受光領域4の間隔を埋める役目を果たす。発光素子18は、モニター用の発光点18bを有する後端面が電極10の後縁から若干はみ出すように配置することによって、発光点18bが凸部4aと平面的に重なる。このようにして凸部4aの先端部が電極10及び発光素子18の後縁よりも前側に位置するような配置となっている。そのため、発光素子18の取り付け位置が若干変動しても、図6におけるL=0の状態を保つことができる。
【0019】
次に、第2の実施形態を図3、図4を参照して説明する。第1の実施形態と共通の構成については説明を省略し、相違点を中心に説明する。
【0020】
第1の相違点は、絶縁膜8上に配置していた電極10を、絶縁膜8を貫通して基板2にその大部分を直接接触して配置した点である。一般的には熱伝導性に優れない絶縁膜8に貫通穴8bを設け、これを電極10が貫通して基板2に電極10の大部分を直接接触しているので、電極10を絶縁膜8上のみに設ける場合に比べて、電極10の上に配置する素子18の放熱特性を改善することができる。また、基板2の抵抗値を最適化すれば、素子18に静電気などの不所望の高電圧が加わった場合に、前記電極10とシリコン基板2をその放電路として機能させることが可能となり、素子18の耐圧を高めることができる。
【0021】
第2の相違点は、シリコン基板2の上面に、素子配置用電極10の縁に沿うようにして、p型高濃度不純物層3と同程度かそれ以上の不純物濃度に設定された高濃度不純物層11を形成した点である。この高濃度不純物層11は、リン(P)等のn型不純物を選択的に拡散することによって形成しているが、p型高濃度不純物層3と同様にp型とすることもでき、その導電型は電極10に印加する電圧の極性等に応じて選択的に変更することができる。
【0022】
そして、高濃度不純物層11は、絶縁膜8の下に電極10と離間して電極10の周囲を囲むように形成している。この高濃度不純物層11は、受光領域4を形成するp型高濃度不純物層3と電極10との間に位置するので、電極10に印加される電圧によってシリコン基板2表面に生じる不用電荷を効果的に吸収する不用電荷吸収用の領域として機能する。そのため、電極10に印加される電圧等によってシリコン基板2表面に生じる電荷が信号電極9の出力に影響を与え、受光素子1の照度―出力電流特性に悪影響が生じるのを最小限にとどめることができる。また、不純物層11がない場合に比べて受光領域4と電極10の間隔を短く設定して素子形状を小型化することができる。尚、受光素子1の裏面には、金などの裏面電極12が形成されている。
【0023】
第3の相違点は、受光領域4に重なっていた電極10の平面形状に受光領域4との平面的な重なりを持たないような変更を加えた点である。電極10は前記受光領域4と対向する側に、凸部4aを受け入れる凹部10aを形成することによって、電極10が凸部4aの両側を挟むような形状となっている。その結果、電極10が受光領域4との平面的な重なりを持たないような配置となっている。
【0024】
平面的に見て電極10の凹部10aに受光領域の凸部4aが嵌まり込み、その両者が嵌まり込んだ部分を発光点18bを有する後端面が横切るように発光素子18を配置している。その結果、発光素子18の端面中央にある発光点18bが凸部4a上に位置し、後端面の両端が電極10上に位置する。このように、凸部4aと凹部10aの存在によって、凸部4aの先端部分を電極10の最後尾よりも前方に配置することができるとともに、発光素子18の後端面よりも前方に配置することができ、図6に示す間隔L=0の状態を保持することができる。
【0025】
次に、上述した図1〜4に実施形態を示した光半導体装置をパッケージに実装した実施形態について図5を参照して説明する。図5に示す実施形態は、発光素子18として半導体レーザ素子を備え、サブマウントを兼ねる受光素子として上記の受光素子1を備えたフレームタイプの半導体レーザ装置13を示している。
【0026】
このレーザ装置13は、複数のリード14,15,16を樹脂枠17によって連結固定して構成したパッケージに前記受光素子1と半導体レーザ素子18を配置し、ワイヤボンド配線して構成している。リード14,15,16はリードフレームタイプのもので構成され、素子配置領域を先端に備える主リード15の左右に一対の副リード14,16を配置している。主リード15には放熱用の翼部が左右に一体に形成され、これらが樹脂枠17から左右に突出している。受光素子1はその裏面電極12を主リード15先端の素子配置部に銀ペースト等の導電性接着剤等によって接着することにより固定している。受光素子1上面の電極10上には、素子18をその発光点18a,bが素子の下部に位置するように、すなわち受光素子表面を基準とした発光点高さHが120μm以下になうように半田や銀ペースト等の導電剤を用いて固定している。それによって、素子18の裏面電極が素子配置用電極10に電気的に接続される。素子配置用電極10の素子18によって覆われないで露出する部分と副リード16との間には、ワイヤボンド線からなる配線19が施されている。素子18の表面電極20と主リード15との間には、ワイヤボンド線からなる配線21が施されている。受光素子1の信号電極9と副リード14との間には、ワイヤボンド線からなる配線22が施されている。
【0027】
係るレーザ装置13は、主リード15と副リード16の間に所定のレーザ駆動電圧を与えると、素子18の表裏電極に駆動電圧が供給されて素子18が発振し、レーザ光が軸Xに沿って出力される。後ろ方向に出力されるレーザ光の一部は受光素子1の受光領域4に入射し、それによって信号電極9に所定の電流出力Im(モニター信号)が発生する。この信号を副リード14と主リード15の間から外部に取り出し所定の処理を施すことによって、素子18に与える電圧を制御することができる。
【0028】
尚、上記実施例は、発光素子18として半導体レーザ素子を用いる場合を例にとったが、本発明は、比較的波長が単一で光通信などに利用可能な発光ダイオードやそれ以外の半導体発光素子なども素子18の対象とすることができる。
【0029】
また、本発明は、上記の各実施例において、P,Nの導電性を逆にした場合などもその実施形態に含めることができる。
【0030】
【発明の効果】
本発明によれば、受光感度特性に優れた受光素子を提供することができる。また、放熱性に優れた受光素子を提供することができる。また、小型化に適した受光素子を提供することができる。また、この様な受光素子を備える光半導体装置は、その特性を良好なものとすることができる。
【図面の簡単な説明】
【図1】本発明の光半導体装置の実施形態を示す断面図である。
【図2】同の実施形態の平面図である。
【図3】本発明の他の実施形態を示す断面図である。
【図4】同実施形態の平面図である。
【図5】本発明の他の実施形態を示す平面図である。
【図6】発光点と受光面までの距離Lと受光素子の出力電流を示す特性図である。
【図7】従来例の断面図である。
【符号の説明】
1 受光素子
4 受光領域
7 隣接領域
8 絶縁膜
10 素子配置用電極
11 高濃度不純物層(不用電荷吸収層)
13 半導体レーザ装置
18 発光素子(レーザ素子)
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a light receiving element suitable for monitoring the light output of a device that outputs a single wavelength, such as a light emitting diode or semiconductor laser for optical communication, and an optical semiconductor device including the same.
[0002]
[Prior art]
As typified by a semiconductor laser device, an optical semiconductor device that controls the light output of an element to a constant includes a light receiving element for monitoring the element output. In a semiconductor laser device, a semiconductor laser element is provided as a light emitting element, and this element is disposed on a submount (see Japanese Patent Laid-Open No. 6-53603). As shown in FIG. 7, there is a case where a silicon light receiving element is built in the submount and the submount and the light receiving element 1 are used together by utilizing the fact that the submount is mainly composed of silicon. In this case, the electrode 10 for disposing the laser element 18 is formed in a region outside the light receiving region 4 on the surface of the submount. The electrode 10 is formed on the upper surface of the submount via an insulating film 8 such as silicon oxide.
[0003]
[Problems to be solved by the invention]
As described above, when the semiconductor laser element is disposed on the submount with the built-in light receiving element, if the distance L between the laser element 18 and the light receiving region 4 varies, the output of the light receiving element may vary accordingly. For example, as shown by the solid line in FIG. 6, when the height H from the surface of the light receiving element to the light emitting point of the laser element is 130 μm, the output current Im of the light receiving element is substantially constant regardless of the interval L. When the height H is 10 μm, the output current Im of the light receiving element decreases rapidly as the interval L increases as shown by the broken line. The tendency as shown by the broken line in FIG. 6 appears when the height H is 120 μm or less, for example, when the active layer of the semiconductor laser is disposed on the lower side, and the tendency as shown by the solid line is the height H of 130 μm or more. In this case, for example, it appears when the active layer of the semiconductor laser is arranged on the upper side.
[0004]
Therefore, when the active layer is disposed on the lower side in order to effectively release the heat generated in the active layer through the submount, the output current Im is likely to fluctuate depending on the interval L as shown by the broken line in FIG. There is a problem that the current Im is different for each light receiving element depending on the mounting state of the laser element.
[0005]
As described above, when the electrode for arranging the laser element is formed on the upper surface of the submount built in the light receiving element, the charge formed by the voltage applied to the electrode for arranging the element may adversely affect the output of the light receiving element. Yes. Such a tendency is due to the case where the electrode for element arrangement is arranged in direct contact with the semiconductor layer without interposing an insulating film in order to improve the heat dissipation characteristics of the light emitting element, or along with the miniaturization of the element shape, This becomes conspicuous when the distance between the element placement electrode and the light receiving region of the light receiving element is shortened.
[0006]
Therefore, an object of the present invention is to reduce fluctuations in the output current of the light receiving element and maintain good output characteristics. Another object is to improve the heat dissipation characteristics of the element placement electrode. Another object is to provide an optical semiconductor device that is easy to use. Another object is to provide an optical semiconductor device that is downsized.
[0007]
[Means for Solving the Problems]
The light receiving element of the present invention is a light receiving element having a light emitting element arranging electrode and a light receiving region on an upper surface thereof as claimed in claim 1, wherein the element arranging electrode and the light receiving region overlap in a plane. It is characterized by that. With this configuration, it is possible to suppress the variation in the distance between the light emitting point of the light emitting element and the light receiving region, and to reduce the output fluctuation of the light receiving element due to the attached state.
[0008]
According to a second aspect of the present invention, there is provided a light receiving element having a light emitting element arrangement electrode and a light receiving region on an upper surface thereof, wherein a concave portion as viewed in a plan view of the element arrangement electrode is provided on the light receiving element. A convex portion is formed in the region in plan view, and the concave portion and the convex portion are arranged so as to fit into each other. With this configuration, it is possible to suppress the variation in the distance between the light emitting point of the light emitting element and the light receiving region, and to reduce the output fluctuation of the light receiving element due to the attached state. Further, the light emitting element can be stably mounted on the electrode.
[0009]
According to a third aspect of the present invention, there is provided an optical semiconductor device in which a light emitting element having a light emitting point on an end face is disposed adjacent to a light receiving region on an upper surface of the light receiving element. It arrange | positions so that it may overlap with the said light reception area | region planarly. With this configuration, it is possible to suppress the variation in the distance between the light emitting point of the light emitting element and the light receiving region, and to reduce the output fluctuation of the light receiving element due to the attached state.
[0010]
The optical semiconductor device according to the present invention is the optical semiconductor device according to claim 4, wherein a light emitting element having a light emitting point on an end face is arranged on an element arrangement electrode adjacent to the light receiving area on the upper surface of the light receiving element. A convex portion protruding in a plan view is formed on the side facing the element arranging electrode of the electrode, and a depressed concave portion into which the convex portion is fitted is formed on the side facing the light receiving region of the element arranging electrode. The light emitting element is arranged so that an end surface having the light emitting point crosses a portion where the convex portion and the concave portion are fitted. With this configuration, it is possible to suppress the variation in the distance between the light emitting point of the light emitting element and the light receiving region, and to reduce the output fluctuation of the light receiving element due to the attached state. Further, the light emitting element can be stably mounted on the electrode.
[0011]
The light emitting element can be arranged such that the height of the light emitting point with respect to the surface of the light receiving element is 120 μm or less. Even in the light emitting element having such an arrangement, the light emitting state can be reliably detected by the light receiving element.
[0012]
An electrode for disposing the light emitting element is disposed in an adjacent region adjacent to the light receiving region, and the electrode for disposing the light emitting element passes through an insulating film so as to contact a semiconductor layer constituting the adjacent region. Can be configured. With such a configuration, it is possible to improve the heat dissipation of the element arranged on the element arrangement electrode. In addition, a high voltage discharge path applied to the light emitting element can be secured, and the electrostatic withstand voltage of the element can be increased.
[0013]
A high-concentration impurity layer may be formed on the surface of the semiconductor layer constituting the light receiving element so as to be positioned between the light emitting element arranging electrode and the light receiving region. With this configuration, unnecessary charges around the light receiving region can be absorbed by this layer, and the characteristics of the light receiving element can be improved.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings. First, a first embodiment will be described with reference to FIGS. FIG. 1 is a sectional view showing an embodiment of an optical semiconductor device comprising the light receiving element 1 and the light emitting element 18 of the present invention, and FIG. 2 is a plan view thereof. FIG. 1 is a cross-sectional view taken along the line II of FIG.
[0015]
The light receiving element 1 is composed of a PN-type or PIN-type light receiving element, and a p-type high-concentration impurity layer 3 is formed in an island shape by selectively diffusing p-type impurities such as boron (B) into the silicon substrate 2. is doing. The p-type high concentration impurity layer 3 substantially becomes the light receiving region 4 of the light receiving element 1. In the case of a PN type light receiving element, the silicon substrate 2 can be formed of only an n type high concentration impurity layer (n + silicon layer). In this example, in order to obtain a PIN type light receiving element, an n type high concentration impurity is used. An n-type low concentration impurity layer (n-silicon layer) 6 is stacked on the layer (n + silicon layer) 5.
[0016]
A region adjacent to the light receiving region 4 of the light receiving element 1 is referred to as an adjacent region 7. That is, the upper surface of the silicon substrate 2 that is not covered with the p-type high concentration impurity layer 3 is substantially the adjacent region 7. The upper surface of the light receiving element 1, that is, the light receiving region 4 and the adjacent region 7 are substantially covered with an insulating film 8 such as silicon oxide (SiO 2). A signal electrode 9 made of aluminum (Al) or the like is provided on the upper surface of the light receiving element 1 so as to penetrate the hole 8 a of the insulating film 8 on the light receiving region 4 and to be connected to the high concentration impurity layer 3. An element placement electrode 10 made of gold (Au) or the like is provided on the insulating film 8 on the adjacent region 7.
[0017]
The light-emitting element 18 is an edge-emitting semiconductor laser element having light emitting points 18a and 18b on the side end faces in the front-rear direction, and its active layer is disposed close to the lower part of the element in order to improve heat dissipation. The light emitting element 18 includes positive and negative electrodes, and in this example, they are arranged on the upper and lower surfaces.
[0018]
As shown in FIG. 2, the light receiving region 4 has a planar overlap with the electrode 10 by forming a protruding portion 4 a on the side facing the electrode 10. The convex portion 4 a serves to fill the gap between the light emitting element 18 and the light receiving region 4. The light emitting element 18 is arranged so that the rear end surface having the light emitting point 18b for monitoring slightly protrudes from the rear edge of the electrode 10, so that the light emitting point 18b overlaps the convex portion 4a in a plane. In this way, the front end of the convex portion 4 a is arranged in front of the rear edges of the electrode 10 and the light emitting element 18. Therefore, even if the mounting position of the light emitting element 18 slightly varies, the state of L = 0 in FIG. 6 can be maintained.
[0019]
Next, a second embodiment will be described with reference to FIGS. The description of the configuration common to the first embodiment will be omitted, and the description will focus on the differences.
[0020]
The first difference is that the electrode 10 disposed on the insulating film 8 is disposed so as to penetrate most of the electrode 2 through the insulating film 8 and directly contact the substrate 2. In general, the through-hole 8b is provided in the insulating film 8 that is not excellent in thermal conductivity, and the electrode 10 passes through the insulating film 8 so that most of the electrode 10 is in direct contact with the substrate 2. Compared with the case where it is provided only on the upper surface, the heat dissipation characteristics of the element 18 disposed on the electrode 10 can be improved. If the resistance value of the substrate 2 is optimized, the electrode 10 and the silicon substrate 2 can function as a discharge path when an undesired high voltage such as static electricity is applied to the element 18. The withstand voltage of 18 can be increased.
[0021]
The second difference is that the high-concentration impurity is set on the upper surface of the silicon substrate 2 along the edge of the element placement electrode 10 so that the impurity concentration is set to be equal to or higher than that of the p-type high-concentration impurity layer 3. This is the point where the layer 11 is formed. The high-concentration impurity layer 11 is formed by selectively diffusing n-type impurities such as phosphorus (P). However, like the p-type high-concentration impurity layer 3, it can be made p-type. The conductivity type can be selectively changed according to the polarity of the voltage applied to the electrode 10.
[0022]
The high concentration impurity layer 11 is formed below the insulating film 8 so as to be separated from the electrode 10 and surround the periphery of the electrode 10. Since the high concentration impurity layer 11 is located between the p-type high concentration impurity layer 3 forming the light receiving region 4 and the electrode 10, unnecessary charges generated on the surface of the silicon substrate 2 due to the voltage applied to the electrode 10 are effective. It functions as a region for absorbing unwanted charges that are absorbed. Therefore, the charge generated on the surface of the silicon substrate 2 due to the voltage applied to the electrode 10 affects the output of the signal electrode 9, and the illuminance-output current characteristics of the light receiving element 1 are adversely affected. it can. Further, the element shape can be reduced by setting the distance between the light receiving region 4 and the electrode 10 shorter than in the case where the impurity layer 11 is not provided. A back electrode 12 such as gold is formed on the back surface of the light receiving element 1.
[0023]
The third difference is that the planar shape of the electrode 10 that has overlapped the light receiving region 4 is changed so as not to have a planar overlap with the light receiving region 4. The electrode 10 has a shape such that the electrode 10 sandwiches both sides of the convex portion 4a by forming a concave portion 10a for receiving the convex portion 4a on the side facing the light receiving region 4. As a result, the electrode 10 is arranged so as not to have a planar overlap with the light receiving region 4.
[0024]
The light-emitting element 18 is arranged so that the convex portion 4a of the light-receiving region fits into the concave portion 10a of the electrode 10 when seen in a plan view, and the rear end surface having the light-emitting point 18b crosses the portion in which both are fitted. . As a result, the light emitting point 18b at the center of the end face of the light emitting element 18 is located on the convex portion 4a, and both ends of the rear end face are located on the electrode 10. Thus, the presence of the convex portion 4a and the concave portion 10a allows the tip portion of the convex portion 4a to be disposed in front of the tail end of the electrode 10, and to be disposed in front of the rear end surface of the light emitting element 18. And the state of the interval L = 0 shown in FIG. 6 can be maintained.
[0025]
Next, an embodiment in which the optical semiconductor device shown in FIGS. 1 to 4 described above is mounted in a package will be described with reference to FIG. The embodiment shown in FIG. 5 shows a frame type semiconductor laser device 13 that includes a semiconductor laser element as the light emitting element 18 and includes the light receiving element 1 as a light receiving element that also serves as a submount.
[0026]
The laser device 13 is configured by arranging the light receiving element 1 and the semiconductor laser element 18 in a package formed by connecting and fixing a plurality of leads 14, 15, and 16 by a resin frame 17 and wire bonding wiring. The leads 14, 15, 16 are of a lead frame type, and a pair of sub leads 14, 16 are arranged on the left and right of the main lead 15 having an element arrangement region at the tip. The main lead 15 is integrally formed with right and left wings for heat dissipation, and these protrude from the resin frame 17 to the left and right. The light receiving element 1 is fixed by adhering the back electrode 12 to the element arrangement portion at the tip of the main lead 15 with a conductive adhesive such as silver paste. On the electrode 10 on the upper surface of the light receiving element 1, the element 18 is arranged so that the light emitting points 18a and 18b are located below the element, that is, the light emitting point height H with reference to the surface of the light receiving element is 120 μm or less. It is fixed using a conductive agent such as solder or silver paste. As a result, the back electrode of the element 18 is electrically connected to the element arrangement electrode 10. A wiring 19 made of a wire bond line is provided between a portion of the element placement electrode 10 exposed without being covered by the element 18 and the sub lead 16. Between the surface electrode 20 of the element 18 and the main lead 15, a wiring 21 made of a wire bond line is provided. Between the signal electrode 9 of the light receiving element 1 and the sub lead 14, a wiring 22 made of a wire bond line is provided.
[0027]
In the laser device 13, when a predetermined laser driving voltage is applied between the main lead 15 and the sub lead 16, the driving voltage is supplied to the front and back electrodes of the element 18, the element 18 oscillates, and the laser light travels along the axis X. Is output. A part of the laser beam output in the backward direction is incident on the light receiving region 4 of the light receiving element 1, whereby a predetermined current output Im (monitor signal) is generated at the signal electrode 9. The voltage applied to the element 18 can be controlled by taking this signal out from between the sub lead 14 and the main lead 15 and performing a predetermined process.
[0028]
In the above embodiment, the case where a semiconductor laser element is used as the light-emitting element 18 is taken as an example. However, the present invention is a light-emitting diode that has a relatively single wavelength and can be used for optical communication and other semiconductor light-emitting elements. An element or the like can also be the target of the element 18.
[0029]
In addition, the present invention can include the case where the conductivity of P and N is reversed in each of the above embodiments.
[0030]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to this invention, the light receiving element excellent in the light reception sensitivity characteristic can be provided. In addition, it is possible to provide a light receiving element with excellent heat dissipation. In addition, a light receiving element suitable for downsizing can be provided. In addition, the optical semiconductor device including such a light receiving element can have excellent characteristics.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing an embodiment of an optical semiconductor device of the present invention.
FIG. 2 is a plan view of the same embodiment.
FIG. 3 is a cross-sectional view showing another embodiment of the present invention.
FIG. 4 is a plan view of the embodiment.
FIG. 5 is a plan view showing another embodiment of the present invention.
FIG. 6 is a characteristic diagram showing a distance L between a light emitting point and a light receiving surface and an output current of the light receiving element.
FIG. 7 is a cross-sectional view of a conventional example.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Light receiving element 4 Light receiving area | region 7 Adjacent area | region 8 Insulating film 10 Element arrangement | positioning electrode 11 High concentration impurity layer (unnecessary charge absorption layer)
13 Semiconductor Laser Device 18 Light Emitting Element (Laser Element)

Claims (7)

上面に発光素子配置用の電極と受光領域を備える受光素子であって、前記素子配置用電極と前記受光領域が平面的に重なっていることを特徴とする受光素子。A light receiving element comprising a light emitting element arrangement electrode and a light receiving area on an upper surface, wherein the element arrangement electrode and the light receiving area overlap in a plane. 上面に発光素子配置用の電極と受光領域を備える受光素子であって、前記素子配置用電極に平面的に見て凹部が、前記受光領域に平面的に見て凸部が形成され、前記凹部と凸部が互いに嵌まり込むように配置されていることを特徴とする受光素子。A light receiving element having a light emitting element arrangement electrode and a light receiving region on an upper surface, wherein the element arranging electrode has a concave portion when viewed in plan, and a convex portion when viewed in plan on the light receiving region, and the concave portion And a convex portion are arranged so as to fit into each other. 端面に発光点を有する発光素子を受光素子上面の受光領域に隣接して配置した光半導体装置において、前記発光素子をその発光点が前記受光領域と平面的に重なるように配置したことを特徴とする光半導体装置。In an optical semiconductor device in which a light emitting element having a light emitting point on an end face is disposed adjacent to a light receiving region on the upper surface of the light receiving element, the light emitting element is disposed so that the light emitting point overlaps the light receiving region in a plane. An optical semiconductor device. 端面に発光点を有する発光素子を受光素子上面の受光領域に隣接した素子配置用電極上に配置した光半導体装置において、前記受光領域の前記素子配置用電極と対向する側に平面的に見て突出した凸部を形成し、前記素子配置用電極の前記受光領域と対向する側に前記凸部が嵌まり込む窪んだ凹部を形成し、前記発光点を有する端面が前記凸部と凹部が嵌まり込む部分を横切るように前記発光素子を配置したことを特徴とする光半導体装置。In an optical semiconductor device in which a light emitting element having a light emitting point on an end face is arranged on an element arranging electrode adjacent to a light receiving region on the upper surface of the light receiving element, the light receiving region is viewed in plan on the side facing the element arranging electrode. A protruding convex part is formed, a concave concave part into which the convex part is fitted is formed on a side of the element arrangement electrode facing the light receiving region, and an end surface having the light emitting point is fitted into the convex part and the concave part. An optical semiconductor device, wherein the light emitting element is disposed so as to cross a portion to be jammed. 前記発光素子は、前記受光素子表面を基準とした前記発光点の高さが120μm以下になるように配置されていることを特徴とする請求項3もしくは4記載の光半導体装置。5. The optical semiconductor device according to claim 3, wherein the light emitting element is arranged such that a height of the light emitting point with respect to a surface of the light receiving element is 120 μm or less. 前記発光素子を配置するための電極が前記受光領域に隣接した隣接領域に配置されているとともに、この発光素子配置用の電極を前記隣接領域を構成する半導体層に接するように絶縁膜を貫通して配置したことを特徴とする請求項3もしくは4記載の光半導体装置。An electrode for disposing the light emitting element is disposed in an adjacent region adjacent to the light receiving region, and the electrode for disposing the light emitting element passes through an insulating film so as to contact a semiconductor layer constituting the adjacent region. 5. The optical semiconductor device according to claim 3, wherein the optical semiconductor device is arranged. 前記発光素子配置用の電極と前記受光領域の間に位置するように、前記受光素子を構成する半導体層の表面に高濃度不純物層を形成したことを特徴とする請求項6記載の光半導体装置。7. The optical semiconductor device according to claim 6, wherein a high concentration impurity layer is formed on a surface of a semiconductor layer constituting the light receiving element so as to be positioned between the electrode for arranging the light emitting element and the light receiving region. .
JP2000385598A 2000-09-29 2000-12-19 Light receiving element and optical semiconductor device including the same Expired - Fee Related JP3768099B2 (en)

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JP2000385598A JP3768099B2 (en) 2000-12-19 2000-12-19 Light receiving element and optical semiconductor device including the same
CN018165303A CN1217422C (en) 2000-09-29 2001-09-27 Receiving optics and photosemiconductor device having the same
US10/380,861 US7777234B2 (en) 2000-09-29 2001-09-27 Light-receiving element and photonic semiconductor device provided therewith
PCT/JP2001/008481 WO2002029904A1 (en) 2000-09-29 2001-09-27 Receiving optics and photosemiconductor device having the same
EP01972551A EP1324396A4 (en) 2000-09-29 2001-09-27 OPTICAL RECEPTION SYSTEM AND SEMICONDUCTOR OPTICAL DEVICE EQUIPPED WITH THE SAME
KR1020037004556A KR100698350B1 (en) 2000-09-29 2001-09-27 Light receiving element and optical semiconductor device having same

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