JP3721616B2 - Clock synchronization apparatus and clock synchronization method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention relates to a clock synchronization device.And clock synchronization methodAbout. Specifically, the comparison is made by utilizing the fact that the clock frequency in the 1125 / 59.94 television system and the clock frequency in the 525 / 59.94 television system satisfy a predetermined formula relationship.TargetClock synchronizer capable of synchronizing clocks in the two systems described above with a simple configurationAnd clock synchronization methodIt is related to.
[0002]
[Prior art]
Conventionally, in addition to the 525 / 59.94 television system in which the number of lines per frame is 525 and the field frequency is 59.9400058 Hz, the number of lines per frame is 1125 and the field frequency is 60 Hz. The 60 television system (high definition television system) has been proposed. In this case, conversion from a video signal of 1125/60 television system to a video signal of 525 / 59.94 television system (down-conversion), or conversion from a video signal of 525 / 59.94 television system to 1125/60 television. The conversion (up-conversion) into the video signal of the system is performed by converting the number of fields and the number of lines with a frame synchronizer configuration because the field frequencies are different.
[0003]
[Problems to be solved by the invention]
As described above, conversion between a 1125/60 television system video signal and a 525 / 59.94 television system video signal is performed by converting the number of fields and the number of lines with a frame synchronizer-like configuration. Therefore, it is not necessary to synchronize the clock used for processing the video signal of the 1125/60 television system and the clock used for processing the video signal of the 525 / 59.94 television system.
[0004]
By the way, US ATV (advanced television) has proposed 1125 / 59.94 television system in which the number of lines per frame is 1125 and the field frequency is 59.9400058 Hz. In Japan, the effectiveness of the 1125 / 59.94 television system is discussed in terms of compatibility with the 525 / 59.94 television system. For example, conversion between a 1125 / 59.94 television system video signal and a 525 / 59.94 television system video signal can be performed only by converting the number of lines because the field frequency is the same. It becomes possible. In this case, however, the clock used for processing the video signal of the 1125 / 59.94 television system and the clock used for processing the video signal of the 525 / 59.94 television system may be synchronized. Necessary.
[0005]
  Therefore, according to the present invention, a clock synchronization apparatus capable of synchronizing clocks in the 1125 / 59.94 television system and the 525 / 59.94 television system with a comparatively simple configuration.And clock synchronization methodIs to provide.
[0008]
[Means for Solving the Problems]
  The clock synchronizer according to the present invention is a first clock used in a 1125 / 59.94 television video signal processing system having 1125 lines per frame and a field frequency of 59.9400058 Hz.A first voltage controlled oscillator that outputsSecond clock used in a video signal processing system of 525 / 59.94 television system in which the number of lines per frame is 525 and the field frequency is 59.9400058 Hz.Is output from the first voltage controlled oscillator and the second voltage controlled oscillatorA first front-stage frequency divider that divides the first clock by 1/2200; a first rear-stage frequency divider that divides the output signal of the first front-stage frequency divider by 1/15;Output from the second voltage controlled oscillatorA second first-stage frequency dividing means for dividing the second clock by 1/858; a second second-stage frequency dividing means for dividing the output signal of the second front-stage frequency dividing means by 1/7; First phase comparison means for comparing phases of a signal having a 15-line period obtained from one subsequent-stage frequency dividing means and a signal having a 7-line period obtained from the second subsequent-stage frequency dividing means;When the reference video signal is a 1125 / 59.94 television video signalLine cycle signal output by the first pre-dividing meansAnd the reference video signal is a video signal of the above 525 / 59.94 television systemLine cycle signal output by the second pre-dividing meansIssueselectFirstThe choice means and thisFirstLine cycle signal and reference video signal selected by the selection meansSeparated fromSecond phase comparison means for comparing the phase with the horizontal synchronizing signal;When the reference video signal is a video signal of the above 1125 / 59.94 television system, the phase difference signal obtained by the first phase comparison means is supplied to the second voltage controlled oscillator as a control signal and the second phase comparison The phase difference signal obtained by the first phase comparison means is supplied to the first voltage controlled oscillator as the control signal, and the reference video signal is a video signal of the 525 / 59.94 television system. Second selection means for supplying a signal as a control signal to the first voltage controlled oscillator and supplying a phase difference signal obtained by the second phase comparison means as a control signal to the second voltage controlled oscillatorAnd with, Obtained by dividing the first clock15 line cycleSignalWhenObtained by dividing the second clock7 line cycleSignalIn phaseDoWith,1st clockKuoAnd the second clockTheReference video signalTo be synchronized withIs.
  The clock synchronization method according to the present invention is as follows:Output from the first voltage controlled oscillator,A first clock used in a 1125 / 59.94 television video signal processing system having 1125 lines per frame and a field frequency of 59.9400058 Hz;Output from the second voltage controlled oscillator,This is a clock synchronization method for synchronizing with a second clock used in a video signal processing system of 525 / 59.94 television system in which the number of lines per frame is 525 and the field frequency is 59.9400058 Hz. A first pre-stage division step for dividing the first clock by 1/2200, and the first pre-stage division step.Obtained inA first subsequent-stage frequency dividing step for dividing the signal by 1/15; a second previous-stage frequency dividing step for dividing the second clock by 1/858; and this second previous-stage frequency dividing step.Obtained inA second post-stage division step for dividing the signal by 1/7 and a first post-stage division stepsoThe obtained 15-line cycle signal and the second subsequent frequency division stepsoA first phase comparison step for comparing the phase with the resulting 7-line period signal;When the reference video signal is a 1125 / 59.94 television video signalFirst previous division stepObtained inLine cycle signalAnd the reference video signal is a 525 / 59.94 television video signal.Second previous division stepObtained inLine cycle confidenceIssueselectFirstSelect step and thisFirstThe signal of the above line period and the reference video signal selected in the selection stepSeparated fromA second phase comparison step for comparing the phase with the horizontal synchronization signal;When the reference video signal is a video signal of 1125 / 59.94 television system, the phase difference signal obtained in the first phase comparison step is supplied as a control signal to the second voltage controlled oscillator, and the second phase comparison step Is supplied to the first voltage controlled oscillator as a control signal, and the phase difference signal obtained in the first phase comparison step when the reference video signal is a 525 / 59.94 television video signal. As a control signal to the first voltage controlled oscillator and the second Second selection step for supplying a phase difference signal obtained in the phase comparison step to the second voltage controlled oscillator as a control signalAnd with, Obtained by dividing the first clock15 line cycleSignalWhenObtained by dividing the second clock7 line cycleSignalIn phaseDoWith,1st clockKuoAnd the second clockTheReference video signalTo be synchronized withIs.
[0009]
  1In the case of the 125 / 59.94 television system, the horizontal phase is synchronized with 15 lines, and in the case of the 525 / 59.94 television system, the horizontal phase is synchronized with 7 lines.U. Therefore, it is used in the signal processing system of the 15-line period obtained from the second clock used in the video signal processing system of the 1125 / 59.94 television system and the video signal processing system of the 525 / 59.94 television system. It is possible to synchronize the first and second clocks by performing control so that the phases of the signals of the seven line periods obtained from the first clock are matched.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a configuration of a video camera apparatus 100 as the first embodiment.
[0017]
A video camera apparatus 100 shown in FIG. 1 has image sensors for red, green, and blue images, for example, a CCD (charge coupled device) solid-state image sensor, and obtains red, green, and blue color signals. The camera unit 11 is provided. The camera unit 11 corresponds to the 1125 / 59.94 television system in which the number of lines per frame is 1125 and the field frequency is 59.9400058 Hz. The number of samples for one line of the blue color signal is 2200.
[0018]
The video camera apparatus 100 also performs image processing such as black and white balance control, shading correction, and defect correction on the red, green, and blue color signals output from the camera unit 11, and further includes image enhancement processing, pedestal addition processing, Digital red, green and blue color signals R constituting a 1125 / 59.94 television system video signal by digitally performing non-linear processing such as gamma and knee, linear matrix processing, etc._HD, G_HD, B_HDA digital signal processor 12 as signal processing means for obtaining a color signal R output from the digital signal processor 12_HD, G_HD, B_HDAnd an output terminal 13 for deriving.
[0019]
The video camera apparatus 100 also includes a color signal R output from the digital signal processor 12._HD, G_HD, B_HDThe line number conversion process is performed on the digital red, green and blue color signals R corresponding to the 525 / 59.94 television system in which the number of lines per frame is 525 and the field frequency is 59.9400058 Hz.₅₂₅, G₅₂₅, B₅₂₅System conversion unit (down converter) 14 for obtaining the color signal R output from the system conversion unit 14₅₂₅, G₅₂₅, B₅₂₅And an output terminal 15 for deriving. Here, the color signal R₅₂₅, G₅₂₅, B₅₂₅The number of samples in one line is 858.
[0020]
In addition, the video camera apparatus 100 includes a clock CK corresponding to the 1125 / 59.94 television system used in the camera unit 11, the digital signal processor 12, and the system conversion unit 14._HD, Horizontal sync signal H_HD, Vertical synchronization signal V_HDAnd a clock CK corresponding to the 525 / 59.94 television system used in the system conversion unit 14₅₂₅, Horizontal sync signal H₅₂₅, Vertical synchronization signal V₅₂₅And a signal generator 16 for obtaining a 1125 / 59.94 television video signal SV._HDOr a video signal SV of 525 / 59.94 television system₅₂₅The reference video signal SV_REFAnd an input terminal 17 for supplying as Where clock CK_HD, CK₅₂₅Frequency f_HD, F₅₂₅Are represented by equations (1) and (2), respectively, where fv is the field frequency.
[0021]
f_HD  = 1125 × 2200 × fv / 2 = 74.175756 MHz (1)
f₅₂₅ = 525 x 858 x fv / 2 = 13.5 MHz (2)
FIG. 2 shows the clock CK of the signal generator 16._HD, CK₅₂₅The structure of the clock generation part 110 for obtaining is shown. In this clock generation unit 110, the clock CK is obtained by using the relation of the expression (3) obtained from the expressions (1) and (2)._HD, CK₅₂₅Are synchronized. Equation (3) is frequency-locked only 75 times in one frame, and in the case of the 1125 / 59.94 television system, the frequency is 15 lines, and in the case of the 525 / 59.94 television system, the frequency is 7 lines. It means that the phases are matched.
[0022]
75 × fv / 2 = f_HD/ (2200 × 15) = f₅₂₅/ (858 × 7) (3)
The clock generator 110 shown in FIG._HDAnd a voltage-controlled oscillator (VCO) 111 for obtaining a signal and a signal having a line period (horizontal period) of 1125 / 59.94 television system by dividing the output signal of the voltage-controlled oscillator 111 by 1/2200. A frequency divider 112, a frequency divider 113 that divides the output signal of the frequency divider 112 by 1/15 to obtain a signal of 1125 / 59.94 television system with a 15-line period, and a clock CK₅₂₅A voltage-controlled oscillator 114 for obtaining a signal, a frequency divider 115 for dividing the output signal of the voltage-controlled oscillator 114 by 1/858 to obtain a signal having a line period of 525 / 59.94 television system, And a frequency divider 116 that divides the output signal of the frequency divider 115 into 1/7 to obtain a signal of a 525 / 59.94 television system having a 7-line period.
[0023]
The clock generator 110 also outputs a 1125 / 59.94 television system 15-line signal output from the frequency divider 113 and a 525 / 59.94 television system 7 line output from the frequency divider 116. A phase comparator 117 that compares the phase of the signal with the period signal and a low-pass filter 118 for limiting the band of the phase difference signal output from the phase comparator 117 are provided.
[0024]
Further, the clock generator 110 generates a reference video signal SV._REFMore horizontal reference sync signal H_REF, And a line period signal of 1125 / 59.94 television system output from the frequency divider 112 or a line period of 525 / 59.94 television system output from the frequency divider 115. And a reference horizontal sync signal H separated by a sync separation circuit 119._REFAnd a phase comparator 121 for comparing the phases of the signals taken out by the changeover switch 120 and a low-pass filter 122 for limiting the band of the phase difference signal output from the phase comparator 121.
[0025]
A line terminal signal of 1125 / 59.94 television system output from the frequency divider 112 is supplied to the fixed terminal on the a side of the changeover switch 120, and output from the frequency divider 115 to the fixed terminal on the b side. 525 / 59.94 television system line period signals are supplied. The changeover switch 120 is connected to the reference video signal SV._REF1125 / 59.94 Television system video signal SV_HDIs connected to the a side, while the reference video signal SV_REF525 / 59.94 Television system video signal SV₅₂₅Is connected to the b side.
[0026]
In addition, the clock generation unit 110 includes changeover switches 123 and 124 for selectively extracting the output signal of the low-pass filter 118 or the output signal of the low-pass filter 122. The output signal of the low-pass filter 122 is supplied to the fixed terminal on the a side of the changeover switch 123, the output signal of the low-pass filter 118 is supplied to the fixed terminal on the b side, and the signal obtained at the movable terminal is a voltage controlled oscillator. 111 is supplied as a control signal. The output signal of the low-pass filter 118 is supplied to the fixed terminal on the a side of the changeover switch 124, the output signal of the low-pass filter 122 is supplied to the fixed terminal on the b side, and the signal obtained at the movable terminal is a voltage controlled oscillator. 114 is supplied as a control signal. The changeover switches 123 and 124 are connected to the reference video signal SV._REF1125 / 59.94 Television system video signal SV_HDIs connected to the a side, while the reference video signal SV_REF525 / 59.94 Television system video signal SV₅₂₅Is connected to the b side.
[0027]
In the clock generator 110 shown in FIG. 2, the reference video signal SV_REF1125 / 59.94 Television system video signal SV_HDThe operation in the case of In this case, the change-over switches 120, 123, and 124 are connected to the a side. Therefore, the phase difference signal output from the phase comparator 117 is supplied as a control signal to the voltage controlled oscillator 114 via the low pass filter 118 and the a side of the changeover switch 124. As a result, the clock CK_HD1125 / 59.94 television system signal with 15 line period and clock CK₅₂₅The oscillation frequency of the voltage controlled oscillator 114 is controlled so that the phase of the signal of the 525 / 59.94 television system obtained by frequency division of the 525 / 59.94 television is in phase, and the clock CK is derived from the relationship of the above equation (3)._HD, CK₅₂₅Are synchronized.
[0028]
Also, the 1125 / 59.94 television system line cycle signal output from the frequency divider 112 by the phase comparator 121 and the 1125 / 59.94 television system video signal SV by the synchronization separation circuit 119._HDReference horizontal sync signal H separated more_REFAre compared, and the phase difference signal is supplied as a control signal to the voltage controlled oscillator 111 via the low pass filter 122 and the a side of the changeover switch 123. Therefore, clock CK_HD, CK₅₂₅Is the reference video signal_REF1125 / 59.94 television system video signal SV as_HDSynchronized with
[0029]
Next, in the clock generator 110 shown in FIG._REF525 / 59.94 Television system video signal SV₅₂₅The operation in the case of In this case, the change-over switches 120, 123, and 124 are connected to the b side. Therefore, the phase difference signal output from the phase comparator 117 is supplied as a control signal to the voltage controlled oscillator 111 via the low pass filter 118 and the b side of the changeover switch 123. As a result, the clock CK_HD1125 / 59.94 television system signal with 15 line period and clock CK₅₂₅The oscillation frequency of the voltage controlled oscillator 111 is controlled so that the phase of the signal of the 525 / 59.94 television system obtained by dividing the frequency of the 525 / 59.94 television is matched, and the clock CK is derived from the relationship of the above equation (3)._HD, CK₅₂₅Are synchronized.
[0030]
Further, the signal of the line period of 525 / 59.94 television system output from the frequency divider 115 by the phase comparator 121 and the video signal SV of 525 / 59.94 television system by the synchronization separation circuit 119.₅₂₅Reference horizontal sync signal H separated more_REFAre compared, and the phase difference signal is supplied as a control signal to the voltage controlled oscillator 114 via the low pass filter 122 and the b side of the changeover switch 124. Therefore, clock CK_HD, CK₅₂₅Is the reference video signal_REF525 / 59.94 television system video signal SV as₅₂₅Synchronized with
[0031]
As described above, the clock generation unit 110 illustrated in FIG. 2 uses the above-described equation (3) to generate the clock CK._HD, CK₅₂₅Therefore, it is realized with a relatively simple configuration.
[0032]
The operation of the video camera device 100 shown in FIG. 1 will be described. Red, green, and blue color signals output from the camera unit 11 are supplied to a digital signal processor 12, and image processing such as black and white balance control, shading correction, and defect correction, image enhancement processing, pedestal addition processing, gamma, Digital red, green, and blue color signals R constituting a 1125 / 59.94 television system video signal by digitally performing nonlinear processing such as knee and linear matrix processing_HD, G_HD, B_HDIs formed. The color signal R output from the digital signal processor 12_HD, G_HD, B_HDIs output to the output terminal 13.
[0033]
The color signal R output from the digital signal processor 12 is also shown._HD, G_HD, B_HIs supplied to the system conversion unit 14, and the line number conversion process is performed and the digital red, green, and blue color signals R constituting the video signal of the 525 / 59.94 television system are processed.₅₂₅, G₅₂₅, B₅₂₅Is formed. Then, the color signal R output from the system conversion unit 14₅₂₅, G₅₂₅, B₅₂₅Is led to the output terminal 15. In this case, the clock CK supplied from the signal generator 16 to the system conversion unit 14_HD, CK₅₂₅Since the synchronization is established as described above, the method conversion unit 14 performs the line number conversion process satisfactorily.
[0034]
Next, FIG. 3 shows a configuration of a video camera apparatus 200 as the second embodiment. 3, parts corresponding to those in FIG. 1 are denoted by the same reference numerals and detailed description thereof is omitted.
[0035]
A video camera device 200 shown in FIG. 3 includes image sensors for red images, green images, and blue images, for example, CCD solid-state image sensors, and includes a camera unit 21 for obtaining red, green, and blue color signals. Have. The camera unit 21 corresponds to the 525 / 59.94 television system in which the number of lines in one frame is 525 and the field frequency is 59.9400058 Hz. The camera unit 21 outputs red, green, The number of samples of one line of the blue color signal is 858.
[0036]
The video camera device 200 also performs image processing such as black and white balance control, shading correction, and defect correction on the red, green, and blue color signals output from the camera unit 21, and further includes image enhancement processing, pedestal addition processing, Digital red, green and blue color signals R constituting a video signal of 525 / 59.94 television system by digitally performing nonlinear processing such as gamma and knee, linear matrix processing, etc.₅₂₅, G₅₂₅, B₅₂₅A digital signal processor 22 as signal processing means for obtaining the color signal R and a color signal R output from the digital signal processor 22₅₂₅, G₅₂₅, B₅₂₅And an output terminal 23 for deriving.
[0037]
In addition, the video camera device 200 has a color signal R output from the digital signal processor 22.₅₂₅, G₅₂₅, B₅₂₅Is converted to a digital red, green and blue color signal R corresponding to the 1125 / 59.94 television system having 1125 lines per frame and a field frequency of 59.9400058 Hz._HD, G_HD, B_HDSystem conversion unit (upconverter) 24 for obtaining the color signal R output from the system conversion unit 24_HD, G_HD, B_HDAnd an output terminal 25 for deriving. Here, the color signal R_HD, G_HD, B_HDThe number of samples per line is 2200.
[0038]
The video camera device 200 includes a signal generator 16 as in the video camera device 100 shown in FIG. From the signal generator 16, the reference video signal SV supplied to the input terminal 17 as described above._REFAnd clocks CK synchronized to each other_HD, CK₅₂₅Etc. are obtained. Clock CK corresponding to 525 / 59.94 television system output from signal generator 16₅₂₅, Horizontal sync signal H₅₂₅, Vertical synchronization signal V₅₂₅Are supplied to the camera unit 21, the digital signal processor 22, and the system conversion unit 24 for use. The clock CK corresponding to the 1125 / 59.94 television system output from the signal generator 16_HD, Horizontal sync signal H_HD, Vertical synchronization signal V_HDIs supplied to the system conversion unit 24 for use.
[0039]
The operation of the video camera device 200 shown in FIG. 3 will be described. Red, green, and blue color signals output from the camera unit 21 are supplied to the digital signal processor 22, and image processing such as black and white balance control, shading correction, and defect correction, image enhancement processing, pedestal addition processing, gamma, Digital red, green and blue color signals R constituting a video signal of 525 / 59.94 television system by digitally performing nonlinear processing such as knee or linear matrix processing₅₂₅, G₅₂₅, B₅₂₅Is formed. The color signal R output from the digital signal processor 22₅₂₅, G₅₂₅, B₅₂₅Is led to the output terminal 23.
[0040]
The color signal R output from the digital signal processor 22 is also shown.₅₂₅, G₅₂₅, B₅₂₅Is supplied to the system conversion unit 24, the line number conversion process is performed, and the digital red, green and blue color signals R constituting the 1125 / 59.94 television system video signal_HD, G_HD, B_HDIs formed. Then, the color signal R output from the system conversion unit 24_HD, G_HD, B_HDIs led to the output terminal 25. In this case, the clock CK supplied from the signal generator 16 to the system conversion unit 24._HD, CK₅₂₅Since the synchronization is established as described above, the line number conversion process is satisfactorily performed in the system conversion unit 24.
[0041]
Next, FIG. 4 shows a configuration of a video camera apparatus 300 as the third embodiment. 4, parts corresponding to those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted.
[0042]
4 has a camera unit 11, a digital signal processor 12, an output terminal 13, a system conversion unit 14, and an output terminal 15, similarly to the video camera device 100 shown in FIG. are doing.
[0043]
In addition, the video camera apparatus 300 includes a clock CK corresponding to the 1125 / 59.94 television system used in the camera unit 11, the digital signal processor 12, and the system conversion unit 14._HD, Horizontal sync signal H_HD, Vertical synchronization signal V_HDAnd a clock CK corresponding to the 525 / 59.94 television system used in the system conversion unit 14₅₂₅, Horizontal sync signal H₅₂₅, Vertical synchronization signal V₅₂₅A signal generator 36 for obtaining While the signal generator 16 of the video camera apparatus 100 shown in FIG. 1 has an external synchronization system, the signal generator 36 does not have an external synchronization system.
[0044]
FIG. 5 shows the clock CK of the signal generator 36._HD, CK₅₂₅The structure of the clock generation part 310 for obtaining is shown. In FIG. 5, parts corresponding to those in FIG.
[0045]
The clock generator 310 shown in FIG._HDA fixed oscillator 311 for obtaining a signal, a frequency divider 112 for dividing an output signal of the fixed oscillator 311 by 1/2200 to obtain a signal having a line period of 1125 / 59.94 television system, and the frequency divider A frequency divider 113 that divides the output signal of 112 by 1/15 to obtain a signal of 15 line period of 1125 / 59.94 television system, and a clock CK₅₂₅A voltage-controlled oscillator 114 for obtaining a signal, a frequency divider 115 for dividing the output signal of the voltage-controlled oscillator 114 by 1/858 to obtain a signal having a line period of 525 / 59.94 television system, And a frequency divider 116 that divides the output signal of the frequency divider 115 into 1/7 to obtain a signal of a 525 / 59.94 television system having a 7-line period.
[0046]
In addition, the clock generator 310 has a 1125 / 59.94 television system 15-line signal output from the frequency divider 113 and a 525 / 59.94 television system 7 line output from the frequency divider 116. A phase comparator 117 that compares the phase of the signal with the period signal and a low-pass filter 118 for limiting the band of the phase difference signal output from the phase comparator 117 are provided. The output signal of the low pass filter 118 is supplied to the voltage controlled oscillator 114 as a control signal.
[0047]
In the clock generator 310 shown in FIG. 5, the phase difference signal output from the phase comparator 117 is supplied as a control signal to the voltage controlled oscillator 114 via the low pass filter 118. Therefore, clock CK_HD1125 / 59.94 television system signal with 15 line period and clock CK₅₂₅The oscillation frequency of the voltage controlled oscillator 114 is controlled so that the phase of the signal of the 525 / 59.94 television system obtained by frequency division of the 525 / 59.94 television is in phase, and the clock CK is derived from the relationship of the above equation (3)._HD, CK₅₂₅Are synchronized.
[0048]
FIG. 6 shows the clock CK of the signal generator 36._HD, CK₅₂₅The other structure of the clock generation part 310 for obtaining is shown. In FIG. 6, parts corresponding to those in FIG.
[0049]
The clock generator 310 shown in FIG._HDA voltage-controlled oscillator 111 for obtaining a signal, and a frequency divider 112 for dividing the output signal of the voltage-controlled oscillator 111 by 1/2200 to obtain a signal having a line period of 1125 / 59.94 television system, A frequency divider 113 that divides the output signal of the frequency divider 112 by 1/15 to obtain a 1125 / 59.94 television system signal having a 15-line period, and a clock CK₅₂₅A fixed oscillator 314 for obtaining a signal, a frequency divider 115 for dividing the output signal of the fixed oscillator 314 by 1/858 to obtain a signal having a line period of 525 / 59.94 television system, and the frequency divider And a frequency divider 116 that divides the output signal 115 to 1/7 to obtain a signal of a 525 / 59.94 television system in a 7-line cycle.
[0050]
In addition, the clock generator 310 outputs a 1125 / 59.94 television format 15-line signal output from the frequency divider 113 and a 525 / 59.94 television format 7 line output from the frequency divider 116. A phase comparator 117 that compares the phase of the signal with the period signal and a low-pass filter 118 for limiting the band of the phase difference signal output from the phase comparator 117 are provided. The output signal of the low pass filter 118 is supplied to the voltage controlled oscillator 111 as a control signal.
[0051]
In the clock generator 310 shown in FIG. 6, the phase difference signal output from the phase comparator 117 is supplied as a control signal to the voltage controlled oscillator 111 via the low pass filter 118. Therefore, clock CK_HD1125 / 59.94 television system signal with 15 line period and clock CK₅₂₅The oscillation frequency of the voltage controlled oscillator 111 is controlled so that the phase of the signal of the 525 / 59.94 television system obtained by dividing the frequency of the 525 / 59.94 television is matched, and the clock CK is derived from the relationship of the above equation (3)._HD, CK₅₂₅Are synchronized.
[0052]
In the video camera device 300 shown in FIG. 4, as in the video camera device 100 shown in FIG. 1, digital red, green, and blue colors that constitute a 1125 / 59.94 television video signal by the digital signal processor 12. Signal R_HD, G_HD, B_HDAre formed and output to the output terminal 13, and the digital red, green and blue color signals R constituting the video signal of the 525 / 59.94 television system by the system conversion unit 14 are formed.₅₂₅, G₅₂₅, B₅₂₅Is formed and led to the output terminal 15. In this case, the clock CK supplied from the signal generator 36 to the system conversion unit 14_HD, CK₅₂₅Since the synchronization is established as described above, the method conversion unit 14 performs the line number conversion process satisfactorily.
[0053]
Next, FIG. 7 shows a configuration of a video camera apparatus 400 as the fourth embodiment. 7, parts corresponding to those in FIGS. 3 and 4 are denoted by the same reference numerals, and detailed description thereof is omitted.
[0054]
A video camera device 400 shown in FIG. 7 has a camera unit 21, a digital signal processor 22, an output terminal 23, a system conversion unit 24, and an output terminal 25, similarly to the video camera device 200 shown in FIG. are doing.
[0055]
In addition, the video camera device 400 includes a signal generator 36 as in the video camera device 300 shown in FIG. From the signal generator 36, the clocks CK synchronized with each other as described above._HD, CK_REFEtc. are obtained. Clock CK corresponding to 525 / 59.94 television system output from signal generator 36₅₂₅, Horizontal sync signal H₅₂₅, Vertical synchronization signal V₅₂₅Are supplied to the camera unit 21, the digital signal processor 22, and the system conversion unit 24 for use. Further, a clock CK corresponding to the 1125 / 59.94 television system output from the signal generator 36._HD, Horizontal sync signal H_HD, Vertical synchronization signal V_HDIs supplied to the system conversion unit 24 for use.
[0056]
In the video camera device 400 shown in FIG. 7, as in the video camera device 200 shown in FIG. 3, the digital red, green, and blue colors constituting the video signal of the 525 / 59.94 television system by the digital signal processor 22 are used. Signal R₅₂₅, G₅₂₅, B₅₂₅Are formed and output to the output terminal 23, and the digital red, green and blue color signals R constituting the 1125 / 59.94 television system video signal by the system conversion unit 24 are formed._HD, G_HD, B_HDIs formed and led to the output terminal 25. In this case, the clock CK supplied from the signal generator 36 to the system conversion unit 24._HD, CK₅₂₅Since the synchronization is established as described above, the line number conversion process is satisfactorily performed in the system conversion unit 24.
[0057]
Next, FIG. 8 shows a configuration of a television system conversion apparatus 500 as the fifth embodiment. The television system conversion apparatus 500 is a digital red, green, and blue color signal that constitutes a 1125 / 59.94 television system video signal having 1125 lines per frame and a field frequency of 59.9400058 Hz. R_HD, G_HD, B_HDThe input terminal 51 for inputting the color signal R and the color signal R supplied to the input terminal 51_HD, G_HD, B_HDThe line number conversion process is performed on the digital red, green and blue color signals R corresponding to the 525 / 59.94 television system in which the number of lines per frame is 525 and the field frequency is 59.9400058 Hz.₅₂₅, G₅₂₅, B₅₂₅Conversion unit (down converter) 52 for obtaining the color signal R output from the conversion unit 52₅₂₅, G₅₂₅, B₅₂₅And an output terminal 53 for deriving. Here, the color signal R_HD, G_HD, B_HDThe number of samples per line is 2200, and the color signal R₅₂₅, G₅₂₅, B₅₂₅The number of samples in one line is 858.
[0058]
In addition, the television system conversion device 500 includes a clock CK corresponding to the 1125 / 59.94 television system used in the system conversion unit 52._HD, Horizontal sync signal H_HD, Vertical synchronization signal V_HDAnd a clock CK corresponding to the 525 / 59.94 television system used in the system conversion unit 52₅₂₅, Horizontal sync signal H₅₂₅, Vertical synchronization signal V₅₂₅A signal generator 54 for obtaining The signal generator 54 has a color signal R_HD, G_HD, B_HDIs the reference video signal SV_REFSupplied as The signal generator 54 is configured similarly to the signal generator 16 (see FIG. 2) in the video camera apparatus 100 shown in FIG. Therefore, the color signal R supplied from the signal generator 54 to the input terminal 51 as described above._HD, G_HD, B_HDAnd clocks CK synchronized to each other_HD, CK₅₂₅Etc. are obtained.
[0059]
The operation of the television conversion device 500 shown in FIG. 8 will be described. Digital red, green and blue color signals R constituting the 1125 / 59.94 television system video signal supplied to the input terminal 51_HD, G_HD, B_HDIs supplied to the system conversion unit 52 and undergoes line number conversion processing to form a digital red, green and blue color signal R constituting a video signal of the 525 / 59.94 television system.₅₂₅, G₅₂₅, B₅₂₅Is formed. Then, the color signal R output from the system conversion unit 52₅₂₅, G₅₂₅, B₅₂₅Is led to the output terminal 53. In this case, the clock CK supplied from the signal generator 54 to the system conversion unit 52_HD, CK₅₂₅Since the synchronization is established as described above, the line number conversion process is favorably performed in the system conversion unit 52.
[0060]
Next, FIG. 9 shows the configuration of a television conversion device 600 as a sixth embodiment. The television system conversion device 600 is a digital red, green, and blue color signal constituting a 525 / 59.94 television system video signal having 525 lines per frame and a field frequency of 59.9400058 Hz. R₅₂₅, G₅₂₅, B₅₂₅An input terminal 61 for inputting the color signal R and a color signal R supplied to the input terminal 61₅₂₅, G₅₂₅, B₅₂₅The line number conversion processing is performed on the digital red, green, and blue color signals R corresponding to the 1125 / 59.94 television system having 1125 lines per frame and a field frequency of 59.9400058 Hz._HD, G_HD, B_HDSystem conversion unit (upconverter) 62 for obtaining the color signal R output from the system conversion unit 62_HD, G_HD, B_HDAnd an output terminal 63 for deriving.
[0061]
In addition, the television system conversion device 600 includes a clock CK corresponding to the 525 / 59.94 television system used in the system conversion unit 62.₅₂₅, Horizontal sync signal H₅₂₅, Vertical synchronization signal V₅₂₅Clock CK compatible with 1125 / 59.94 television system_HD, Horizontal sync signal H_HD, Vertical synchronization signal V_HDA signal generator 64 for obtaining The signal generator 64 has a color signal R₅₂₅, G₅₂₅, B₅₂₅Is the reference video signal SV_REFSupplied as The signal generator 64 is configured similarly to the signal generator 16 (see FIG. 2) in the video camera apparatus 100 shown in FIG. Therefore, the color signal R supplied from the signal generator 64 to the input terminal 61 as described above.₅₂₅, G₅₂₅, B₅₂₅And clocks CK synchronized to each other₅₂₅, CK_HDEtc. are obtained.
[0062]
The operation of the television conversion device 600 shown in FIG. 9 will be described. Digital red, green and blue color signals R constituting a 525 / 59.94 television system video signal supplied to the input terminal 61₅₂₅, G₅₂₅, B₅₂₅Is supplied to the system conversion unit 62, the number of lines is converted, and the digital red, green and blue color signals R constituting the video signal of the 1125 / 59.94 television system are processed._HD, G_HD, B_HDIs formed. Then, the color signal R output from the system conversion unit 62_HD, G_HD, B_HDIs led to the output terminal 63. In this case, the clock CK supplied from the signal generator 64 to the system converter 62.₅₂₅, CK_HDSince the synchronization is established as described above, the line number conversion process is satisfactorily performed in the system conversion unit 62.
[0063]
In the above-described embodiment, the video signal that obtains the red, green, and blue color signals is shown. However, the video signal that obtains the luminance signal, the red difference signal, and the blue difference signal can be configured similarly. . In the first to fourth embodiments described above, the video camera devices 100 to 400 including the system conversion unit (down converter) 14 and the system conversion unit (up converter) 24 are shown. Also, a video recording / reproducing machine such as a video tape recorder in which the system converters 500 and 600 of the sixth embodiment are inserted in the input unit or output unit can be easily configured.
[0064]
【The invention's effect】
  This departureClearlyAccording to the above, the first and second clocks in the 1125 / 59.94 television system and the second clock in the 525 / 59.94 television system satisfy the predetermined formula relationship, and the first and The second clock is controlled so that it is synchronized.TargetThe first and second clocks can be synchronized with a simple configuration.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a video camera apparatus as a first embodiment.
FIG. 2 is a block diagram showing a configuration of a clock generation unit of the signal generator in the first embodiment.
FIG. 3 is a block diagram showing a configuration of a video camera apparatus as a second embodiment.
FIG. 4 is a block diagram showing a configuration of a video camera apparatus as a third embodiment.
FIG. 5 is a block diagram illustrating a configuration of a clock generation unit of a signal generator according to a third embodiment.
FIG. 6 is a block diagram showing another configuration of the clock generator of the signal generator in the third embodiment.
FIG. 7 is a block diagram showing a configuration of a video camera apparatus as a fourth embodiment.
FIG. 8 is a block diagram showing a configuration of a television system conversion apparatus as a fifth embodiment.
FIG. 9 is a block diagram showing a configuration of a television system conversion apparatus as a sixth embodiment.
[Explanation of symbols]
11, 21 Camera part
12,22 Digital signal processor
13, 15, 23, 25, 53, 63 Output terminal
14,52 System converter (down converter)
16, 36, 54, 64 Signal generator
17, 51, 61 Input terminal
24,62 system converter (upconverter)
100, 200, 300, 400 Video camera device
110, 310 clock generator
111,114 Voltage controlled oscillator
112, 113, 115, 116 Frequency divider
117, 121 phase comparator
118, 122 low pass filter
119 Sync separation circuit
120, 123, 124 selector switch
311,314 Fixed oscillator
500,600 Television conversion device

Claims (2)

A first voltage-controlled oscillator that outputs a first clock used in a 1125 / 59.94 television video signal processing system having 1125 lines per frame and a field frequency of 59.9400058 Hz ; ,
A second voltage-controlled oscillator that outputs a second clock used in a video signal processing system of 525 / 59.94 television system in which the number of lines in one frame is 525 and the field frequency is 59.9400058 Hz ; ,
First pre-stage frequency dividing means for dividing the first clock output from the first voltage controlled oscillator by 1/2200;
First rear stage frequency dividing means for dividing the output signal of the first front stage frequency dividing means by 1/15;
Second pre-stage frequency dividing means for dividing the second clock output from the second voltage controlled oscillator by 1/858;
Second post-stage frequency dividing means for frequency-dividing the output signal of the second pre-stage frequency dividing means by 1/7;
First phase comparison means for comparing phases of a signal having a 15-line period obtained from the first latter-stage frequency dividing means and a signal having a seven-line period obtained from the second latter-stage frequency dividing means;
When the reference video signal is the video signal of the 1125 / 59.94 television system, the signal of the line period output by the first pre-dividing means is selected, and the reference video signal is the 525 / 59.94. first selection means for selecting a signal line period output by the second pre-stage dividing unit when a video signal of a television system,
Second phase comparison means for comparing the phases of the signal of the line period selected by the first selection means and the horizontal synchronization signal separated from the reference video signal;
When the reference video signal is a video signal of the 1125 / 59.94 television system, the phase difference signal obtained by the first phase comparison means is supplied as a control signal to the second voltage controlled oscillator and the first 2 is supplied as a control signal to the first voltage controlled oscillator, and when the reference video signal is a video signal of the 525 / 59.94 television system, The phase difference signal obtained by the phase comparison means is supplied as a control signal to the first voltage controlled oscillator, and the phase difference signal obtained by the second phase comparison means is supplied as a control signal to the second voltage controlled oscillator. and a second selection means for,
Together to fit the phase of the 7 line period of the signal obtained by the signal and the second frequency-dividing the clock of the 15 line periods obtained by the division of the first clock frequency, the upper Symbol first clock synchronizer, characterized by and synchronized with the reference video signal a clock contact and the second clocks. The first voltage-controlled oscillator uses a 1125 / 59.94 television system video signal processing system with 1125 lines per frame and a field frequency of 59.9400058 Hz. Used in the processing system of the video signal of the 525 / 59.94 television system which is output from the clock and the second voltage controlled oscillator and has 525 lines per frame and the field frequency of 59.9400058 Hz. A clock synchronization method for synchronizing with a second clock,
A first pre-dividing step for dividing the first clock by 1/2200;
A first post-stage division step for dividing the signal obtained in the first pre-stage division step by 1/15;
A second previous division step for dividing the second clock by 1/858;
A second post-stage division step for dividing the signal obtained in the second pre-stage division step by 1/7;
A first phase comparing step of comparing the phase between the first subsequent frequency division signal 15 line cycle obtained in step and the second signal 7 line cycle resulting in the subsequent division step,
When the reference video signal is the video signal of the 1125 / 59.94 television system, the signal of the line period obtained in the first frequency division step is selected, and the reference video signal is the 525 / 59.94 television. a first selection step of selecting a signal line period obtained by the second pre-stage division step when a video signal of John scheme,
A second phase comparison step for comparing the phases of the signal of the line period selected in the first selection step and the horizontal synchronization signal separated from the reference video signal;
When the reference video signal is a video signal of the 1125 / 59.94 television system, the phase difference signal obtained in the first phase comparison step is supplied to the second voltage controlled oscillator as a control signal and the first 2 is supplied as a control signal to the first voltage-controlled oscillator, and when the reference video signal is a video signal of the 525 / 59.94 television system, The phase difference signal obtained in the phase comparison step is supplied as a control signal to the first voltage controlled oscillator, and the phase difference signal obtained in the second phase comparison step is supplied as a control signal to the second voltage controlled oscillator. And a second selection step ,
Together to fit the phase of the 7 line period of the signal obtained by the signal and the second frequency-dividing the clock of the 15 line periods obtained by the division of the first clock frequency, the upper Symbol first clock synchronization method characterized in that the clock contact and the second clock to and synchronized with the reference video signal.

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