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JP3701626B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
JP3701626B2
JP3701626B2 JP2002127388A JP2002127388A JP3701626B2 JP 3701626 B2 JP3701626 B2 JP 3701626B2 JP 2002127388 A JP2002127388 A JP 2002127388A JP 2002127388 A JP2002127388 A JP 2002127388A JP 3701626 B2 JP3701626 B2 JP 3701626B2
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Prior art keywords
film
gas
electrode
forming
insulating film
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JP2002127388A
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JP2003234346A (en
Inventor
喜美 塩谷
裕子 西本
智美 鈴木
和夫 前田
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キヤノン販売株式会社
株式会社半導体プロセス研究所
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Priority to JP2002127388A priority Critical patent/JP3701626B2/en
Priority to US10/287,549 priority patent/US6780790B2/en
Priority to TW091132588A priority patent/TWI274380B/en
Priority to EP02024920A priority patent/EP1321976A3/en
Priority to KR1020020073587A priority patent/KR100546958B1/en
Publication of JP2003234346A publication Critical patent/JP2003234346A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/308—Oxynitrides
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    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/401—Oxides containing silicon
    • C—CHEMISTRY; METALLURGY
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45557—Pulsed pressure or control pressure
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
    • H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H01L21/31633—Deposition of carbon doped silicon oxide, e.g. SiOC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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    • H01L21/02107—Forming insulating materials on a substrate
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Description

【０００１】
【発明の属する技術分野】
本発明は、半導体装置の製造方法に関し、より詳しくは、プラズマＣＶＤ法により銅配線を被覆するバリア絶縁膜を形成する半導体装置の製造方法に関する。
【０００２】
【従来の技術】
近年、半導体集積回路装置の高集積度化、高密度化とともに、データ転送速度の高速化が要求されている。このため、ＲＣディレイの小さい低誘電率を有する絶縁膜（以下、低誘電率絶縁膜と称する。）が用いられている。
【０００３】
一方、配線材料に関して、従来のアルミニウム（Ａｌ）から電気抵抗の低い銅（Ｃｕ）配線に変わりつつある。
【０００４】
このため、銅配線上に層間絶縁膜として低誘電率絶縁膜を形成しているが、銅配線を形成した後、低誘電率絶縁膜を形成する際又はその後の工程で、４００℃乃至４５０℃程度のアニールが行われる。また、デバイスの動作中には層間絶縁膜に高い電界がかかる。従って、熱や電界による低誘電率絶縁膜への銅の拡散を防止するため、低誘電率絶縁膜と銅配線の間にバリア絶縁膜を挟んでいる。
【０００５】
【発明が解決しようとする課題】
しかしながら、バリア絶縁膜は緻密ではあるが、比誘電率が高い。なかでも、SiC系のバリア絶縁膜は比誘電率が５程度と比較的低いが、比誘電率２．８、膜厚５００ｎｍの低誘電率絶縁膜に対して比誘電率５のバリア絶縁膜の膜厚を１００ｎｍとした場合、層間絶縁膜全体の比誘電率は３．０２と大きくなってしまう。
【０００６】
このため、バリア絶縁膜の膜厚を５０ｎｍ程度に薄くすることが試みられているが、銅の拡散防止能力が低下してしまう。
【０００７】
本発明は、上記の従来例の問題点に鑑みて創作されたものであり、銅の拡散を防止できる緻密性を維持しつつ、さらに低い比誘電率のバリア絶縁膜を形成することができる半導体装置の製造方法を提供するものである。
【０００８】
【課題を解決するための手段】
上記課題を解決するため、第１の発明は、半導体装置の製造方法に係り、第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、アルキル化合物と、酸素含有ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程の少なくとも初期に、前記成膜ガスにアンモニアガス又は窒素ガスを加えることを特徴とし、
第２の発明は、半導体装置の製造方法に係り、第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、アルキル化合物と、酸素含有ガスと、Ｈｅ又はＡｒのうち少なくとも何れか一からなる希釈ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、
前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程の少なくとも初期に前記希釈ガスの流量を増やすことを特徴とし、
第３の発明は、第２の発明の半導体装置の製造方法に係り、前記希釈ガスはＨｅであり、前記シリコン含有有機化合物に対するその流量比は８以上であることを特徴とし、
第４の発明は、半導体装置の製造方法に係り、第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、アルキル化合物と、酸素含有ガスと、Ｈｅからなる希釈ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、前記アルキル化合物に対する前記希釈ガスの流量比は８以上であることを特徴とし、
第５の発明は、半導体装置の製造方法に係り、第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、アルキル化合物と、酸素含有ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、前記バリア絶縁膜を成膜する工程において、成膜ガスの圧力を低い圧力から１Torrまで徐々に上昇させながら成膜することを特徴とし、
第６の発明は、半導体装置の製造方法に係り、第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、アルキル化合物と、酸素含有ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程において、成膜初期から途中まではガス圧力を１Torr以下に保持して成膜し、途中から前記バリア絶縁膜の成膜が終了するまで前記ガス圧力を１Torrよりも高い圧力にして成膜することを特徴とし、
第７の発明は、半導体装置の製造方法に係り、第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、アルキル化合物と、酸素含有ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、前記第１及び第２の電極のうち何れか一に高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記基板表面を覆うバリア絶縁膜を形成する工程の初期だけ、前記第１及び第２の電極のうち何れか一に高周波電力を供給するほかに、他方の前記電極に周波数５０ｋＨｚ以上、１ＭＨｚ未満の低周波電力を供給することを特徴とし、
第８の発明は、第１乃至第７の発明の何れか一の半導体装置の製造方法に係り、前記アルキル化合物は、ヘキサメチルジシロキサン（ＨＭＤＳＯ：(CH3)3Si-O-Si(CH3)3）、オクタメチルシクロテトラシロキサン（ＯＭＣＴＳ：
【０００９】
【化４】

Figure 0003701626
【００１０】
）、テトラメチルシクロテトラシロキサン（ＴＭＣＴＳ：
【００１１】
【化５】
Figure 0003701626
【００１２】
）、又はオクタメチルトリシロキサン（ＯＭＴＳ：
【００１３】
【化６】
Figure 0003701626
【００１４】
）のうち何れか一であることを特徴とし、
第９の発明は、第１乃至第７の発明の何れか一の半導体装置の製造方法に係り、前記アルキル化合物は、モノメチルシラン（SiH3(CH3)）、ジメチルシラン（SiH2(CH3)2）、トリメチルシラン（SiH(CH3) 3）、又はテトラメチルシラン（Si(CH3) 4）のうち何れか一であるメチルシランのうち何れか一であることを特徴とし、
第１０の発明は、第１乃至第７の発明の何れか一の半導体装置の製造方法に係り、前記アルキル化合物は、Ｏ−Ｓｉ−Ｏ結合を有する化合物であることを特徴とし、
第１１の発明は、第１０の発明の半導体装置の製造方法に係り、前記Ｏ−Ｓｉ−Ｏ結合を有する化合物は、CH3-O-Si(CH3) 2-O-CH3であることを特徴とし、
第１２の発明は、第１乃至第７の発明の何れか一の半導体装置の製造方法に係り、前記酸素含有ガスは、Ｏ2、Ｎ2Ｏ、Ｈ2Ｏ又はＣＯ2のうち何れか一であることを特徴とし、
第１３の発明は、第１２の発明の半導体装置の製造方法に係り、前記酸素含有ガスはＮ2Ｏであり、アルキル化合物に対するその流量比は８以下であることを特徴とし、
第１４の発明は、第１乃至第１３の発明の何れか一の半導体装置の製造方法に係り、前記成膜ガスは、ハイドロカーボンを含むことを特徴とし、
第１５の発明は、第１４の発明の半導体装置の製造方法に係り、前記ハイドロカーボンは、メタン（ＣＨ4）、アセチレン（Ｃ2Ｈ2）、又はエチレン（Ｃ2Ｈ4）のうち何れか一であることを特徴としている。
【００１５】
以下に、上記本発明の構成に基づく作用について説明する。
【００１６】
この発明では、アルキル化合物と、酸素含有ガスとを含む成膜ガスを第１の電極と第２の電極の間に供給し、ガス圧力を１Ｔｏｒｒ以下に調整し、その後、第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して成膜ガスをプラズマ化し、反応させて銅配線を被覆するバリア絶縁膜を形成している。
【００１７】
高周波電力のみでプラズマ化した成膜ガスを用いることにより、低い比誘電率を達成できるとともに、少なくとも成膜初期に成膜ガスの圧力を１Torr以下にすることにより銅の拡散を防止し得るに十分な絶縁膜の緻密性を維持することができる。
【００１８】
低い比誘電率を維持しつつ、緻密性を向上させるために、この発明では、さらに、成膜ガスの圧力を低い圧力から１Ｔｏｒｒまで徐々に上昇させながら成膜し、又はアンモニア（ＮＨ3）や窒素（Ｎ2）を少なくとも成膜初期に成膜ガスに加え、又はＨｅ或いはＡｒのうち少なくとも何れか一からなる希釈ガスを含む成膜ガスを用い、或いは少なくとも成膜初期に希釈ガスの流量を増大させて用い、また、成膜初期に低周波のバイアス電力を印加している。
【００１９】
また、バリア絶縁膜上に形成した低い比誘電率の絶縁膜のエッチング材に対するエッチング選択性を高めるためにさらにハイドロカーボンを加えている。
【００２０】
以上のように、本発明によれば、銅の拡散を防止するのに十分な緻密性を維持しつつ、さらに低い比誘電率のバリア絶縁膜を形成することができる。
【００２１】
【発明の実施の形態】
以下に、本発明の実施の形態について図面を参照しながら説明する。
（本発明の実施の形態である成膜方法に用いるプラズマＣＶＤ装置の説明）
図１は、本発明の実施の形態に係る半導体装置の製造方法に用いられる平行平板型のプラズマＣＶＤ装置１０１の構成を示す側面図である。
このプラズマＣＶＤ装置１０１は、プラズマガスにより被成膜基板２１上にバリア絶縁膜を形成する場所である成膜部１０１Ａと、成膜ガスを構成する複数のガスの供給源を有する成膜ガス供給部１０１Ｂとから構成されている。
【００２２】
成膜部１０１Ａは、図１に示すように、減圧可能なチャンバ１を備え、チャンバ１は排気配管４を通して排気装置６と接続されている。排気配管４の途中にはチャンバ１と排気装置６の間の導通／非導通を制御する開閉バルブ５が設けられている。チャンバ１にはチャンバ１内の圧力を監視する不図示の真空計などの圧力計測手段が設けられている。
【００２３】
チャンバ１内には対向する一対の上部電極（第１の電極）２と下部電極（第２の電極）３とが備えられ、上部電極２に周波数１３．５６ＭＨｚの高周波電力を供給する高周波電力供給電源（ＲＦ電源）７が接続され、下部電極３に周波数３８０ｋＨｚの低周波電力を供給する低周波電力供給電源８が接続されている。これらの電源７、８のうち少なくとも高周波電力供給電源７から上部電極２に高周波電力を供給して、成膜ガスをプラズマ化する。上部電極２、下部電極３及び電源７、８が成膜ガスをプラズマ化するプラズマ生成手段を構成する。
【００２４】
なお、下部電極３には、周波数３８０ｋＨｚのみならず、周波数５０ｋＨｚ乃至１ＭＨｚの低周波電力を印加することができるし、また、下部電極３に対向する上部電極２には、周波数１３．５６ＭＨｚのみならず、周波数１ＭＨｚ以上の高周波電力を印加してもよい。さらに、図１では上部電極２に高周波電源が接続され、下部電極３に低周波電源が接続されているが、高周波電源７は上部電極２に限らず、上部電極２又は下部電極３の何れか一に接続され、かつ低周波電源８は下部電極３に限らず、他の電極に接続されていれば、この発明の目的を達成することができる。
【００２５】
上部電極２は成膜ガスの分散具を兼ねている。上部電極２には複数の貫通孔が形成され、下部電極３との対向面における貫通孔の開口部が成膜ガスの放出口（導入口）となる。この成膜ガスの放出口は成膜ガス供給部１０１Ｂと配管９ａで接続されている。また、場合により、上部電極２には図示しないヒータが備えられることもある。成膜中に上部電極２を温度凡そ１００℃程度に加熱しておくことにより、成膜ガスの反応生成物からなるパーティクルが上部電極２に付着するのを防止するためである。
【００２６】
下部電極３は被成膜基板２１の保持台を兼ね、また、保持台上の被成膜基板２１を加熱するヒータ１２を備えている。
【００２７】
成膜ガス供給部１０１Ｂには、ヘキサメチルジシロキサン（ＨＭＤＳＯ：(CH3) 3Si-O-Si(CH3)3）等のシロキサン結合を有するアルキル化合物の供給源と、一般式SiHn(CH3)4-n（ｎ＝０乃至３）で表されるメチルシランの供給源と、Ｏ−Ｓｉ−Ｏ結合を有するアルキル化合物の供給源と、メタン（ＣＨ4）、アセチレン（Ｃ2H2）やエチレン（Ｃ2H4）などのハイドロカーボン（ＣmＨn）の供給源と、酸素（Ｏ2）、一酸化二窒素（Ｎ2Ｏ）、水（Ｈ2Ｏ）、二酸化炭素（ＣＯ2）の酸素含有ガスの供給源と、アンモニア（ＮＨ3）の供給源と、Ｈｅ又はＡｒ（不活性ガス）のうち少なくとも何れか一からなる希釈ガスの供給源と、同じく不活性ガスである窒素（Ｎ2）の供給源とが設けられている。
【００２８】
これらのガスは適宜分岐配管９ｂ乃至９ｉ及びこれらすべての分岐配管９ｂ乃至９ｉが接続された配管９ａを通して成膜部１０１Ａのチャンバ１内に供給される。分岐配管９ｂ乃至９ｉの途中に流量調整手段１１ａ乃至１１ｈや、分岐配管９ｂ乃至９ｉの導通／非導通を制御する開閉手段１０ｂ乃至１０ｎ，１０ｐ乃至１０ｒが設置され、配管９ａの途中に配管９ａの閉鎖／導通を行う開閉手段１０ａが設置されている。また、Ｎ2ガスを流通させて分岐配管９ｂ乃至９ｇ内の残留ガスをパージするため、Ｎ2ガスの供給源と接続された分岐配管９ｉとその他の分岐配管９ｂ乃至９ｇの間の導通／非導通を制御する開閉手段１０ｓ乃至１０ｘが設置されている。なお、Ｎ2ガスは、分岐配管９ｂ乃至９ｇ内のほかに、配管９ａ内及びチャンバ１内の残留ガスをパージするために用いる。また、Ｎ2ガスは成膜ガスとして用いる。
【００２９】
以上のような成膜装置１０１によれば、ヘキサメチルジシロキサン（ＨＭＤＳＯ）等のシロキサン結合を有するアルキル化合物の供給源と、一般式SiHn(CH3)4-n（ｎ＝０乃至３）で表されるメチルシランの供給源と、Ｏ−Ｓｉ−Ｏ結合を有するアルキル化合物の供給源と、ハイドロカーボン（ＣmＨn）の供給源と、酸素（Ｏ2）、一酸化二窒素（Ｎ2Ｏ）、水（Ｈ2Ｏ）、二酸化炭素（ＣＯ2）の酸素含有ガスの供給源と、アンモニア（ＮＨ3）の供給源と、Ｈｅ又はＡｒ（不活性ガス）のうち少なくとも何れか一からなる希釈ガスの供給源と、同じく不活性ガスである窒素（Ｎ2）の供給源とを備え、さらに成膜ガスをプラズマ化するプラズマ生成手段２、３、７、８を備えている。
【００３０】
これにより、以下に説明するプラズマＣＶＤ法により、低誘電率を有し、かつ緻密で、銅の拡散を抑制し得るバリア絶縁膜を形成することができる。
【００３１】
次に、本発明に用いるバリア絶縁膜の成膜ガスである、シロキサン結合を有するアルキル化合物、メチルシラン、Ｏ−Ｓｉ−Ｏ結合を有するアルキル化合物などのアルキル化合物、及びハイドロカーボンについて説明する。
【００３２】
代表例として以下に示すものを用いることができる。
【００３３】
（ｉ）シロキサン結合を有するアルキル化合物
ヘキサメチルジシロキサン（ＨＭＤＳＯ：(CH3)3Si-O-Si(CH3)3）
オクタメチルシクロテトラシロキサン（ＯＭＣＴＳ）
構造式
【００３４】
【化７】
Figure 0003701626
【００３５】
テトラメチルシクロテトラシロキサン（ＴＭＣＴＳ）
構造式
【００３６】
【化８】
Figure 0003701626
【００３７】
オクタメチルトリシロキサン（ＯＭＴＳ）
構造式
【００３８】
【化９】
Figure 0003701626
【００３９】
（ii）メチルシラン（SiHn(CH3)4-n:ｎ＝０乃至３）
モノメチルシラン（SiH3(CH3)）
ジメチルシラン（SiH2(CH3)2）
トリメチルシラン（SiH(CH3)3）
テトラメチルシラン（Si(CH3)4）
（iii）Ｏ−Ｓｉ−Ｏ結合を有するアルキル化合物
CH3-O-Si(CH3)2 -O-CH3の構造式を有する化合物
（ｉｖ）ハイドロカーボン（ＣmＨn）
メタン（ＣＨ4）
アセチレン（Ｃ2Ｈ2）
エチレン（Ｃ2Ｈ4）
（本発明の実施の形態である成膜方法の説明）
次に、この発明の実施の形態である、特に有効なガスの組み合わせや、有効な成膜条件の組み合わせを用いた成膜方法について、図２（ａ）、（ｂ）、図３（ａ）、（ｂ）及び図４（ａ）乃至（ｆ）を参照して説明する。
【００４０】
これらの図面は、成膜ガスを構成する各ガスのチャンバ１内への導入のタイミング、成膜の際のガス流量やガス圧力の条件、及び成膜の際に平行平板型の２つの電極に印加する高周波電力又は低周波電力の印加方法について示すチャートである。
【００４１】
そのうち、図２（ａ）乃至（ｃ）、図３（ａ）、（ｂ）は、少なくともアルキル化合物と、酸素含有ガスとから構成される成膜ガスによりシリコン含有絶縁膜を成膜する方法のチャートである。
【００４２】
図２（ａ）では、チャンバ１内に導入した成膜ガスの圧力を１Ｔｏｒｒ以下に調整し、上部電極２又は下部電極３の何れか一に高周波電力を印加して成膜ガスをプラズマ化する。図２（ｂ）では、図２（ａ）に対して成膜ガスの圧力を低い圧力から１Ｔｏｒｒまで徐々に上昇させながら成膜することが異なる。図２（ｃ）では、図２（ａ）に対してチャンバ１内に導入した成膜ガスの圧力を、成膜初期の一定の期間だけ１Ｔｏｒｒ以下に調整し、一定の期間を経過後に１Ｔｏｒｒよりも高い圧力に調整することが異なる。図３（ａ）では、図２（ａ）に対して上部電極２又は下部電極３の何れか一に高周波電力を印加するほかに、さらに成膜初期の一定の期間だけ他の電極に低周波電力を印加することが異なる。図３（ｂ）では、図２（ａ）に対して成膜ガスのうち酸素含有ガスの流量を、成膜初期の一定の期間だけ多くし、一定期間の経過後に少くすることが異なる。
【００４３】
また、以下に説明する図４（ａ）乃至図４（ｆ）では、図中に示すガスを他のガスに添加して用いることを前提として、当該ガスの添加条件のみを記載している。
【００４４】
図４（ａ）乃至（ｃ）は、希釈ガスを含む成膜ガスにより成膜する場合のチャートである。
【００４５】
図４（ａ）では、通常の流量の希釈ガスを加えている。図４（ｂ）では、図４（ａ）に対して希釈ガスの流量を多くしていることが異なる。図４（ｃ）では、図４（ａ）に対して希釈ガスの流量を、成膜初期の一定の期間だけ多くし、一定期間の経過後に少くすることが異なる。
【００４６】
図４（ｄ）、（ｅ）は、アンモニアガス又は窒素ガスのうちの少なくとも何れか一を含む成膜ガスにより成膜する場合のチャートである。
【００４７】
図４（ｄ）では、成膜中の全期間を通してアンモニアガス又は窒素ガスを加えている。図４（ｅ）では、図４（ｄ）に対してアンモニアガス又は窒素ガスのうちの少なくとも何れか一を成膜初期の一定の期間だけ供給することが異なる。
図４（ａ）乃至図４（ｆ）と他のガスとの組み合わせの方法は以下の（イ）乃至（ハ）である。（イ）図２（ｂ）、図３（ａ）又は図３（ｂ）と，図４（ａ）乃至図４（ｆ）の何れか一とを組み合わせることができる。また、（ロ）図２（ｂ）、図３（ａ）又は図３（ｂ）と、図４（ａ）乃至図４（ｃ）の何れか一とを組み合わせたものと、図４（ｄ）乃至図４（ｅ）の何れか一とを組み合わせることができる。さらに、（ハ）（ロ）の各組み合わせと、図４（ｆ）とを組み合わせることができる。
【００４８】
高周波電力のみでプラズマ化した成膜ガスを用いることにより、低い比誘電率を達成できるとともに、少なくとも成膜初期に成膜ガスの圧力を１Torr以下にすることにより銅の拡散を防止し得るに十分な絶縁膜の緻密性を維持することができる。
【００４９】
また、成膜ガスの圧力を低い圧力から１Ｔｏｒｒまで徐々に上昇させながら成膜することにより、銅膜を主とする配線又は電極により近い部分では緻密な膜が得られ、遠くなるにつれて低誘電率の膜が得られる。
【００５０】
さらに、アンモニア（ＮＨ3）や窒素（Ｎ2）を少なくとも成膜初期に成膜ガスに加え、又はＨｅからなる希釈ガスを含む成膜ガスを用い、或いは少なくとも成膜初期に希釈ガスの流量を増大させて用い、また、成膜初期に低周波のバイアス電力を印加することにより、緻密性を向上させることができる。
【００５１】
また、ハイドロカーボンを加えることにより、バリア絶縁膜の上に形成した低誘電率膜のエッチング材に対するエッチング耐性を向上させることができる。
【００５２】
以上のように、上記のチャートにしたがってこの発明が適用されるプラズマＣＶＤ法により成膜することで、銅の拡散を十分に阻止できる程度に緻密で、かつ低い比誘電率を有するバリア絶縁膜を形成することができる。
【００５３】
次に、上記プラズマＣＶＤ装置を用いてこの発明が適用される半導体装置の製造方法により種々の成膜条件で形成されたシリコン含有絶縁膜の比誘電率及びリーク電流を調査した結果について説明する。
【００５４】
（１）第１実施例
試料は、成膜前処理により銅膜の表面酸化膜を除去した後、銅膜の上にシリコン含有絶縁膜を形成した。シリコン含有絶縁膜は、プラズマＣＶＤ法により以下の成膜条件で形成された。
【００５５】
（成膜前処理）
（ｉ）処理ガス：ＮＨ3
ガス流量：５００sccm
ガス圧力：１Torr
（ii）プラズマ化条件：
周波数：１３．５６ＭＨｚ
電力：１００Ｗ
時間：１０秒
（iii）基板加熱温度：３７５℃
（成膜条件Ｉ）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：４００ sccm
Ｈｅ流量：４００ sccm
ガス圧力：１Torr
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜
膜厚：１００ｎｍ
比誘電率：２．８９
（アニール条件）
温度：４５０℃
処理期間：４時間
比誘電率の測定では、電極面積０．０２２６ｃｍ2を有する水銀プローブをシリコン含有絶縁膜の表面に接触させ、直流バイアス電圧に１ＭＨｚの小信号電圧を重畳して水銀プローブに印加した。比誘電率は測定されたＣ−Ｖ特性から換算して求めた。
【００５６】
また、リーク電流及び絶縁破壊耐性の測定では、銅膜を接地するとともに、水銀プローブに負の電圧を印加する。
【００５７】
リーク電流及び絶縁破壊耐性を測定した結果を図５及び図６に示す。図５及び図６は上記試料について、シリコン含有絶縁膜を挟む水銀プローブと銅膜との間に流れるリーク電流及び絶縁破壊耐性を調査したグラフである。図５はシリコン含有絶縁膜の成膜直後に調査した結果で、図６はシリコン含有絶縁膜の成膜後、かつ上記の条件でアニールした後に調査した結果である。
【００５８】
図５の縦軸は対数目盛で表したリーク電流密度（Ａ／ｃｍ2）を示し、横軸は線形目盛で表したシリコン含有絶縁膜にかかる電界強度（ＭＶ／ｃｍ）を示す。なお、横軸の負の符号は負の電位を加えることを表している。図６も同様である。
【００５９】
図５及び図６に示すように、リーク電流は−１ＭＶ／ｃｍのとき１０-10Ａ／ｃｍ2に近く、電界強度の全測定範囲においてアニール後でもアニール前に比べてほとんど変動がなかった。
【００６０】
図中、電界強度が−４ＭＶ／ｃｍ乃至−５ＭＶ／ｃｍの間でリーク電流が急激に立ち上がっているのは、電界によるシリコン含有絶縁膜の絶縁破壊が起こっていることを表している。アニール後に絶縁破壊が起こる電界強度が多少下がっているが、その電界強度は−４ＭＶ／ｃｍ以上であり、絶縁膜自体の絶縁破壊耐性に近く、銅の拡散が抑制されていることを示している。
【００６１】
なお、上記では、アルキル化合物としてシロキサン結合を有するＨＭＤＳＯを用いているが、上記した他のシロキサン結合を有するアルキル化合物、例えばシロキサン結合を有するオクタメチルシクロテトラシロキサン（ＯＭＣＴＳ）又はテトラメチルシクロテトラシロキサン（ＴＭＣＴＳ）又はオクタメチルトリシロキサン（ＯＭＴＳ）や、メチルシラン（SiHn(CH3)4-n:ｎ＝０乃至３）や、Ｏ−Ｓｉ−Ｏ結合を有するアルキル化合物を用いることも可能である。
【００６２】
（２）第２実施例
試料は、第1実施例と同じく成膜前処理により銅膜の表面酸化膜を除去した後、銅膜の上にシリコン含有絶縁膜を形成した。シリコン含有絶縁膜は、プラズマＣＶＤ法により以下の成膜条件で形成された。
【００６３】
試料は、シリコン含有絶縁膜は、プラズマＣＶＤ法により以下の成膜条件で形成された。なお、成膜前処理条件及びアニール条件は第1実施例と同じである。
【００６４】
（成膜条件II）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：４００ sccm
Ｈｅ流量：４００ sccm
ガス圧力：０．５Torr
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜
膜厚：１００ｎｍ
比誘電率：３．４７
比誘電率とリーク電流の測定は第１実施例と同じように行った。
【００６５】
測定結果によれば比誘電率は上記したように３．４７であった。
【００６６】
次に、リーク電流を測定した結果を図７及び図８に示す。図７及び図８は上記試料について、シリコン含有絶縁膜を挟む水銀プローブと銅膜との間に流れるリーク電流を調査したグラフである。図７はシリコン含有絶縁膜の成膜直後に調査した結果で、図８はシリコン含有絶縁膜の成膜後、かつアニール後に調査した結果である。
【００６７】
図７の縦軸は対数目盛で表したリーク電流密度（Ａ／ｃｍ2）を示し、横軸は線形目盛で表したシリコン含有絶縁膜にかかる電界強度（ＭＶ／ｃｍ）を示す。図８も同様である。
【００６８】
図７及び図８に示すように、リーク電流は成膜直後に電界強度−１ＭＶ／ｃｍのとき１０-9Ａ／ｃｍ2以下で、電界強度の全測定範囲においてアニール後でもアニール前に比べてほとんど変動がなかった。
【００６９】
また、シリコン含有絶縁膜の絶縁破壊が起こる電界強度も−４ＭＶ／ｃｍ乃至−５ＭＶ／ｃｍの間にあり、第１実施例と同様に銅の拡散が抑制されていることを示している。
【００７０】
（３）第３実施例
試料は、第１実施例と同じく成膜前処理により銅膜の表面酸化膜を除去した後、銅膜の上にシリコン含有絶縁膜を形成した。シリコン含有絶縁膜は、プラズマＣＶＤ法により以下の成膜条件で形成された。
【００７１】
（成膜条件III）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：４００ sccm
Ｈｅ流量：４００ sccm
ＮＨ3流量：２００ sccm
ガス圧力：１．０Torr
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜
膜厚：１００ｎｍ
比誘電率：３．７
比誘電率とリーク電流の測定は第１実施例と同じように行った。
【００７２】
測定結果によれば、比誘電率は上記したように３．７であった。
【００７３】
次に、リーク電流を測定した結果を図９及び図１０に示す。図９及び図１０は上記試料について、シリコン含有絶縁膜を挟む水銀プローブと銅膜との間に流れるリーク電流を調査したグラフである。図９はシリコン含有絶縁膜の成膜直後に調査した結果で、図１０はシリコン含有絶縁膜の成膜後、かつアニール後に調査した結果である。
【００７４】
図９の縦軸は対数目盛で表したリーク電流密度（Ａ／ｃｍ2）を示し、横軸は線形目盛で表したシリコン含有絶縁膜にかかる電界強度（ＭＶ／ｃｍ）を示す。図１０も同様である。
【００７５】
図９及び図１０に示すように、リーク電流は成膜直後に電界強度−１ＭＶ／ｃｍのとき１０-9Ａ／ｃｍ2で、アニール後に−４ＭＶ／ｃｍの前後で多少減少した以外アニール前に比べてほとんど変動がなかった。
【００７６】
また、シリコン含有絶縁膜の絶縁破壊が起こる電界強度も−４ＭＶ／ｃｍ乃至−５ＭＶ／ｃｍの間にあり、第１及び第２実施例と同様に銅の拡散が抑制されていることを示している。
【００７７】
（４）第４実施例
図１１及び図１２を参照して本発明の第４実施例について説明する。
【００７８】
図１１は成膜ガスのガス圧力（Ｐ）に対する成膜した絶縁膜の比誘電率（ｋ）の変化の様子と、それらのガス圧力（Ｐ）及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。また、図１２は成膜した絶縁膜の銅に対するバリア性について示すグラフである。
【００７９】
まず、この調査に用いた試料Ｓ１乃至Ｓ４の作成条件について説明する。成膜前処理条件と成膜後のアニール条件は第1実施例と同じである。成膜条件は以下の通りである。
（成膜条件IV）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：４００ sccm
ガス圧力：パラメータ（0.5、0.75、1.0、1.5 Torr、それぞれ試料Ｓ１乃至４に対応）
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜
膜厚：１００ｎｍ
比誘電率：図１１を参照。
比誘電率の測定はアニール前に第１実施例と同じように行った。また、絶縁破壊耐性の測定は第１実施例のリーク電流の測定方法と同じ方法に従って行った。また、成膜した絶縁膜の銅に対するバリア性の調査はＳＩＭＳ（Secondary Ion Mass Spectroscopy）により行った。
【００８０】
図１１は成膜ガスのガス圧力（Ｐ）に対する成膜した絶縁膜の比誘電率（ｋ）の変化の様子と、それらのガス圧力（Ｐ）及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【００８１】
図１１において、縦軸は線形目盛で表した比誘電率（ｋ）を示し、横軸は線形目盛で表した成膜ガスのガス圧力（ｐ）（Torr）を示す。また、測定点を○印で示す。この場合、○印の中の●印はアニール後の絶縁破壊耐性試験で測定数５個に対して５個とも破壊しなかったことを示し、同じく×印は測定数５個に対して全数破壊したことを示す。また、△印は測定数５個に対して１個乃至２個破壊したことを示す。なお、絶縁膜への電圧印加の初期から絶縁膜に電流が流れたものを破壊とし、絶縁耐圧がアニール後に低下したが、ある程度の大きさを有している試料は破壊としなかった。このことは以下の第５乃至第１０実施例でも同じである。
【００８２】
図１１に示す結果によれば、ガス圧力（Ｐ）が大きくなるにつれて比誘電率（ｋ）が低下する。そして、ガス圧力（Ｐ）が１．０Torr以下で絶縁破壊耐性を有し、１．５Torrで絶縁破壊耐性がなくなった。
【００８３】
また、図１２は成膜した絶縁膜の銅に対するバリア性の調査結果について示すグラフである。アニール前後の絶縁膜中の銅の分布をＳＩＭＳにより調査したものである。
【００８４】
図１２において、縦軸は対数目盛で表した絶縁膜中の銅の濃度（任意単位）を示し、横軸は線形目盛で表した絶縁膜表面から測った絶縁膜中の測定箇所（ｎｍ）を示す。
【００８５】
図１２に示す結果によれば、何れの試料Ｓ１乃至Ｓ４もアニール前から絶縁膜中に銅が含まれているが、これは絶縁膜の成膜時に銅が混入したものと考えられる。従って、この図１２からはアニール前後での絶縁膜中の銅の含有量の変化を観察することが重要である。
【００８６】
この観点から観察すると、特に、試料Ｓ３に関し、絶縁破壊耐性試験では破壊したものはなかったが、絶縁膜中への銅の拡散が見られた。一方、試料Ｓ１、Ｓ２ではアニール後でも銅の拡散がほとんど見られなかった。即ち、試料Ｓ１、Ｓ２はバリア性を有することを示している。
【００８７】
（５）第５実施例
図１３を参照して本発明の第５実施例について説明する。
【００８８】
図１３は成膜ガス中のＮ2Ｏガス流量に対する成膜した絶縁膜の比誘電率（ｋ）の変化の様子と、Ｎ2Ｏガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【００８９】
まず、この調査に用いた試料Ｓ５乃至Ｓ９の作成条件について説明する。成膜前処理条件及びアニール条件は第1実施例と同じである。成膜条件は以下の通り。
（成膜条件Ｖ）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：パラメータ
（１００、２００、４００、６００、８００ sccmとし、それぞれ試料Ｓ５乃至９に対応する。）
Ｈｅ流量：４００ sccm
ガス圧力（Ｐ）：１ Torr
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜
膜厚：１００ｎｍ
比誘電率：図１３を参照。
比誘電率の測定はアニール前に第１実施例と同じように行った。また、絶縁破壊耐性の測定は第１実施例のリーク電流の測定方法と同じ方法に従って行った。
【００９０】
図１３は成膜ガスのＮ2Ｏガス流量（sccm）に対する成膜した絶縁膜の比誘電率（ｋ）の変化の様子と、それらのＮ2Ｏガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。図１３において、縦軸は線形目盛で表した比誘電率（ｋ）を示し、横軸は線形目盛で表した成膜ガス中のＮ2Ｏガス流量（sccm）を示す。
【００９１】
図１３に示す結果によれば、Ｎ2Ｏガス流量が大きくなるにつれて比誘電率（ｋ）が低下し、およそ４００sccmより大きくなるとＮ2Ｏガス流量が大きくなるにつれて逆に比誘電率（ｋ）が増大する。そして、Ｎ2Ｏガス流量が４００sccm以下で絶縁破壊耐性を有し、６００sccmで絶縁破壊耐性がなくなった。
【００９２】
（６）第６実施例
図１４を参照して本発明の第６実施例について説明する。
【００９３】
図１４は成膜ガスのＨｅガス流量に対する成膜した絶縁膜の比誘電率（ｋ）の変化の様子と、Ｈｅガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【００９４】
まず、この調査に用いた試料Ｓ１０乃至Ｓ１４の作成条件について説明する。成膜前処理条件及びアニール条件は第1実施例と同じである。成膜条件は以下の通り。
（成膜条件VI）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：４００ sccm
Ｈｅ流量：パラメータ（１００、２００、４００、６００、８００ sccm、 それぞれ試料Ｓ１０乃至１４に対応）
ガス圧力（Ｐ）：１ Torr
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜
膜厚：１００ｎｍ
比誘電率：図１４を参照。
比誘電率の測定はアニール前に第１実施例と同じように行った。また、絶縁破壊耐性の測定は第１実施例のリーク電流の測定方法と同じ方法に従って行った。
【００９５】
図１４は成膜ガス中のＨｅガス流量に対する成膜した絶縁膜の比誘電率（ｋ）の変化の様子と、それらのＨｅガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【００９６】
図１４において、縦軸は線形目盛で表した比誘電率（ｋ）を示し、横軸は線形目盛で表した成膜ガス中のＨｅガス流量（sccm）を示す。
【００９７】
図１４に示す結果によれば、Ｈｅガス流量が大きくなるにつれて比誘電率（ｋ）が漸増する。そして、Ｈｅガス流量が４００sccm以下で絶縁破壊耐性がなく、４００sccmを越えると絶縁破壊耐性を有するようになった。
【００９８】
（７）第７実施例
図１５を参照して本発明の第７実施例について説明する。
【００９９】
図１５は成膜ガスのＮ2Ｏガス流量に対する成膜した絶縁膜の比誘電率（ｋ）の変化の様子と、Ｎ2Ｏガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。第５実施例（図１３）と異なるところは成膜ガス中にＮＨ3を含む点である。
【０１００】
まず、この調査に用いた試料Ｓ１５乃至Ｓ１９の作成条件について説明する。成膜前処理条件及びアニール条件は第1実施例と同じである。成膜条件は以下の通り。
（成膜条件VII）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：パラメータ（１００、２００、４００、６００、８００ sccm、 それぞれ試料Ｓ１５乃至１９に対応）
ＮＨ3流量：１００ sccm
Ｈｅ流量：４００ sccm
ガス圧力（Ｐ）：１ Torr
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜
膜厚：１００ｎｍ
比誘電率：図１５を参照。
比誘電率の測定はアニール前に第１実施例と同じように行った。また、絶縁破壊耐性の測定は第１実施例のリーク電流の測定方法と同じ方法に従って行った。
【０１０１】
図１５は成膜ガス中のＮ2Ｏガス流量に対する成膜した絶縁膜の比誘電率（ｋ）の変化の様子と、それらのＮ2Ｏガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【０１０２】
図１５において、縦軸は線形目盛で表した比誘電率（ｋ）を示し、横軸は線形目盛で表した成膜ガス中のＮ2Ｏガス流量（sccm）を示す。
【０１０３】
図１５に示す結果によれば、Ｎ2Ｏガス流量が大きくなるにつれて比誘電率（ｋ）が低減していき、４００乃至６００sccmから逆に漸増する。そして、全ての試料Ｓ１５乃至Ｓ１９について絶縁破壊耐性を有する。
【０１０４】
（８）第８実施例
図１６を参照して本発明の第８実施例について説明する。
【０１０５】
図１６は成膜ガス中のＮＨ3ガス流量に対する成膜した絶縁膜の比誘電率（ｋ）の変化の様子と、ＮＨ3ガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【０１０６】
まず、この調査に用いた試料Ｓ２０乃至Ｓ２４の作成条件について説明する。成膜前処理条件及びアニール条件は第1実施例と同じである。成膜条件は以下の通り。
（成膜条件VIII）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：４００ sccm
ＮＨ3流量：パラメータ（５０、１００、２００、４００、６００ sccm、それぞれ試料Ｓ２０乃至２４に対応）
ガス圧力（Ｐ）：１ Torr
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜
膜厚：１００ｎｍ
比誘電率：図１６を参照。
比誘電率の測定はアニール前に第１実施例と同じように行った。また、絶縁破壊耐性の測定は第１実施例のリーク電流の測定方法と同じ方法に従って行った。
【０１０７】
図１６は成膜ガス中のＮＨ3ガス流量に対する成膜した絶縁膜の比誘電率（ｋ）の変化の様子と、それらのＮＨ3ガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【０１０８】
図１６において、縦軸は線形目盛で表した比誘電率（ｋ）を示し、横軸は線形目盛で表した成膜ガス中のＮＨ3ガス流量（sccm）を示す。
【０１０９】
図１６に示す結果によれば、ＮＨ3ガス流量５０sccmでおよそ３となり、以降ＮＨ3ガス流量が増えてくるにつれて比誘電率（ｋ）が急激に増大していき、４００sccmからほぼ一定の値（およそ５程度）に落ち着いた。そして、全ての試料Ｓ２０乃至Ｓ２４について絶縁破壊耐性を有する。
【０１１０】
（９）第９実施例
以上の第４乃至第８の実施例からわかったことは、比誘電率が高いほど絶縁破壊耐性が大きい。このため、第４乃至第８の実施例の絶縁膜単層では、比誘電率を低く、かつ絶縁破壊耐性を高くという要求に応えることは難しい。この要求に対しては、比誘電率は高いが絶縁破壊耐性に優れた絶縁膜と比誘電率は低いが絶縁破壊耐性が低い絶縁膜とを少なくとも積層した２層以上の絶縁膜とすることが適している。この場合、特に、比誘電率を低く、かつ絶縁破壊耐性を高くという要求に十分に応えるためには、絶縁破壊耐性に優れた絶縁膜を薄く、比誘電率が低い絶縁膜を厚くすることが好ましい。
【０１１１】
このような主旨に沿って行った本発明の第９実施例の実験結果について、図１７乃至図２０を参照して説明する。
【０１１２】
第９実施例において第４乃至第８実施例と異なるところは、銅を被覆する下地膜（□印）とその上の主絶縁膜（○印）の２層の絶縁膜を成膜している点である。下地膜の膜厚を１０ｎｍとし、主絶縁膜の膜厚を９０ｎｍとした。この実施の形態では２層の絶縁膜全体の絶縁破壊耐性を調査した。
【０１１３】
図１７に、ガス圧力Ｐを変化させて作成した下地膜の種類（Ｌ１乃至Ｌ３）を示し、併せてガス圧力Ｐと比誘電率の関係を示す。図１８に、Ｎ2Ｏガス流量を変化させて作成した下地膜の種類（Ｌ４、Ｌ５）を示し、併せてＮ2Ｏガス流量と比誘電率の関係を示す。図１９に、ガス圧力Ｐを変化させて作成した主絶縁膜の種類（Ｕ１乃至Ｕ３）を示し、併せてガス圧力Ｐと比誘電率の関係を示す。図２０に、図１７及び図１８の下地膜と図１９の主絶縁膜とを組み合わせた２層の絶縁膜（Ｓ２５乃至Ｓ３１）の絶縁破壊耐性を調査した結果を示す。
【０１１４】
図１７は成膜ガスのガス圧力（Ｐ）に対する成膜した下地膜の比誘電率（ｋ）の変化の様子について示すグラフである。図１７において、縦軸は線形目盛で表した比誘電率（ｋ）を示し、横軸は線形目盛で表した成膜ガスのガス圧力（Ｐ）（Torr）を示す。
【０１１５】
まず、この調査に用いた試料Ｌ１乃至Ｌ３の作成条件について説明する。成膜前処理条件及びアニール条件は第1実施例と同じである。成膜条件は以下の通り。
（成膜条件IX）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：４００ sccm
Ｈｅ流量：４００sccm
ガス圧力（Ｐ）：０．５ ，１．０，１．５Torr
（Ｌ１は０．５Torr、Ｌ２は１．０Torr、Ｌ３は１．５Torrである。）
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜（下地膜）
膜厚：１０ｎｍ
比誘電率：図１７を参照。
比誘電率の測定はアニール前に第１実施例と同じように行った。
【０１１６】
図１７に示す結果によれば、ガス圧力Ｐの増大するにつれて比誘電率も増大する。ガス圧力０．５Torrで比誘電率はおよそ３．５となり、１．０Torrでおよそ２．９となり、１．５Torrでおよそ２．７となった。
【０１１７】
図１８は成膜ガス中のＮ2Ｏガス流量に対する成膜した下地膜の比誘電率（ｋ）の変化の様子について示すグラフである。図１８において、縦軸は線形目盛で表した比誘電率（ｋ）を示し、横軸は線形目盛で表した成膜ガス中のＮ2Ｏガス流量（sccm）を示す。
【０１１８】
まず、この調査に用いた試料Ｌ４乃至Ｌ５の作成条件について説明する。成膜前処理条件及びアニール条件は第1実施例と同じである。成膜条件は以下の通り。
（成膜条件Ｘ）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：１００、４００sccm
（Ｌ４は１００sccm、Ｌ５は４００sccmである。）
Ｈｅ流量：４００sccm
ガス圧力（Ｐ）：１．０ Torr
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜（下地膜）
膜厚：１０ｎｍ
比誘電率：図１８を参照。
比誘電率の測定はアニール前に第１実施例と同じように行った。
【０１１９】
図１８に示す結果によれば、Ｎ2Ｏガス流量１００sccmで比誘電率はおよそ３．１となり、４００sccmでおよそ２．９となった。
【０１２０】
図１９は成膜ガスのガス圧力Ｐに対する成膜した主絶縁膜の比誘電率（ｋ）の変化の様子について示すグラフである。図１９において、縦軸は線形目盛で表した比誘電率（ｋ）を示し、横軸は線形目盛で表した成膜ガスのガス圧力（Torr）を示す。
【０１２１】
まず、この調査に用いた試料Ｕ１乃至Ｕ３の作成条件について説明する。成膜前処理条件及びアニール条件は第1実施例と同じである。成膜条件は以下の通り。
（成膜条件XI）
（ｉ）成膜ガス条件
ＨＭＤＳＯ流量：５０ sccm
Ｎ2Ｏ流量：４００sccm
Ｈｅ流量：４００sccm
ガス圧力（Ｐ）：０．５ ，１．０，１．５Torr
（Ｕ１は０．５Torr、Ｕ２は１．０Torr、Ｕ３は１．５Torrである。）
（ii）プラズマ化条件
高周波電力(13.56MHz)ＰRF：２５０Ｗ
低周波電力(380KHz)ＰLF：０Ｗ
（iii）基板加熱温度：３７５℃
（iv）成膜されたシリコン含有絶縁膜（主絶縁膜）
膜厚：９０ｎｍ
比誘電率：図１９を参照。
比誘電率の測定はアニール前に第１実施例と同じように行った。
【０１２２】
図１９に示す結果によれば、主絶縁膜に関し、ガス圧力０．７Torrで比誘電率はおよそ３．１となり、１．０Torrでおよそ２．９となり、１．５Torrでおよそ２．７となった。
【０１２３】
次に、主絶縁膜（Ｕ１乃至Ｕ３）と種々の下地膜（Ｌ１乃至Ｌ５）とを組み合わせた２層の絶縁膜（Ｓ２５乃至Ｓ３１）に関し、取得した絶縁破壊耐性について説明する。Ｓ２５はＬ１＋Ｕ１の組み合わせ、Ｓ２６はＬ１＋Ｕ２の組み合わせ、Ｓ２７はＬ１＋Ｕ３の組み合わせ、Ｓ２８はＬ２＋Ｕ３の組み合わせ、Ｓ２９はＬ３＋Ｕ２の組み合わせ、Ｓ３０はＬ４＋Ｕ３の組み合わせ、Ｓ３１はＬ５＋Ｕ３の組み合わせである。
【０１２４】
図２０は、試料Ｓ２５乃至Ｓ３１について取得した絶縁破壊耐性を示すグラフである。横軸は線形目盛りで表した下地膜の比誘電率、縦軸は線形目盛りで表した主絶縁膜の比誘電率である。絶縁破壊耐性の測定は第１実施例のリーク電流の測定方法と同じ方法に従って行った。
【０１２５】
図２０によれば、Ｓ２９のみが絶縁破壊耐性が十分でなく、それ以外の試料は十分な絶縁破壊耐性をもつ。ここで、下地膜の比誘電率に関しては、Ｓ２９のみが２．７と低く、他の試料は２．９以上である。また、主絶縁膜の比誘電率に関しては、Ｓ２７、Ｓ２８、Ｓ３０、Ｓ３１が２．７と低く、他の試料は２．９以上ある。言い換えれば、下地膜の比誘電率が低いと、主絶縁膜の比誘電率の大きさにかかわらず、絶縁破壊耐性が低下する傾向にある。即ち、下地膜の膜質によって絶縁破壊耐性が決まっていることを示しており、２層の絶縁膜の絶縁破壊耐性を向上させるためには下地膜の比誘電率をある程度高くする必要がある。
【０１２６】
この結果から、比誘電率を低く、かつ絶縁破壊耐性を高くという要求に応えるためには、下地膜の比誘電率をある程度高くしてできるだけ薄く形成し、かつ主絶縁膜の比誘電率をできるだけ下げて層間絶縁膜として必要な膜厚となるように形成することが好ましい。
【０１２７】
以上、実施の形態によりこの発明を詳細に説明したが、この発明の範囲は上記実施の形態に具体的に示した例に限られるものではなく、この発明の要旨を逸脱しない範囲の上記実施の形態の変更はこの発明の範囲に含まれる。
【０１２８】
例えば、第１の実施の形態では、シロキサン結合を有するアルキル化合物としてヘキサメチルジシロキサン（ＨＭＤＳＯ）を用いているが、上記した他のシロキサン結合を有するアルキル化合物、例えばオクタメチルシクロテトラシロキサン（ＯＭＣＴＳ）、テトラメチルシクロテトラシロキサン（ＴＭＣＴＳ）又はオクタメチルトリシロキサン（ＯＭＴＳ）を用いることも可能である。
【０１２９】
また、第１の実施の形態では、酸素含有ガスとして一酸化二窒素（Ｎ2Ｏ）を用いているが、その代わりに酸素（Ｏ2）、水（Ｈ2Ｏ）又は二酸化炭素（ＣＯ2）の何れか一を用いてもよい。
【０１３０】
さらに、上記第１乃至第３実施例では、ハイドロカーボンを有するガスを用いていないが、メタン（ＣＨ4）や、アセチレン（Ｃ2Ｈ2）を加えてもよい。
【０１３１】
また、上記実施の形態のシロキサン結合を有するアルキル化合物を用いずに、その代わりにメチルシランや、Ｏ−Ｓｉ−Ｏ結合を有するアルキル化合物を用いることもできる。
【０１３２】
この場合、メチルシランとして、モノメチルシラン（SiH3(CH3)）、ジメチルシラン（SiH2(CH3)2）、トリメチルシラン（SiH(CH3)3）、又はテトラメチルシラン（Si(CH3)4）のうち何れか一を用い得る。Ｏ−Ｓｉ−Ｏ結合を有するアルキル化合物として、CH3-O-Si(CH3)2-O-CH3の構造式を有する化合物を用い得る。
【０１３３】
【発明の効果】
以上のように、本発明によれば、アルキル化合物と、酸素含有ガスとを含む成膜ガスを第１の電極と第２の電極の間に供給し、ガス圧力を１Ｔｏｒｒ以下に調整し、その後、第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して成膜ガスをプラズマ化し、反応させて銅配線を被覆するバリア絶縁膜を形成している。
【０１３４】
高周波電力のみでプラズマ化した成膜ガスを用いることにより、低い比誘電率を達成できるとともに、少なくとも成膜初期に成膜ガスの圧力を１Torr以下にすることにより銅の拡散を防止し得るに十分な絶縁膜の緻密性を維持することができる。
【０１３５】
さらに、成膜ガスの圧力を低い圧力から１Ｔｏｒｒまで徐々に上昇させながら成膜し、又はアンモニア（ＮＨ3）や窒素（Ｎ2）を含む成膜ガスを用い、又はアンモニア（ＮＨ3）や窒素（Ｎ2）を成膜初期に成膜ガスに加え、又はＨｅ或いはＡｒのうち少なくとも何れか一からなる希釈ガスを含む成膜ガスを用い、又は希釈ガスを含み、かつその流量を増大させた成膜ガスを用い、また、成膜初期に低周波のバイアス電力を印加することにより低い比誘電率を維持しつつさらに緻密性を向上させることができる。
【０１３６】
また、ハイドロカーボンを加えることにより、低い比誘電率の絶縁膜のエッチング材に対するエッチングの選択性を高めることができる。
【図面の簡単な説明】
【図１】本発明の実施の形態である半導体装置の製造方法に用いられるプラズマＣＶＤ装置の構成を示す側面図である。
【図２】（ａ）乃至（ｃ）は、本発明の実施の形態である、特に有効なガスの組み合わせや、有効な成膜条件の組み合わせを用いた成膜方法について示すチャート（その１）である。
【図３】（ａ）、（ｂ）は、本発明の実施の形態である、特に有効なガスの組み合わせや、有効な成膜条件の組み合わせを用いた成膜方法について示すチャート（その２）である。
【図４】（ａ）乃至（ｆ）は、本発明の実施の形態である、特に有効なガスの組み合わせや、有効な成膜条件の組み合わせを用いた成膜方法について示すチャート（その３）である。
【図５】本発明の第１実施例である成膜方法により成膜条件Ｉで作成された、成膜直後のシリコン含有絶縁膜のリーク電流の特性を示すグラフである。
【図６】本発明の第１実施例である成膜方法により成膜条件Ｉで作成された、成膜直後、かつアニール後のシリコン含有絶縁膜のリーク電流の特性を示すグラフである。
【図７】本発明の第２実施例である成膜方法により成膜条件IIで作成された、成膜直後のシリコン含有絶縁膜のリーク電流の特性を示すグラフである。
【図８】本発明の第２実施例である成膜方法により成膜条件IIで作成された、成膜直後、かつアニール後のシリコン含有絶縁膜のリーク電流の特性を示すグラフである。
【図９】本発明の第３実施例である成膜方法により成膜条件IIIで作成された、成膜直後のシリコン含有絶縁膜のリーク電流の特性を示すグラフである。
【図１０】本発明の第３実施例である成膜方法により成膜条件IIIで作成された、成膜直後、かつアニール後のシリコン含有絶縁膜のリーク電流の特性を示すグラフである。
【図１１】本発明の第４実施例である成膜方法により成膜条件IVで作成された絶縁膜に関し、成膜ガスのガス圧力（Ｐ）に対する比誘電率（ｋ）の変化の様子と、それらのガス圧力（Ｐ）及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【図１２】本発明の第４実施例である成膜方法により成膜条件IVで作成された絶縁膜の銅に対するバリア性について示すグラフである。
【図１３】本発明の第５実施例である成膜方法により成膜条件Ｖで作成された絶縁膜に関し、成膜ガス中のＮ2Ｏガス流量に対する比誘電率（ｋ）の変化の様子と、Ｎ2Ｏガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【図１４】本発明の第６実施例である成膜方法により成膜条件VIで作成された絶縁膜に関し、成膜ガスのＨｅガス流量に対する比誘電率（ｋ）の変化の様子と、Ｈｅガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【図１５】本発明の第７実施例である成膜方法により成膜条件VIIで作成された絶縁膜に関し、成膜ガスのＮ2Ｏガス流量に対する比誘電率（ｋ）の変化の様子と、Ｎ2Ｏガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【図１６】本発明の第８実施例である成膜方法により成膜条件VIIIで作成された絶縁膜に関し、成膜ガス中のＮＨ3ガス流量に対する比誘電率（ｋ）の変化の様子と、ＮＨ3ガス流量及び比誘電率（ｋ）に対する絶縁膜のアニール後の絶縁破壊耐性の関係とについて示すグラフである。
【図１７】本発明の第９実施例である成膜方法により成膜条件IXで作成された２層の絶縁膜のうちの下地膜に関し、その種類と成膜ガスのガス圧力（Ｐ）に対する比誘電率（ｋ）の変化の様子について示すグラフである。
【図１８】本発明の第９実施例である成膜方法により成膜条件Ｘで作成された２層の絶縁膜のうちの下地膜に関し、その種類と成膜ガス中のＮ2Ｏガス流量に対する比誘電率（ｋ）の変化の様子について示すグラフである。
【図１９】本発明の第９実施例である成膜方法により成膜条件XIで作成された２層の絶縁膜のうちの主絶縁膜に関し、その種類と成膜ガスのガス圧力に対する比誘電率（ｋ）の変化の様子について示すグラフである。
【図２０】本発明の第９実施例である成膜方法により成膜条件IX, Ｘ, XIで作成された下地膜と主絶縁膜とを組み合わせた２層の絶縁膜に関し、下地膜と主絶縁膜の比誘電率（ｋ）に対するアニール後の絶縁破壊耐性の関係について示すグラフである。
【符号の説明】
１ チャンバ
２ 上部電極
３ 下部電極
４ 排気配管
５ バルブ
６ 排気装置
７ 高周波電力供給電源（ＲＦ電源）
８ 低周波電力供給電源
９ａ 配管
９ｂ〜９ｉ 分岐配管
１０ａ〜１０ｎ，１０ｐ〜１０ｘ 開閉手段
１１ａ〜１１ｈ 流量調整手段
１２ ヒータ
１０１ 成膜装置
１０１Ａ 成膜部
１０１Ｂ 成膜ガス供給部[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which a barrier insulating film covering a copper wiring is formed by a plasma CVD method.
[0002]
[Prior art]
In recent years, there has been a demand for higher data transfer rates along with higher integration and higher density of semiconductor integrated circuit devices. For this reason, an insulating film having a low dielectric constant with a small RC delay (hereinafter referred to as a low dielectric constant insulating film) is used.
[0003]
On the other hand, regarding the wiring material, it is changing from the conventional aluminum (Al) to copper (Cu) wiring having a low electric resistance.
[0004]
For this reason, a low dielectric constant insulating film is formed as an interlayer insulating film on the copper wiring, but after forming the copper wiring, when forming the low dielectric constant insulating film or in a subsequent process, 400 ° C. to 450 ° C. A degree of annealing is performed. Further, a high electric field is applied to the interlayer insulating film during device operation. Therefore, in order to prevent copper from diffusing into the low dielectric constant insulating film due to heat or an electric field, a barrier insulating film is sandwiched between the low dielectric constant insulating film and the copper wiring.
[0005]
[Problems to be solved by the invention]
However, although the barrier insulating film is dense, the relative dielectric constant is high. Among them, the SiC-based barrier insulating film has a relatively low relative dielectric constant of about 5; however, a barrier insulating film having a relative dielectric constant of 5 with respect to a low dielectric constant insulating film having a relative dielectric constant of 2.8 and a film thickness of 500 nm. When the film thickness is 100 nm, the relative dielectric constant of the entire interlayer insulating film becomes as large as 3.02.
[0006]
For this reason, attempts have been made to reduce the thickness of the barrier insulating film to about 50 nm, but the copper diffusion preventing ability is reduced.
[0007]
The present invention was created in view of the above-described problems of the conventional example, and is capable of forming a barrier insulating film having a lower relative dielectric constant while maintaining denseness capable of preventing copper diffusion. An apparatus manufacturing method is provided.
[0008]
[Means for Solving the Problems]
  In order to solve the above-described problems, a first invention relates to a method for manufacturing a semiconductor device, wherein the second electrode of the first electrode and the second electrode opposed to the first electrode has a copper surface on the surface. A step of holding a wiring mainly composed of a film or a substrate from which an electrode is exposed, and a film forming gas containing an alkyl compound and an oxygen-containing gas is supplied between the first electrode and the second electrode, and a gas pressure And adjusting the film thickness to 1 Torr or less, supplying high-frequency power having a frequency of 1 MHz or more to any one of the first and second electrodes to convert the film-forming gas into plasma and reacting it, so that the copper film is mainly formed. Forming a barrier insulating film covering the wiring or electrode, and forming a barrier insulating film covering the wiring or electrode mainly composed of the copper film by converting the film forming gas into plasma and reacting it. At least in the initial stage of the step, ammonia gas or Is characterized by adding nitrogen gas,
  The second invention relates to a method for manufacturing a semiconductor device, wherein the first electrode and the second electrode of the second electrode opposite to the first electrode have a wiring mainly comprising a copper film on the surface or A film forming gas including a step of holding the substrate from which the electrode is exposed, an alkyl compound, an oxygen-containing gas, and a dilution gas composed of at least one of He or Ar is used as the first electrode and the second electrode. And the step of adjusting the gas pressure to 1 Torr or less, supplying high-frequency power having a frequency of 1 MHz or more to any one of the first and second electrodes to convert the film-forming gas into plasma, and reacting And a step of forming a barrier insulating film covering the wiring or electrode mainly composed of the copper film,
  Characterized in that the flow rate of the dilution gas is increased at least in the initial stage of the step of forming a barrier insulating film covering the wiring or electrode mainly composed of the copper film by converting the film forming gas into a plasma and reacting it,
  A third invention relates to a method of manufacturing a semiconductor device according to the second invention, characterized in that the dilution gas is He and the flow rate ratio to the silicon-containing organic compound is 8 or more,
  A fourth invention relates to a method of manufacturing a semiconductor device, wherein the first electrode and a second electrode of the second electrode facing the first electrode, the wiring mainly comprising a copper film on the surface or A gas pressure is supplied between the first electrode and the second electrode by supplying a film forming gas containing a step of holding the substrate from which the electrode is exposed, an alkyl compound, an oxygen-containing gas, and a dilution gas composed of He. And adjusting the film thickness to 1 Torr or less, supplying high-frequency power having a frequency of 1 MHz or more to any one of the first and second electrodes to make the film-forming gas into plasma and reacting it, thereby making the copper film the main film And a step of forming a barrier insulating film covering the wiring or electrode, wherein the flow rate ratio of the dilution gas to the alkyl compound is 8 or more,
  A fifth invention relates to a method of manufacturing a semiconductor device, wherein the first electrode and a second electrode of the second electrode facing the first electrode, the wiring mainly comprising a copper film on the surface or A step of holding the substrate from which the electrode is exposed, and a step of supplying a film forming gas containing an alkyl compound and an oxygen-containing gas between the first electrode and the second electrode, and adjusting the gas pressure to 1 Torr or less. Then, a high frequency power having a frequency of 1 MHz or more is supplied to any one of the first and second electrodes to make the film forming gas into plasma and react to cover the wiring or electrode mainly composed of the copper film. Forming a barrier insulating film, and in the step of forming the barrier insulating film, the film is formed while gradually increasing the pressure of the film forming gas from a low pressure to 1 Torr,
  A sixth invention relates to a method of manufacturing a semiconductor device, wherein the first electrode and a second electrode of the second electrode facing the first electrode, the wiring mainly comprising a copper film on the surface, or A step of holding the substrate from which the electrode is exposed, and a step of supplying a film forming gas containing an alkyl compound and an oxygen-containing gas between the first electrode and the second electrode, and adjusting the gas pressure to 1 Torr or less. Then, a high frequency power having a frequency of 1 MHz or more is supplied to any one of the first and second electrodes to make the film forming gas into plasma and react to cover the wiring or electrode mainly composed of the copper film. Forming a barrier insulating film, converting the film forming gas into plasma and reacting to form a barrier insulating film covering the wiring or electrode mainly composed of the copper film. During the process, the film was formed with the gas pressure kept at 1 Torr or less. Until deposition of al the barrier insulating film is completed characterized by forming with said gas pressure to a pressure higher than 1 Torr,
  A seventh invention relates to a method of manufacturing a semiconductor device, wherein the first electrode and a second electrode of the second electrode facing the first electrode, the wiring mainly comprising a copper film on the surface, or A step of holding the substrate from which the electrode is exposed, and a step of supplying a film forming gas containing an alkyl compound and an oxygen-containing gas between the first electrode and the second electrode, and adjusting the gas pressure to 1 Torr or less. Then, a high frequency power having a frequency of 1 MHz or more is supplied to any one of the first and second electrodes to make the film forming gas into plasma and react to cover the wiring or electrode mainly composed of the copper film. Forming a barrier insulating film, and supplying high-frequency power to any one of the first and second electrodes to convert the film forming gas into plasma and react to cover the substrate surface The first and second electrodes only in the initial stage of forming the barrier insulating film In addition to supplying high-frequency power to any one of the above, the other electrode is supplied with low-frequency power having a frequency of 50 kHz or more and less than 1 MHz,
  An eighth invention relates to a method of manufacturing a semiconductor device according to any one of the first to seventh inventions, wherein the alkyl compound is hexamethyldisiloxane (HMDSO: (CHThree)ThreeSi-O-Si (CHThree)Three), Octamethylcyclotetrasiloxane (OMCTS:
[0009]
[Formula 4]
Figure 0003701626
[0010]
), Tetramethylcyclotetrasiloxane (TMCTS:
[0011]
[Chemical formula 5]
Figure 0003701626
[0012]
) Or octamethyltrisiloxane (OMTS:
[0013]
[Chemical 6]
Figure 0003701626
[0014]
)), And
  A ninth invention relates to a method of manufacturing a semiconductor device according to any one of the first to seventh inventions, wherein the alkyl compound is monomethylsilane (SiHThree(CHThree)), Dimethylsilane (SiH)2(CHThree)2), Trimethylsilane (SiH (CHThree)Three) Or tetramethylsilane (Si (CHThree)Four), And any one of methylsilanes,
  A tenth invention relates to a method of manufacturing a semiconductor device according to any one of the first to seventh inventions, wherein the alkyl compound is a compound having an O-Si-O bond,
  An eleventh invention relates to a method for manufacturing a semiconductor device according to the tenth invention, wherein the compound having an O-Si-O bond is CH.Three-O-Si (CHThree)2-O-CHThreeIt is characterized by
  A twelfth invention relates to a method for manufacturing a semiconductor device according to any one of the first to seventh inventions, wherein the oxygen-containing gas is O.2, N2O, H2O or CO2It is any one of
  A thirteenth invention relates to the method for manufacturing a semiconductor device of the twelfth invention, wherein the oxygen-containing gas is N.2O, and its flow rate ratio to the alkyl compound is 8 or less,
  A fourteenth aspect of the present invention relates to a method for manufacturing a semiconductor device according to any one of the first to thirteenth aspects of the present invention, wherein the film forming gas includes hydrocarbon.
  A fifteenth invention relates to a method of manufacturing a semiconductor device according to the fourteenth invention, wherein the hydrocarbon is methane (CHFour), Acetylene (C2H2) Or ethylene (C2HFour), Which is one of them.
[0015]
The operation based on the configuration of the present invention will be described below.
[0016]
In the present invention, a deposition gas containing an alkyl compound and an oxygen-containing gas is supplied between the first electrode and the second electrode, the gas pressure is adjusted to 1 Torr or less, and then the first and second A barrier insulating film that covers the copper wiring is formed by supplying high-frequency power having a frequency of 1 MHz or more to any one of the electrodes to convert the film forming gas into plasma and reacting it.
[0017]
By using a film-forming gas that is made plasma only by high-frequency power, a low dielectric constant can be achieved, and at least at the initial stage of film formation, the pressure of the film-forming gas is set to 1 Torr or less to sufficiently prevent copper diffusion. The denseness of the insulating film can be maintained.
[0018]
In order to improve the denseness while maintaining a low dielectric constant, the present invention further forms a film while gradually increasing the pressure of the film forming gas from a low pressure to 1 Torr, or ammonia (NHThree) And nitrogen (N2) Is added to the film forming gas at least in the initial stage of film formation, or a film forming gas containing a dilution gas consisting of at least one of He and Ar is used, or at least at the initial stage of film formation, the flow rate of the dilution gas is increased. In addition, a low frequency bias power is applied at the initial stage of film formation.
[0019]
Further, in order to improve the etching selectivity with respect to the etching material of the insulating film having a low relative dielectric constant formed on the barrier insulating film, hydrocarbon is further added.
[0020]
As described above, according to the present invention, it is possible to form a barrier insulating film having a lower relative dielectric constant while maintaining sufficient denseness to prevent copper diffusion.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
(Description of the plasma CVD apparatus used for the film-forming method which is embodiment of this invention)
FIG. 1 is a side view showing a configuration of a parallel plate type plasma CVD apparatus 101 used in a method for manufacturing a semiconductor device according to an embodiment of the present invention.
This plasma CVD apparatus 101 is a film forming gas supply having a film forming portion 101A which is a place where a barrier insulating film is formed on a film formation substrate 21 by a plasma gas and a plurality of gas supply sources constituting the film forming gas. Part 101B.
[0022]
As shown in FIG. 1, the film forming unit 101 </ b> A includes a chamber 1 that can be decompressed, and the chamber 1 is connected to an exhaust device 6 through an exhaust pipe 4. An opening / closing valve 5 for controlling conduction / non-conduction between the chamber 1 and the exhaust device 6 is provided in the middle of the exhaust pipe 4. The chamber 1 is provided with pressure measuring means such as a vacuum gauge (not shown) for monitoring the pressure in the chamber 1.
[0023]
The chamber 1 is provided with a pair of opposed upper electrodes (first electrodes) 2 and lower electrodes (second electrodes) 3, and a high frequency power supply for supplying high frequency power with a frequency of 13.56 MHz to the upper electrode 2. A power source (RF power source) 7 is connected, and a low frequency power supply source 8 for supplying low frequency power with a frequency of 380 kHz is connected to the lower electrode 3. Among these power sources 7 and 8, at least high frequency power is supplied from the high frequency power supply source 7 to the upper electrode 2, and the film forming gas is turned into plasma. The upper electrode 2, the lower electrode 3, and the power sources 7 and 8 constitute a plasma generating means for converting the film forming gas into plasma.
[0024]
Not only the frequency 380 kHz but also the low frequency power of 50 kHz to 1 MHz can be applied to the lower electrode 3, and the upper electrode 2 facing the lower electrode 3 can be applied to only the frequency 13.56 MHz. Alternatively, high frequency power having a frequency of 1 MHz or more may be applied. Further, in FIG. 1, a high frequency power source is connected to the upper electrode 2 and a low frequency power source is connected to the lower electrode 3, but the high frequency power source 7 is not limited to the upper electrode 2, but either the upper electrode 2 or the lower electrode 3. The object of the present invention can be achieved as long as the low-frequency power source 8 is connected to the other electrode as well as the lower electrode 3.
[0025]
The upper electrode 2 also serves as a film forming gas disperser. A plurality of through holes are formed in the upper electrode 2, and the openings of the through holes on the surface facing the lower electrode 3 serve as film formation gas discharge ports (introduction ports). The film forming gas discharge port is connected to the film forming gas supply unit 101B by a pipe 9a. In some cases, the upper electrode 2 may be provided with a heater (not shown). This is because the upper electrode 2 is heated to a temperature of about 100 ° C. during the film formation to prevent particles made of reaction products of the film forming gas from adhering to the upper electrode 2.
[0026]
The lower electrode 3 also serves as a holding table for the film formation substrate 21 and includes a heater 12 for heating the film formation substrate 21 on the holding table.
[0027]
The deposition gas supply unit 101B includes hexamethyldisiloxane (HMDSO: (CHThree)ThreeSi-O-Si (CHThree)Three) And other alkyl compound having a siloxane bond, and a general formula SiHn (CHThree)4-nA source of methylsilane represented by (n = 0 to 3), a source of an alkyl compound having an O—Si—O bond, and methane (CHFour), Acetylene (C2H2) Or ethylene (C2HFour) And other hydrocarbons (CmHn) And oxygen (O2), Dinitrogen monoxide (N2O), water (H2O), carbon dioxide (CO2) Oxygen-containing gas source and ammonia (NHThree), A diluent gas source comprising at least one of He or Ar (inert gas), and nitrogen (N2).
[0028]
These gases are appropriately supplied into the chamber 1 of the film forming section 101A through the branch pipes 9b to 9i and the pipe 9a to which all the branch pipes 9b to 9i are connected. Flow rate adjusting means 11a to 11h and open / close means 10b to 10n and 10p to 10r for controlling conduction / non-conduction of the branch pipes 9b to 9i are installed in the middle of the branch pipes 9b to 9i. Opening / closing means 10a for closing / conducting is provided. N2In order to purge the residual gas in the branch pipes 9b to 9g by circulating the gas, N2Opening / closing means 10s to 10x for controlling conduction / non-conduction between the branch pipe 9i connected to the gas supply source and the other branch pipes 9b to 9g are installed. The N2 gas is used for purging residual gas in the pipe 9a and the chamber 1 in addition to the branch pipes 9b to 9g. N2The gas is used as a film forming gas.
[0029]
According to the film forming apparatus 101 as described above, a supply source of an alkyl compound having a siloxane bond such as hexamethyldisiloxane (HMDSO), and a general formula SiHn(CHThree)4-nA source of methylsilane represented by (n = 0 to 3), a source of an alkyl compound having an O—Si—O bond, and a hydrocarbon (CmHn) And oxygen (O2), Dinitrogen monoxide (N2O), water (H2O), carbon dioxide (CO2) Oxygen-containing gas source and ammonia (NHThree), A diluent gas source comprising at least one of He or Ar (inert gas), and nitrogen (N2) And plasma generation means 2, 3, 7, and 8 for converting the film forming gas into plasma.
[0030]
Accordingly, a barrier insulating film having a low dielectric constant and being dense and capable of suppressing copper diffusion can be formed by a plasma CVD method described below.
[0031]
Next, an alkyl compound such as an alkyl compound having a siloxane bond, methylsilane, an alkyl compound having an O—Si—O bond, and a hydrocarbon, which are film formation gases for the barrier insulating film used in the present invention, will be described.
[0032]
The following can be used as typical examples.
[0033]
(I) Alkyl compounds having a siloxane bond
Hexamethyldisiloxane (HMDSO: (CHThree)ThreeSi-O-Si (CHThree)Three)
Octamethylcyclotetrasiloxane (OMCTS)
Structural formula
[0034]
[Chemical 7]
Figure 0003701626
[0035]
Tetramethylcyclotetrasiloxane (TMCTS)
Structural formula
[0036]
[Chemical 8]
Figure 0003701626
[0037]
Octamethyltrisiloxane (OMTS)
Structural formula
[0038]
[Chemical 9]
Figure 0003701626
[0039]
(Ii) Methylsilane (SiHn(CHThree)4-n: n = 0 to 3)
Monomethylsilane (SiHThree(CHThree))
Dimethylsilane (SiH2(CHThree)2)
Trimethylsilane (SiH (CHThree)Three)
Tetramethylsilane (Si (CHThree)Four)
(Iii) Alkyl compounds having an O—Si—O bond
CHThree-O-Si (CHThree)2 -O-CHThreeA compound having the structural formula
(Iv) Hydrocarbon (CmHn)
Methane (CHFour)
Acetylene (C2H2)
Ethylene (C2HFour)
(Description of film formation method according to an embodiment of the present invention)
Next, a film forming method using a particularly effective combination of gases and a combination of effective film forming conditions according to the embodiment of the present invention will be described with reference to FIGS. , (B) and FIGS. 4 (a) to 4 (f).
[0040]
These drawings show the timing of introduction of each gas constituting the film forming gas into the chamber 1, the conditions of the gas flow rate and gas pressure during film formation, and two parallel plate type electrodes during film formation. It is a chart shown about the application method of the high frequency electric power or the low frequency electric power to apply.
[0041]
Among them, FIGS. 2A to 2C, FIGS. 3A and 3B show a method of forming a silicon-containing insulating film with a film-forming gas composed of at least an alkyl compound and an oxygen-containing gas. It is a chart.
[0042]
In FIG. 2A, the pressure of the film forming gas introduced into the chamber 1 is adjusted to 1 Torr or less, and high frequency power is applied to either the upper electrode 2 or the lower electrode 3 to turn the film forming gas into plasma. . FIG. 2B differs from FIG. 2A in that the film is formed while gradually increasing the pressure of the film forming gas from a low pressure to 1 Torr. In FIG. 2C, the pressure of the film forming gas introduced into the chamber 1 in FIG. 2A is adjusted to 1 Torr or less for a certain period at the beginning of film formation, and from 1 Torr after a certain period has elapsed. Even different to adjust to higher pressure. In FIG. 3A, in addition to applying high frequency power to either the upper electrode 2 or the lower electrode 3 as compared to FIG. Applying power is different. FIG. 3B differs from FIG. 2A in that the flow rate of the oxygen-containing gas in the film forming gas is increased only for a certain period in the initial stage of film formation and decreased after a lapse of a certain period.
[0043]
Further, in FIGS. 4A to 4F described below, only the addition conditions of the gas are described on the assumption that the gas shown in the figure is added to another gas.
[0044]
4A to 4C are charts in the case where a film is formed using a film forming gas containing a dilution gas.
[0045]
In FIG. 4 (a), a normal flow of dilution gas is added. FIG. 4B differs from FIG. 4A in that the flow rate of the dilution gas is increased. FIG. 4C differs from FIG. 4A in that the flow rate of the dilution gas is increased only for a certain period in the initial stage of film formation and decreased after the lapse of the certain period.
[0046]
4D and 4E are charts in the case where a film is formed using a film forming gas containing at least one of ammonia gas and nitrogen gas.
[0047]
In FIG. 4D, ammonia gas or nitrogen gas is added throughout the entire period of film formation. FIG. 4E is different from FIG. 4D in that at least one of ammonia gas and nitrogen gas is supplied for a certain period in the initial stage of film formation.
The methods for combining FIGS. 4A to 4F with other gases are the following (A) to (C). (A) FIG. 2 (b), FIG. 3 (a), or FIG. 3 (b) can be combined with any one of FIG. 4 (a) to FIG. 4 (f). Further, (b) a combination of FIG. 2 (b), FIG. 3 (a) or FIG. 3 (b) and any one of FIG. 4 (a) to FIG. 4 (c), and FIG. ) To FIG. 4 (e) can be combined. Furthermore, each combination of (c) and (b) can be combined with FIG.
[0048]
By using a film-forming gas that is made plasma only by high-frequency power, a low dielectric constant can be achieved, and at least at the initial stage of film formation, the pressure of the film-forming gas is set to 1 Torr or less to sufficiently prevent copper diffusion. The denseness of the insulating film can be maintained.
[0049]
Further, by forming the film while gradually increasing the pressure of the film forming gas from a low pressure to 1 Torr, a dense film can be obtained at a portion closer to the wiring or electrode mainly composed of a copper film, and the dielectric constant decreases as the distance increases. This film is obtained.
[0050]
In addition, ammonia (NHThree) And nitrogen (N2) Is added to the film forming gas at least at the initial stage of film formation, or a film forming gas containing a dilution gas composed of He is used, or at least the flow rate of the dilution gas is increased at the initial stage of film formation, By applying a bias power of a frequency, the denseness can be improved.
[0051]
Further, by adding hydrocarbon, it is possible to improve the etching resistance of the low dielectric constant film formed on the barrier insulating film to the etching material.
[0052]
As described above, by forming a film by the plasma CVD method to which the present invention is applied in accordance with the above chart, a barrier insulating film that is dense enough to sufficiently prevent copper diffusion and has a low relative dielectric constant. Can be formed.
[0053]
Next, the results of investigating the relative dielectric constant and leakage current of the silicon-containing insulating film formed under various film forming conditions by the method of manufacturing a semiconductor device to which the present invention is applied using the plasma CVD apparatus will be described.
[0054]
(1) First embodiment
For the sample, the surface oxide film of the copper film was removed by pre-deposition treatment, and then a silicon-containing insulating film was formed on the copper film. The silicon-containing insulating film was formed by the plasma CVD method under the following film formation conditions.
[0055]
(Pre-deposition treatment)
(I) Process gas: NHThree
Gas flow rate: 500sccm
Gas pressure: 1 Torr
(Ii) Plasma condition:
Frequency: 13.56MHz
Power: 100W
Time: 10 seconds
(Iii) Substrate heating temperature: 375 ° C
(Deposition conditions I)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: 400 sccm
He flow rate: 400 sccm
Gas pressure: 1 Torr
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film
Film thickness: 100nm
Dielectric constant: 2.89
(Annealing conditions)
Temperature: 450 ° C
Processing period: 4 hours
In measuring the relative dielectric constant, a mercury probe having an electrode area of 0.0226 cm 2 was brought into contact with the surface of the silicon-containing insulating film, and a small signal voltage of 1 MHz was superimposed on the DC bias voltage and applied to the mercury probe. The relative dielectric constant was obtained by conversion from the measured CV characteristics.
[0056]
In the measurement of leakage current and dielectric breakdown resistance, the copper film is grounded and a negative voltage is applied to the mercury probe.
[0057]
The results of measuring leakage current and dielectric breakdown resistance are shown in FIGS. 5 and 6 are graphs in which the leakage current and the dielectric breakdown resistance flowing between the mercury probe and the copper film sandwiching the silicon-containing insulating film were investigated for the above samples. FIG. 5 shows the result of the investigation immediately after the formation of the silicon-containing insulating film, and FIG. 6 shows the result of the investigation after the formation of the silicon-containing insulating film and after annealing under the above conditions.
[0058]
The vertical axis in FIG. 5 represents the leakage current density (A / cm expressed in logarithmic scale).2The horizontal axis represents the electric field strength (MV / cm) applied to the silicon-containing insulating film expressed in a linear scale. Note that the negative sign on the horizontal axis indicates that a negative potential is applied. The same applies to FIG.
[0059]
  As shown in FIGS. 5 and 6, the leakage current is 10 at −1 MV / cm.-TenA / cm2In the entire measurement range of electric field strength, there was almost no change even after annealing compared to before annealing.
[0060]
In the drawing, when the electric field strength is between −4 MV / cm and −5 MV / cm, the leakage current suddenly rises, indicating that dielectric breakdown of the silicon-containing insulating film is caused by the electric field. Although the electric field strength at which dielectric breakdown occurs after annealing is somewhat lowered, the electric field strength is -4 MV / cm or more, which is close to the dielectric breakdown resistance of the insulating film itself, indicating that copper diffusion is suppressed. .
[0061]
In the above, HMDSO having a siloxane bond is used as the alkyl compound. However, other alkyl compounds having a siloxane bond described above, for example, octamethylcyclotetrasiloxane (OMCTS) or tetramethylcyclotetrasiloxane having a siloxane bond ( TMCTS) or octamethyltrisiloxane (OMTS), methylsilane (SiHn(CHThree)4-n: n = 0 to 3) or an alkyl compound having an O—Si—O bond can also be used.
[0062]
(2) Second embodiment
As for the sample, the surface oxide film of the copper film was removed by pre-deposition treatment as in the first example, and then a silicon-containing insulating film was formed on the copper film. The silicon-containing insulating film was formed by the plasma CVD method under the following film formation conditions.
[0063]
As a sample, a silicon-containing insulating film was formed by the plasma CVD method under the following film forming conditions. The film formation pretreatment conditions and the annealing conditions are the same as those in the first embodiment.
[0064]
(Deposition conditions II)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: 400 sccm
He flow rate: 400 sccm
Gas pressure: 0.5 Torr
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film
Film thickness: 100nm
Relative dielectric constant: 3.47
The relative permittivity and leakage current were measured in the same manner as in the first example.
[0065]
According to the measurement results, the relative dielectric constant was 3.47 as described above.
[0066]
Next, the results of measuring the leakage current are shown in FIGS. FIG. 7 and FIG. 8 are graphs in which the leakage current flowing between the mercury probe and the copper film sandwiching the silicon-containing insulating film was investigated for the sample. FIG. 7 shows the results of the investigation immediately after the formation of the silicon-containing insulating film, and FIG. 8 shows the results of the investigation after the formation of the silicon-containing insulating film and after the annealing.
[0067]
The vertical axis in FIG. 7 is the leakage current density (A / cm) expressed on a logarithmic scale.2The horizontal axis represents the electric field strength (MV / cm) applied to the silicon-containing insulating film expressed in a linear scale. The same applies to FIG.
[0068]
As shown in FIGS. 7 and 8, the leakage current is 10 immediately after the film formation when the electric field strength is −1 MV / cm.-9A / cm2In the following, there was almost no change even after annealing in the entire measurement range of electric field strength compared with before annealing.
[0069]
In addition, the electric field strength at which dielectric breakdown of the silicon-containing insulating film occurs is between −4 MV / cm and −5 MV / cm, indicating that copper diffusion is suppressed as in the first embodiment.
[0070]
(3) Third embodiment
As for the sample, after removing the surface oxide film of the copper film by the film formation pretreatment as in the first embodiment, a silicon-containing insulating film was formed on the copper film. The silicon-containing insulating film was formed by the plasma CVD method under the following film formation conditions.
[0071]
(Deposition conditions III)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: 400 sccm
He flow rate: 400 sccm
NHThreeFlow rate: 200 sccm
Gas pressure: 1.0 Torr
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film
Film thickness: 100nm
Relative dielectric constant: 3.7
The relative permittivity and leakage current were measured in the same manner as in the first example.
[0072]
According to the measurement results, the relative dielectric constant was 3.7 as described above.
[0073]
Next, the results of measuring the leakage current are shown in FIGS. 9 and 10 are graphs in which the leakage current flowing between the mercury probe and the copper film sandwiching the silicon-containing insulating film was investigated for the sample. FIG. 9 shows the result of the investigation immediately after the formation of the silicon-containing insulating film, and FIG. 10 shows the result of the investigation after the formation of the silicon-containing insulating film and after the annealing.
[0074]
The vertical axis in FIG. 9 is the leakage current density (A / cm expressed in logarithmic scale).2The horizontal axis represents the electric field strength (MV / cm) applied to the silicon-containing insulating film expressed in a linear scale. The same applies to FIG.
[0075]
  As shown in FIGS. 9 and 10, the leakage current is 10 immediately after the film formation when the electric field strength is −1 MV / cm.-9A / cm2Thus, there was almost no change compared to before annealing except that it decreased slightly before and after −4 MV / cm after annealing.
[0076]
In addition, the electric field strength at which dielectric breakdown of the silicon-containing insulating film occurs is also between -4 MV / cm and -5 MV / cm, indicating that copper diffusion is suppressed as in the first and second embodiments. Yes.
[0077]
(4) Fourth embodiment
A fourth embodiment of the present invention will be described with reference to FIGS.
[0078]
FIG. 11 shows changes in the dielectric constant (k) of the formed insulating film with respect to the gas pressure (P) of the film forming gas, and annealing of the insulating film with respect to those gas pressure (P) and relative dielectric constant (k). It is a graph shown about the relationship of subsequent dielectric breakdown tolerance. FIG. 12 is a graph showing the barrier property against copper of the formed insulating film.
[0079]
First, conditions for creating the samples S1 to S4 used in this investigation will be described. The pre-deposition treatment conditions and the post-deposition annealing conditions are the same as in the first example. The film forming conditions are as follows.
(Deposition condition IV)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: 400 sccm
Gas pressure: Parameter (0.5, 0.75, 1.0, 1.5 Torr, corresponding to samples S1 to S4 respectively)
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film
Film thickness: 100nm
Relative permittivity: See FIG.
The relative dielectric constant was measured in the same manner as in the first example before annealing. The dielectric breakdown resistance was measured according to the same method as the leakage current measurement method of the first example. In addition, the barrier property of the formed insulating film with respect to copper was investigated by SIMS (Secondary Ion Mass Spectroscopy).
[0080]
FIG. 11 shows changes in the relative dielectric constant (k) of the formed insulating film with respect to the gas pressure (P) of the film forming gas, and annealing of the insulating film with respect to those gas pressure (P) and relative dielectric constant (k). It is a graph shown about the relationship of subsequent dielectric breakdown tolerance.
[0081]
In FIG. 11, the vertical axis indicates the relative dielectric constant (k) expressed in a linear scale, and the horizontal axis indicates the gas pressure (p) (Torr) of the film forming gas expressed in a linear scale. In addition, the measurement points are indicated by ◯. In this case, the ● mark in the circles indicates that no breakdown was observed for 5 measurements in the dielectric breakdown resistance test after annealing. Similarly, the x mark indicates a total breakdown for 5 measurements. Indicates that In addition, Δ marks indicate that one or two pieces were destroyed with respect to five measurements. In addition, although the thing with which the electric current flowed through the insulating film from the initial stage of the voltage application to an insulating film was made into destruction, the withstand voltage fell after annealing, The sample which has a certain magnitude | size did not make it destruction. The same applies to the following fifth to tenth embodiments.
[0082]
According to the results shown in FIG. 11, the relative dielectric constant (k) decreases as the gas pressure (P) increases. And it had dielectric breakdown resistance when the gas pressure (P) was 1.0 Torr or less, and the dielectric breakdown resistance was lost at 1.5 Torr.
[0083]
FIG. 12 is a graph showing the results of investigating the barrier properties of the formed insulating film against copper. The distribution of copper in the insulating film before and after annealing was investigated by SIMS.
[0084]
In FIG. 12, the vertical axis represents the concentration (arbitrary unit) of copper in the insulating film expressed in a logarithmic scale, and the horizontal axis represents the measurement location (nm) in the insulating film measured from the insulating film surface expressed in a linear scale. Show.
[0085]
According to the results shown in FIG. 12, all of the samples S1 to S4 contain copper in the insulating film before annealing, which is considered to be mixed with copper during the formation of the insulating film. Accordingly, from FIG. 12, it is important to observe the change in the copper content in the insulating film before and after annealing.
[0086]
Observing from this point of view, particularly with respect to the sample S3, there was no breakdown in the dielectric breakdown resistance test, but diffusion of copper into the insulating film was observed. On the other hand, the samples S1 and S2 showed almost no copper diffusion even after annealing. That is, the samples S1 and S2 have a barrier property.
[0087]
(5) Fifth embodiment
A fifth embodiment of the present invention will be described with reference to FIG.
[0088]
FIG. 13 shows N in the deposition gas.2Changes in relative dielectric constant (k) of the formed insulating film with respect to the O gas flow rate, and N2It is a graph shown about the relationship of the dielectric breakdown tolerance after annealing of an insulating film with respect to O gas flow rate and a dielectric constant (k).
[0089]
First, conditions for creating the samples S5 to S9 used in this investigation will be described. The pre-deposition processing conditions and annealing conditions are the same as in the first example. The film formation conditions are as follows.
(Deposition conditions V)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: Parameter
(100, 200, 400, 600, 800 sccm, which correspond to samples S5 to S9, respectively)
He flow rate: 400 sccm
Gas pressure (P): 1 Torr
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film
Film thickness: 100nm
Relative permittivity: See FIG.
The relative dielectric constant was measured in the same manner as in the first example before annealing. The dielectric breakdown resistance was measured according to the same method as the leakage current measurement method of the first example.
[0090]
FIG. 13 shows the film forming gas N2Changes in the relative dielectric constant (k) of the formed insulating film with respect to the O gas flow rate (sccm) and their N2It is a graph shown about the relationship of the dielectric breakdown tolerance after annealing of an insulating film with respect to O gas flow rate and a dielectric constant (k). In FIG. 13, the vertical axis represents the relative dielectric constant (k) represented by a linear scale, and the horizontal axis represents N in the deposition gas represented by the linear scale.2O gas flow rate (sccm) is shown.
[0091]
According to the results shown in FIG.2As the O gas flow rate increases, the relative dielectric constant (k) decreases, and when the O gas flow rate exceeds approximately 400 sccm, N2Conversely, as the O gas flow rate increases, the relative dielectric constant (k) increases. And N2It had dielectric breakdown resistance when the O gas flow rate was 400 sccm or less, and lost dielectric breakdown resistance at 600 sccm.
[0092]
(6) Sixth embodiment
A sixth embodiment of the present invention will be described with reference to FIG.
[0093]
FIG. 14 shows changes in the relative dielectric constant (k) of the formed insulating film with respect to the He gas flow rate of the film forming gas, and the breakdown resistance after annealing of the insulating film with respect to the He gas flow rate and relative dielectric constant (k). It is a graph shown about a relationship.
[0094]
First, conditions for creating the samples S10 to S14 used in this investigation will be described. The pre-deposition processing conditions and annealing conditions are the same as in the first example. The film formation conditions are as follows.
(Deposition conditions VI)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: 400 sccm
He flow rate: parameter (100, 200, 400, 600, 800 sccm, corresponding to samples S10 to S14 respectively)
Gas pressure (P): 1 Torr
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film
Film thickness: 100nm
Relative permittivity: See FIG.
The relative dielectric constant was measured in the same manner as in the first example before annealing. The dielectric breakdown resistance was measured according to the same method as the leakage current measurement method of the first example.
[0095]
FIG. 14 shows changes in the relative dielectric constant (k) of the formed insulating film with respect to the He gas flow rate in the film forming gas, and insulation after annealing of the insulating film with respect to the He gas flow rate and relative dielectric constant (k). It is a graph shown about the relationship of destruction resistance.
[0096]
In FIG. 14, the vertical axis represents the relative dielectric constant (k) represented by a linear scale, and the horizontal axis represents the He gas flow rate (sccm) in the deposition gas represented by the linear scale.
[0097]
According to the result shown in FIG. 14, the relative dielectric constant (k) gradually increases as the He gas flow rate increases. When the He gas flow rate is 400 sccm or less, there is no dielectric breakdown resistance, and when it exceeds 400 sccm, it has dielectric breakdown resistance.
[0098]
(7) Seventh embodiment
A seventh embodiment of the present invention will be described with reference to FIG.
[0099]
FIG. 15 shows the film forming gas N2Changes in relative dielectric constant (k) of the formed insulating film with respect to the O gas flow rate, and N2It is a graph shown about the relationship of the dielectric breakdown tolerance after annealing of an insulating film with respect to O gas flow rate and a dielectric constant (k). The difference from the fifth embodiment (FIG. 13) is that NH in the film forming gas is different.ThreeIt is a point including.
[0100]
First, conditions for creating the samples S15 to S19 used in this investigation will be described. The pre-deposition processing conditions and annealing conditions are the same as in the first example. The film formation conditions are as follows.
(Deposition conditions VII)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: Parameter (100, 200, 400, 600, 800 sccm, corresponding to samples S15 to S19 respectively)
NHThreeFlow rate: 100 sccm
He flow rate: 400 sccm
Gas pressure (P): 1 Torr
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film
Film thickness: 100nm
Relative permittivity: See FIG.
The relative dielectric constant was measured in the same manner as in the first example before annealing. The dielectric breakdown resistance was measured according to the same method as the leakage current measurement method of the first example.
[0101]
FIG. 15 shows N in the deposition gas.2Changes in relative dielectric constant (k) of the formed insulating film with respect to the O gas flow rate, and their N2It is a graph shown about the relationship of the dielectric breakdown tolerance after annealing of an insulating film with respect to O gas flow rate and a dielectric constant (k).
[0102]
In FIG. 15, the vertical axis represents the relative dielectric constant (k) represented by a linear scale, and the horizontal axis represents N in the deposition gas represented by the linear scale.2O gas flow rate (sccm) is shown.
[0103]
According to the results shown in FIG.2As the O gas flow rate increases, the relative dielectric constant (k) decreases and gradually increases from 400 to 600 sccm. And all the samples S15 to S19 have dielectric breakdown resistance.
[0104]
(8) Eighth embodiment
The eighth embodiment of the present invention will be described with reference to FIG.
[0105]
FIG. 16 shows NH in the deposition gas.ThreeChanges in relative dielectric constant (k) of the formed insulating film with respect to the gas flow rate, and NHThreeIt is a graph shown about the relationship of the dielectric breakdown tolerance after annealing of an insulating film with respect to a gas flow rate and a dielectric constant (k).
[0106]
First, conditions for creating the samples S20 to S24 used in this investigation will be described. The pre-deposition processing conditions and annealing conditions are the same as in the first example. The film formation conditions are as follows.
(Deposition conditions VIII)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: 400 sccm
NHThreeFlow rate: Parameter (50, 100, 200, 400, 600 sccm, corresponding to samples S20 to S24, respectively)
Gas pressure (P): 1 Torr
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film
Film thickness: 100nm
Relative permittivity: See FIG.
The relative dielectric constant was measured in the same manner as in the first example before annealing. The dielectric breakdown resistance was measured according to the same method as the leakage current measurement method of the first example.
[0107]
FIG. 16 shows NH in the deposition gas.ThreeChanges in relative dielectric constant (k) of the formed insulating film with respect to the gas flow rate and their NHThreeIt is a graph shown about the relationship of the dielectric breakdown tolerance after annealing of an insulating film with respect to a gas flow rate and a dielectric constant (k).
[0108]
In FIG. 16, the vertical axis represents the relative dielectric constant (k) represented by a linear scale, and the horizontal axis represents NH in the deposition gas represented by the linear scale.ThreeIndicates the gas flow rate (sccm).
[0109]
According to the results shown in FIG.ThreeIt becomes approximately 3 at a gas flow rate of 50 sccm, and thereafter NHThreeAs the gas flow rate increased, the relative dielectric constant (k) increased rapidly and settled from 400 sccm to a substantially constant value (approximately 5). All of the samples S20 to S24 have dielectric breakdown resistance.
[0110]
(9) Ninth embodiment
It has been found from the above fourth to eighth embodiments that the higher the dielectric constant, the greater the dielectric breakdown resistance. For this reason, it is difficult for the single insulating film layers of the fourth to eighth embodiments to meet the demands for low dielectric constant and high dielectric breakdown resistance. In response to this requirement, an insulating film having a high relative dielectric constant but excellent dielectric breakdown resistance and an insulating film having at least two layers of an insulating film having a low relative dielectric constant but low dielectric breakdown resistance may be used. Are suitable. In this case, in particular, in order to sufficiently meet the requirements of low dielectric constant and high dielectric breakdown resistance, it is necessary to make the insulating film excellent in dielectric breakdown resistance thin and thick the insulating film having low dielectric constant. preferable.
[0111]
The experimental results of the ninth embodiment of the present invention carried out in accordance with the gist will be described with reference to FIGS.
[0112]
The ninth embodiment is different from the fourth to eighth embodiments in that a two-layer insulating film is formed of a base film (□ mark) covering copper and a main insulating film (◯ mark) thereon. Is a point. The film thickness of the base film was 10 nm, and the film thickness of the main insulating film was 90 nm. In this embodiment, the dielectric breakdown resistance of the entire two-layer insulating film was investigated.
[0113]
FIG. 17 shows the types of base films (L1 to L3) created by changing the gas pressure P, and also shows the relationship between the gas pressure P and the relative dielectric constant. In FIG.2The types of base films (L4, L5) created by changing the O gas flow rate are shown together with N2The relationship between O gas flow rate and a dielectric constant is shown. FIG. 19 shows the types (U1 to U3) of the main insulating films prepared by changing the gas pressure P, and also shows the relationship between the gas pressure P and the relative dielectric constant. FIG. 20 shows the results of investigating the dielectric breakdown resistance of a two-layered insulating film (S25 to S31) in which the base film of FIGS. 17 and 18 and the main insulating film of FIG. 19 are combined.
[0114]
FIG. 17 is a graph showing changes in the relative dielectric constant (k) of the base film formed with respect to the gas pressure (P) of the film forming gas. In FIG. 17, the vertical axis represents the relative dielectric constant (k) represented by a linear scale, and the horizontal axis represents the gas pressure (P) (Torr) of the film forming gas represented by the linear scale.
[0115]
First, conditions for creating the samples L1 to L3 used in this investigation will be described. The pre-deposition processing conditions and annealing conditions are the same as in the first example. The film formation conditions are as follows.
(Deposition conditions IX)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: 400 sccm
He flow rate: 400sccm
Gas pressure (P): 0.5, 1.0, 1.5 Torr
(L1 is 0.5 Torr, L2 is 1.0 Torr, and L3 is 1.5 Torr.)
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film (underlying film)
Film thickness: 10nm
Relative permittivity: See FIG.
The relative dielectric constant was measured in the same manner as in the first example before annealing.
[0116]
According to the results shown in FIG. 17, the relative dielectric constant increases as the gas pressure P increases. The relative dielectric constant was about 3.5 at a gas pressure of 0.5 Torr, about 2.9 at 1.0 Torr, and about 2.7 at 1.5 Torr.
[0117]
FIG. 18 shows N in the deposition gas.2It is a graph which shows about the mode of the change of the dielectric constant (k) of the base film formed into a film with respect to O gas flow rate. In FIG. 18, the vertical axis represents the relative dielectric constant (k) represented by a linear scale, and the horizontal axis represents N in the deposition gas represented by the linear scale.2O gas flow rate (sccm) is shown.
[0118]
First, conditions for creating the samples L4 to L5 used in this investigation will be described. The pre-deposition processing conditions and annealing conditions are the same as in the first example. The film formation conditions are as follows.
(Film formation condition X)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: 100, 400 sccm
(L4 is 100 sccm and L5 is 400 sccm.)
He flow rate: 400sccm
Gas pressure (P): 1.0 Torr
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film (underlying film)
Film thickness: 10nm
Relative permittivity: See FIG.
The relative dielectric constant was measured in the same manner as in the first example before annealing.
[0119]
According to the results shown in FIG.2The relative dielectric constant was about 3.1 at an O gas flow rate of 100 sccm, and about 2.9 at 400 sccm.
[0120]
FIG. 19 is a graph showing how the relative dielectric constant (k) of the deposited main insulating film changes with respect to the gas pressure P of the film forming gas. In FIG. 19, the vertical axis represents the relative dielectric constant (k) represented by a linear scale, and the horizontal axis represents the gas pressure (Torr) of the film forming gas represented by a linear scale.
[0121]
First, conditions for creating the samples U1 to U3 used in this investigation will be described. The pre-deposition processing conditions and annealing conditions are the same as in the first example. The film formation conditions are as follows.
(Deposition conditions XI)
(I) Film forming gas conditions
HMDSO flow rate: 50 sccm
N2O flow rate: 400sccm
He flow rate: 400sccm
Gas pressure (P): 0.5, 1.0, 1.5 Torr
(U1 is 0.5 Torr, U2 is 1.0 Torr, U3 is 1.5 Torr.)
(Ii) Plasma conditions
High frequency power (13.56MHz) PRF: 250W
Low frequency power (380KHz) PLF: 0W
(Iii) Substrate heating temperature: 375 ° C
(Iv) Deposited silicon-containing insulating film (main insulating film)
Film thickness: 90nm
Relative permittivity: See FIG.
The relative dielectric constant was measured in the same manner as in the first example before annealing.
[0122]
According to the results shown in FIG. 19, the relative dielectric constant of the main insulating film is about 3.1 at a gas pressure of 0.7 Torr, about 2.9 at 1.0 Torr, and about 2.7 at 1.5 Torr. It was.
[0123]
Next, the acquired dielectric breakdown resistance of the two-layered insulating film (S25 to S31) in which the main insulating film (U1 to U3) and various base films (L1 to L5) are combined will be described. S25 is a combination of L1 + U1, S26 is a combination of L1 + U2, S27 is a combination of L1 + U3, S28 is a combination of L2 + U3, S29 is a combination of L3 + U2, S30 is a combination of L4 + U3, and S31 is a combination of L5 + U3.
[0124]
FIG. 20 is a graph showing the dielectric breakdown resistance acquired for samples S25 to S31. The horizontal axis represents the relative dielectric constant of the base film expressed in a linear scale, and the vertical axis represents the relative dielectric constant of the main insulating film expressed in a linear scale. The dielectric breakdown resistance was measured according to the same method as the leakage current measurement method of the first example.
[0125]
According to FIG. 20, only S29 does not have sufficient dielectric breakdown resistance, and the other samples have sufficient dielectric breakdown resistance. Here, regarding the relative dielectric constant of the base film, only S29 is as low as 2.7, and other samples are 2.9 or more. Regarding the relative dielectric constant of the main insulating film, S27, S28, S30, and S31 are as low as 2.7, and other samples have 2.9 or more. In other words, when the relative dielectric constant of the base film is low, the dielectric breakdown resistance tends to decrease regardless of the relative dielectric constant of the main insulating film. That is, it shows that the dielectric breakdown resistance is determined by the film quality of the base film. In order to improve the dielectric breakdown resistance of the two-layer insulating film, it is necessary to increase the relative dielectric constant of the base film to some extent.
[0126]
From this result, in order to meet the demand for low dielectric constant and high dielectric breakdown resistance, the base film should be made as thin as possible by increasing the relative dielectric constant of the base film to some extent, and the relative dielectric constant of the main insulating film should be as low as possible. It is preferable that the film be formed so as to have a film thickness required as an interlayer insulating film.
[0127]
Although the present invention has been described in detail with the embodiments, the scope of the present invention is not limited to the examples specifically shown in the above embodiments, and the above embodiments within the scope of the present invention are not deviated. Variations in form are within the scope of this invention.
[0128]
For example, in the first embodiment, hexamethyldisiloxane (HMDSO) is used as the alkyl compound having a siloxane bond. However, other alkyl compounds having another siloxane bond, such as octamethylcyclotetrasiloxane (OMCTS), are used. Tetramethylcyclotetrasiloxane (TMCTS) or octamethyltrisiloxane (OMTS) can also be used.
[0129]
In the first embodiment, dinitrogen monoxide (N2O), but oxygen (O2), Water (H2O) or carbon dioxide (CO2) May be used.
[0130]
Further, in the first to third embodiments, a gas having hydrocarbon is not used, but methane (CHFour) And acetylene (C2H2) May be added.
[0131]
Further, instead of using the alkyl compound having a siloxane bond in the above embodiment, an alkyl compound having methylsilane or an O—Si—O bond can be used instead.
[0132]
In this case, as methylsilane, monomethylsilane (SiHThree(CHThree)), Dimethylsilane (SiH)2(CHThree)2), Trimethylsilane (SiH (CHThree)Three) Or tetramethylsilane (Si (CHThree)Four) Can be used. As an alkyl compound having an O—Si—O bond, CHThree-O-Si (CHThree)2-O-CHThreeA compound having the following structural formula may be used.
[0133]
【The invention's effect】
As described above, according to the present invention, the deposition gas containing the alkyl compound and the oxygen-containing gas is supplied between the first electrode and the second electrode, the gas pressure is adjusted to 1 Torr or less, and then A barrier insulating film that covers the copper wiring is formed by supplying high-frequency power having a frequency of 1 MHz or more to any one of the first and second electrodes to convert the film-forming gas into plasma and reacting it.
[0134]
By using a film-forming gas that is made plasma only by high-frequency power, a low dielectric constant can be achieved, and at least at the initial stage of film formation, the pressure of the film-forming gas is set to 1 Torr or less to sufficiently prevent copper diffusion. The denseness of the insulating film can be maintained.
[0135]
Further, the film formation gas is gradually increased from a low pressure to 1 Torr, or a film is formed, or ammonia (NHThree) And nitrogen (N2), Or ammonia (NHThree) And nitrogen (N2) Is added to the film forming gas at the initial stage of film formation, or a film forming gas containing a diluting gas consisting of at least one of He or Ar is used, or a film forming gas containing the diluting gas and increasing its flow rate. In addition, by applying a low-frequency bias power at the initial stage of film formation, it is possible to further improve the density while maintaining a low relative dielectric constant.
[0136]
Further, by adding hydrocarbon, it is possible to increase the selectivity of etching with respect to the etching material of the insulating film having a low relative dielectric constant.
[Brief description of the drawings]
FIG. 1 is a side view showing a configuration of a plasma CVD apparatus used in a method for manufacturing a semiconductor device according to an embodiment of the present invention.
FIGS. 2A to 2C are charts (No. 1) showing a film forming method using a particularly effective gas combination and effective film forming condition according to an embodiment of the present invention. It is.
FIGS. 3A and 3B are charts (part 2) illustrating a film formation method using a particularly effective gas combination and effective film formation condition according to an embodiment of the present invention. It is.
FIGS. 4A to 4F are charts (part 3) showing a film forming method using a particularly effective gas combination and effective film forming conditions according to an embodiment of the present invention. It is.
FIG. 5 is a graph showing the leakage current characteristics of a silicon-containing insulating film immediately after film formation, created under film forming condition I by the film forming method according to the first embodiment of the present invention.
FIG. 6 is a graph showing the leakage current characteristics of a silicon-containing insulating film immediately after film formation and after annealing, created under film formation condition I by the film formation method according to the first embodiment of the present invention.
FIG. 7 is a graph showing the leakage current characteristics of a silicon-containing insulating film immediately after film formation, created under film formation condition II by the film formation method according to the second embodiment of the present invention.
FIG. 8 is a graph showing the leakage current characteristics of a silicon-containing insulating film immediately after film formation and after annealing, created under film formation condition II by the film formation method according to the second embodiment of the present invention.
FIG. 9 is a graph showing the leakage current characteristics of a silicon-containing insulating film immediately after film formation, created under film formation condition III by the film formation method according to the third embodiment of the present invention.
FIG. 10 is a graph showing the leakage current characteristics of a silicon-containing insulating film immediately after film formation and after annealing, created under film formation condition III by the film formation method according to the third embodiment of the present invention.
FIG. 11 shows how the relative dielectric constant (k) changes with respect to the gas pressure (P) of the deposition gas, with respect to the insulating film created under the deposition condition IV by the deposition method according to the fourth embodiment of the present invention; 4 is a graph showing the relationship between the dielectric breakdown resistance after annealing of the insulating film with respect to the gas pressure (P) and the relative dielectric constant (k).
FIG. 12 is a graph showing a barrier property against copper of an insulating film formed under film formation condition IV by a film formation method according to a fourth embodiment of the present invention.
FIG. 13 relates to an insulating film formed under film forming condition V by a film forming method according to a fifth embodiment of the present invention, and N in a film forming gas;2Changes in relative permittivity (k) with respect to O gas flow rate, N2It is a graph shown about the relationship of the dielectric breakdown tolerance after annealing of an insulating film with respect to O gas flow rate and a dielectric constant (k).
FIG. 14 shows how the relative dielectric constant (k) changes with respect to the He gas flow rate of the deposition gas, and the He, with respect to the insulating film created under the deposition condition VI by the deposition method according to the sixth embodiment of the present invention; It is a graph shown about the relationship of the dielectric breakdown tolerance after annealing of an insulating film with respect to a gas flow rate and a dielectric constant (k).
FIG. 15 relates to an insulating film formed under the film forming condition VII by the film forming method according to the seventh embodiment of the present invention, and the film forming gas N2Changes in relative permittivity (k) with respect to O gas flow rate, N2It is a graph shown about the relationship of the dielectric breakdown tolerance after annealing of an insulating film with respect to O gas flow rate and a dielectric constant (k).
FIG. 16 relates to an insulating film formed under the film forming condition VIII by the film forming method according to the eighth embodiment of the present invention, and NH in the film forming gas;ThreeChanges in relative permittivity (k) with respect to gas flow rate and NHThreeIt is a graph shown about the relationship of the dielectric breakdown tolerance after annealing of an insulating film with respect to a gas flow rate and a dielectric constant (k).
FIG. 17 relates to the base film of the two insulating films created by the film forming method according to the ninth embodiment of the present invention under the film forming condition IX with respect to the type and the gas pressure (P) of the film forming gas; It is a graph shown about the mode of change of relative dielectric constant (k).
FIG. 18 relates to the base film of the two insulating films formed by the film forming method according to the ninth embodiment of the present invention under the film forming condition X, and its type and N in the film forming gas;2It is a graph shown about the mode of change of relative dielectric constant (k) with respect to O gas flow rate.
FIG. 19 relates to the main insulating film of the two insulating films formed by the film forming method XI according to the ninth embodiment of the present invention under the film forming condition XI, and the relative dielectric with respect to the type and gas pressure of the film forming gas. It is a graph shown about the mode of change of rate (k).
FIG. 20 relates to a two-layer insulating film in which a base film and a main insulating film formed by film forming conditions IX, X, and XI by the film forming method according to the ninth embodiment of the present invention are combined. It is a graph shown about the relationship of the dielectric breakdown tolerance after annealing with respect to the dielectric constant (k) of an insulating film.
[Explanation of symbols]
1 chamber
2 Upper electrode
3 Lower electrode
4 Exhaust piping
5 Valve
6 Exhaust device
7 RF power supply (RF power supply)
8 Low frequency power supply
9a Piping
9b-9i Branch piping
10a to 10n, 10p to 10x opening and closing means
11a-11h Flow rate adjusting means
12 Heater
101 Deposition system
101A Deposition section
101B Deposition gas supply unit

Claims (15)

第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、
アルキル化合物と、酸素含有ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、
前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、
前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程の少なくとも初期に、前記成膜ガスにアンモニアガス又は窒素ガスを加えることを特徴とする半導体装置の製造方法。 Of the first electrode and the second electrode facing the first electrode, the second electrode holds a wiring or a substrate mainly having a copper film exposed on the surface thereof; and
Supplying a film-forming gas containing an alkyl compound and an oxygen-containing gas between the first electrode and the second electrode, and adjusting the gas pressure to 1 Torr or less;
Barrier insulation that covers wiring or electrodes mainly composed of the copper film by supplying high-frequency power having a frequency of 1 MHz or more to any one of the first and second electrodes to convert the film-forming gas into plasma and reacting it. And forming a film,
Adding ammonia gas or nitrogen gas to the film-forming gas at least in the initial stage of forming the barrier insulating film covering the wiring or electrode mainly comprising the copper film by converting the film-forming gas into plasma and reacting it. A method of manufacturing a semiconductor device. 第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、
アルキル化合物と、酸素含有ガスと、Ｈｅ又はＡｒのうち少なくとも何れか一からなる希釈ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、
前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、
前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程の少なくとも初期に前記希釈ガスの流量を増やすことを特徴とする半導体装置の製造方法。 Of the first electrode and the second electrode facing the first electrode, the second electrode holds a wiring or a substrate mainly having a copper film exposed on the surface thereof; and
A film-forming gas containing an alkyl compound, an oxygen-containing gas, and a dilution gas composed of at least one of He or Ar is supplied between the first electrode and the second electrode, and the gas pressure is 1 Torr or less. Adjusting the process to
Barrier insulation that covers wiring or electrodes mainly composed of the copper film by supplying high-frequency power having a frequency of 1 MHz or more to any one of the first and second electrodes to convert the film-forming gas into plasma and reacting it. And forming a film,
A semiconductor device characterized in that the flow rate of the dilution gas is increased at least in the initial stage of the step of forming the barrier insulating film covering the wiring or electrode mainly including the copper film by converting the film forming gas into plasma and reacting the plasma. Manufacturing method. 前記希釈ガスはＨｅであり、前記アルキル化合物に対する前記希釈ガスの流量比は８以上であることを特徴とする請求項２記載の半導体装置の製造方法。  3. The method of manufacturing a semiconductor device according to claim 2, wherein the dilution gas is He, and a flow rate ratio of the dilution gas to the alkyl compound is 8 or more. 第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、
アルキル化合物と、酸素含有ガスと、Ｈｅからなる希釈ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、
前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、
前記アルキル化合物に対する前記希釈ガスの流量比は８以上であることを特徴とする半導体装置の製造方法。 Of the first electrode and the second electrode facing the first electrode, the second electrode holds a wiring or a substrate mainly having a copper film exposed on the surface thereof; and
Supplying a film-forming gas containing an alkyl compound, an oxygen-containing gas, and a diluent gas composed of He between the first electrode and the second electrode, and adjusting the gas pressure to 1 Torr or less;
Barrier insulation that covers wiring or electrodes mainly composed of the copper film by supplying high-frequency power having a frequency of 1 MHz or more to any one of the first and second electrodes to convert the film-forming gas into plasma and reacting it. And forming a film,
A method for manufacturing a semiconductor device, wherein a flow ratio of the dilution gas to the alkyl compound is 8 or more. 第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、
アルキル化合物と、酸素含有ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、
前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、
前記バリア絶縁膜を成膜する工程において、成膜ガスの圧力を低い圧力から１Torrまで徐々に上昇させながら成膜することを特徴とする半導体装置の製造方法。 Of the first electrode and the second electrode facing the first electrode, the second electrode holds a wiring or a substrate mainly having a copper film exposed on the surface thereof; and
Supplying a film-forming gas containing an alkyl compound and an oxygen-containing gas between the first electrode and the second electrode, and adjusting the gas pressure to 1 Torr or less;
Barrier insulation that covers wiring or electrodes mainly composed of the copper film by supplying high-frequency power having a frequency of 1 MHz or more to any one of the first and second electrodes to convert the film-forming gas into plasma and reacting it. And forming a film,
A method of manufacturing a semiconductor device, wherein in the step of forming the barrier insulating film, the film is formed while gradually increasing the pressure of a film forming gas from a low pressure to 1 Torr. 第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、
アルキル化合物と、酸素含有ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、
前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、
前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程において、成膜初期から途中まではガス圧力を１Torr以下に保持して成膜し、途中から前記バリア絶縁膜の成膜が終了するまで前記ガス圧力を１Torrよりも高い圧力にして成膜することを特徴とする半導体装置の製造方法。 Of the first electrode and the second electrode facing the first electrode, the second electrode holds a wiring or a substrate mainly having a copper film exposed on the surface thereof; and
Supplying a film-forming gas containing an alkyl compound and an oxygen-containing gas between the first electrode and the second electrode, and adjusting the gas pressure to 1 Torr or less;
Barrier insulation that covers wiring or electrodes mainly composed of the copper film by supplying high-frequency power having a frequency of 1 MHz or more to any one of the first and second electrodes to convert the film-forming gas into plasma and reacting it. And forming a film,
In the step of forming a barrier insulating film covering the wiring or electrode mainly composed of the copper film by plasmaizing and reacting the film forming gas, the gas pressure is maintained at 1 Torr or less from the initial stage to the middle of the film formation. A method of manufacturing a semiconductor device, comprising: forming a film and forming the gas pressure at a pressure higher than 1 Torr from the middle until the formation of the barrier insulating film is completed. 第１の電極及び該第１の電極に対向する第２の電極のうち前記第２の電極に、表面に銅膜を主とする配線又は電極が露出した基板を保持する工程と、
アルキル化合物と、酸素含有ガスとを含む成膜ガスを前記第１の電極と第２の電極の間に供給し、ガス圧力を１Torr以下に調整する工程と、
前記第１及び第２の電極のうち何れか一に周波数１ＭＨｚ以上の高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記銅膜を主とする配線又は電極を覆うバリア絶縁膜を成膜する工程とを有し、
前記第１及び第２の電極のうち何れか一に高周波電力を供給して前記成膜ガスをプラズマ化し、反応させて、前記基板表面を覆うバリア絶縁膜を形成する工程の初期だけ、前記第１及び第２の電極のうち何れか一に高周波電力を供給するほかに、他方の前記電極に周波数５０ｋＨｚ以上、１ＭＨｚ未満の低周波電力を供給することを特徴とする半導体装置の製造方法。 Of the first electrode and the second electrode facing the first electrode, the second electrode holds a wiring or a substrate mainly having a copper film exposed on the surface thereof; and
Supplying a film-forming gas containing an alkyl compound and an oxygen-containing gas between the first electrode and the second electrode, and adjusting the gas pressure to 1 Torr or less;
Barrier insulation that covers wiring or electrodes mainly composed of the copper film by supplying high-frequency power having a frequency of 1 MHz or more to any one of the first and second electrodes to convert the film-forming gas into plasma and reacting it. And forming a film,
Only in the initial stage of the step of forming a barrier insulating film covering the substrate surface by supplying high frequency power to any one of the first and second electrodes to plasmaize and react the film forming gas. In addition to supplying high-frequency power to any one of the first and second electrodes, a low-frequency power having a frequency of 50 kHz or more and less than 1 MHz is supplied to the other electrode. 前記アルキル化合物は、ヘキサメチルジシロキサン（ＨＭＤＳＯ：(CH3)3Si-O-Si(CH3)3）、オクタメチルシクロテトラシロキサン（ＯＭＣＴＳ：
Figure 0003701626
）、テトラメチルシクロテトラシロキサン（ＴＭＣＴＳ：
Figure 0003701626
）、又はオクタメチルトリシロキサン（ＯＭＴＳ：
Figure 0003701626
）のうち何れか一であることを特徴とする請求項１乃至７の何れか一に記載の半導体装置の製造方法。The alkyl compounds include hexamethyldisiloxane (HMDSO: (CH 3 ) 3 Si—O—Si (CH 3 ) 3 ), octamethylcyclotetrasiloxane (OMCTS:
Figure 0003701626
 ), Tetramethylcyclotetrasiloxane (TMCTS:
Figure 0003701626
 ) Or octamethyltrisiloxane (OMTS:
Figure 0003701626
 8) The method for manufacturing a semiconductor device according to any one of claims 1 to 7, wherein 前記アルキル化合物は、モノメチルシラン（SiH3(CH3)）、ジメチルシラン（SiH2(CH3)2）、トリメチルシラン（SiH(CH3) 3）、又はテトラメチルシラン（Si(CH3) 4）のうち何れか一であるメチルシランのうち何れか一であることを特徴とする請求項１乃至７の何れか一に記載の半導体装置の製造方法。The alkyl compound includes monomethylsilane (SiH 3 (CH 3 )), dimethylsilane (SiH 2 (CH 3 ) 2 ), trimethylsilane (SiH (CH 3 ) 3 ), or tetramethylsilane (Si (CH 3 ) 4 The method for manufacturing a semiconductor device according to claim 1, wherein the method is any one of methylsilanes. 前記アルキル化合物は、Ｏ−Ｓｉ−Ｏ結合を有する化合物であることを特徴とする請求項１乃至７の何れか一に記載の半導体装置の製造方法。  The method for manufacturing a semiconductor device according to claim 1, wherein the alkyl compound is a compound having an O—Si—O bond. 前記Ｏ−Ｓｉ−Ｏ結合を有する化合物は、CH3-O-Si(CH3) 2-O-CH3であることを特徴とする請求項１０記載の半導体装置の製造方法。The method for manufacturing a semiconductor device according to claim 10, wherein the compound having an O—Si—O bond is CH 3 —O—Si (CH 3 ) 2 —O—CH 3 . 前記酸素含有ガスは、Ｏ2、Ｎ2Ｏ、Ｈ2Ｏ又はＣＯ2のうち何れか一であることを特徴とする請求項１乃至７の何れか一に記載の半導体装置の製造方法。The method for manufacturing a semiconductor device according to claim 1, wherein the oxygen-containing gas is any one of O 2 , N 2 O, H 2 O, and CO 2 . 前記酸素含有ガスはＮ2Ｏであり、アルキル化合物に対するその流量比は８以下であることを特徴とする請求項１２記載の半導体装置の製造方法。It said oxygen-containing gas is N 2 O, The method of claim 12 semiconductor device, wherein that the flow rate ratio for the alkyl compound is 8 or less. 前記成膜ガスは、ハイドロカーボンを含むことを特徴とする請求項１乃至１３の何れか一に記載の半導体装置の製造方法。  The method for manufacturing a semiconductor device according to claim 1, wherein the film forming gas contains hydrocarbon. 前記ハイドロカーボンは、メタン（ＣＨ4）、アセチレン（Ｃ2Ｈ2）、又はエチレン（Ｃ2Ｈ4）のうち何れか一であることを特徴とする請求項１４記載の半導体装置の製造方法。The hydrocarbon is methane (CH 4), acetylene (C 2 H 2), or ethylene (C 2 H 4) The method of claim 14 semiconductor device, wherein a is any one of the.
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Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030211244A1 (en) * 2002-04-11 2003-11-13 Applied Materials, Inc. Reacting an organosilicon compound with an oxidizing gas to form an ultra low k dielectric
US20030194495A1 (en) * 2002-04-11 2003-10-16 Applied Materials, Inc. Crosslink cyclo-siloxane compound with linear bridging group to form ultra low k dielectric
US6936551B2 (en) * 2002-05-08 2005-08-30 Applied Materials Inc. Methods and apparatus for E-beam treatment used to fabricate integrated circuit devices
US7056560B2 (en) * 2002-05-08 2006-06-06 Applies Materials Inc. Ultra low dielectric materials based on hybrid system of linear silicon precursor and organic porogen by plasma-enhanced chemical vapor deposition (PECVD)
US7060330B2 (en) * 2002-05-08 2006-06-13 Applied Materials, Inc. Method for forming ultra low k films using electron beam
WO2004053205A2 (en) 2002-07-22 2004-06-24 Massachusetts Institute Of Technolgoy Porous material formation by chemical vapor deposition onto colloidal crystal templates
AU2003282988A1 (en) * 2002-10-21 2004-05-13 Massachusetts Institute Of Technology Pecvd of organosilicate thin films
US6897163B2 (en) * 2003-01-31 2005-05-24 Applied Materials, Inc. Method for depositing a low dielectric constant film
US20040253378A1 (en) * 2003-06-12 2004-12-16 Applied Materials, Inc. Stress reduction of SIOC low k film by addition of alkylenes to OMCTS based processes
US20050037153A1 (en) * 2003-08-14 2005-02-17 Applied Materials, Inc. Stress reduction of sioc low k films
US20050214457A1 (en) * 2004-03-29 2005-09-29 Applied Materials, Inc. Deposition of low dielectric constant films by N2O addition
US7740704B2 (en) 2004-06-25 2010-06-22 Tokyo Electron Limited High rate atomic layer deposition apparatus and method of using
US8039049B2 (en) * 2005-09-30 2011-10-18 Tokyo Electron Limited Treatment of low dielectric constant films using a batch processing system
JP4684866B2 (en) * 2005-11-17 2011-05-18 ルネサスエレクトロニクス株式会社 Manufacturing method of semiconductor device
US7923384B2 (en) * 2005-11-24 2011-04-12 Nec Corporation Formation method of porous insulating film, manufacturing apparatus of semiconductor device, manufacturing method of semiconductor device, and semiconductor device
US20070134435A1 (en) * 2005-12-13 2007-06-14 Ahn Sang H Method to improve the ashing/wet etch damage resistance and integration stability of low dielectric constant films
US7297376B1 (en) 2006-07-07 2007-11-20 Applied Materials, Inc. Method to reduce gas-phase reactions in a PECVD process with silicon and organic precursors to deposit defect-free initial layers
US7964442B2 (en) * 2007-10-09 2011-06-21 Applied Materials, Inc. Methods to obtain low k dielectric barrier with superior etch resistivity
JP2009177023A (en) * 2008-01-25 2009-08-06 Nec Corp Porous insulating film, method for forming the same and method for manufacturing semiconductor device
JP2011155077A (en) * 2010-01-26 2011-08-11 Renesas Electronics Corp Method of manufacturing semiconductor device
US8741394B2 (en) * 2010-03-25 2014-06-03 Novellus Systems, Inc. In-situ deposition of film stacks
US8461683B2 (en) * 2011-04-01 2013-06-11 Intel Corporation Self-forming, self-aligned barriers for back-end interconnects and methods of making same

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5040046A (en) * 1990-10-09 1991-08-13 Micron Technology, Inc. Process for forming highly conformal dielectric coatings in the manufacture of integrated circuits and product produced thereby
WO1992012535A1 (en) * 1991-01-08 1992-07-23 Fujitsu Limited Process for forming silicon oxide film
JP2684942B2 (en) * 1992-11-30 1997-12-03 日本電気株式会社 Chemical vapor deposition method, chemical vapor deposition apparatus, and method for manufacturing multilayer wiring
JP2899600B2 (en) * 1994-01-25 1999-06-02 キヤノン販売 株式会社 Film formation method
JPH098032A (en) * 1995-06-20 1997-01-10 Sony Corp Formation of insulation film
JP3226479B2 (en) * 1996-08-29 2001-11-05 松下電器産業株式会社 Method of forming interlayer insulating film
KR100205318B1 (en) * 1996-10-11 1999-07-01 구본준 Method of manufacturing insulating film with free electrons
WO1998050945A2 (en) 1997-05-07 1998-11-12 Skamser Daniel J Low density film for low dielectric constant applications
EP0881678A3 (en) 1997-05-28 2000-12-13 Texas Instruments Incorporated Improvements in or relating to porous dielectric structures
US6051321A (en) * 1997-10-24 2000-04-18 Quester Technology, Inc. Low dielectric constant materials and method
JP3726226B2 (en) 1998-02-05 2005-12-14 日本エー・エス・エム株式会社 Insulating film and manufacturing method thereof
US6287990B1 (en) * 1998-02-11 2001-09-11 Applied Materials, Inc. CVD plasma assisted low dielectric constant films
JP2000058544A (en) * 1998-08-04 2000-02-25 Matsushita Electron Corp Semiconductor device and manufacture of the same
JP3197007B2 (en) * 1999-06-08 2001-08-13 日本エー・エス・エム株式会社 Silicon polymer insulating film on semiconductor substrate and method for forming the film
JP3348084B2 (en) * 1999-12-28 2002-11-20 キヤノン販売株式会社 Film forming method and semiconductor device
JP3419745B2 (en) * 2000-02-28 2003-06-23 キヤノン販売株式会社 Semiconductor device and manufacturing method thereof
JP2001291713A (en) * 2000-04-07 2001-10-19 Canon Sales Co Inc Film forming method and semiconductor device
US6410462B1 (en) * 2000-05-12 2002-06-25 Sharp Laboratories Of America, Inc. Method of making low-K carbon doped silicon oxide
JP3600507B2 (en) * 2000-05-18 2004-12-15 キヤノン販売株式会社 Semiconductor device and manufacturing method thereof
JP3532830B2 (en) * 2000-05-24 2004-05-31 キヤノン販売株式会社 Semiconductor device and manufacturing method thereof
JP2003100148A (en) * 2001-09-25 2003-04-04 Jsr Corp Film formation method, insulating film and substrate for semiconductor

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