JP3681105B2 - Data processing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a data processing method for inputting / outputting data of a predetermined number of bits between a plurality of devices in an audio system or the like.
[0002]
[Prior art]
In some audio systems, digital audio data output from a CD player or the like is subjected to various correction processes using a DSP (Digital Signal Processor), and the corrected data is oversampled by a digital filter. It is carried out. In such an audio system, when correction processing is performed using a DSP, for example, if processing for raising the signal level of a predetermined band is performed, a large signal is maintained in a state where the number of bits of input digital data is maintained. When digital data corresponding to a level audio sound is input, the data obtained in the correction process may exceed the maximum value represented by this number of bits, resulting in distortion. Therefore, in practice, the signal level corresponding to the input digital data is lowered in consideration of the amplification of the signal generated by the correction process, and a predetermined correction process is performed after a margin is secured on the upper bit side. Yes.
[0003]
[Problems to be solved by the invention]
By the way, as described above, a DSP that performs a predetermined correction process in an audio system handles data having a larger number of bits than input / output data in internal processing, and therefore, when outputting data (transfers it to a digital filter in the subsequent stage) However, there is a problem that it is necessary to reduce the number of bits increased to perform internal processing, and information is deteriorated, that is, sound quality is deteriorated when information corresponding to the number of bits is lost. .
[0004]
FIG. 7 is a diagram for explaining correction processing performed in the above-described DSP. FIG. 8 is a diagram for explaining the number of bits of data before and after this correction processing. For example, the number of bits of digital data input / output to / from each of the DSP and the digital filter is 16. In the DSP, it is assumed that an equalizer process for emphasizing (amplifying) a part of frequency bands as shown in FIG. 7 is performed. As described above, when 16-bit digital data is input when the signal level of a part of the frequency band is amplified by the DSP, the entire input data is equivalent to a predetermined bit (for example, 2 bits) corresponding to the amplified amount. After the bit shift is performed, a predetermined equalizer process is performed. As a result, the number of bits of digital data handled in the DSP is 18 bits, which is 16 bits plus 2 bits. However, since the number of bits of data input / output between the DSP and the digital filter connected to the subsequent stage is 16, 16 bits from which the lower 2 bits of 18 bits, which are the internal data, are missing from the DSP Data is output. The information is deteriorated by the missing lower 2 bits.
[0005]
The present invention has been created in view of the above points, and an object of the present invention is to provide a data processing method capable of preventing deterioration of information.
[0006]
[Means for Solving the Problems]
In order to solve the above-described problem, in the data processing method of the present invention, the input L-bit data is converted into M-bit data by the data conversion means, and then predetermined data processing is performed by the data processing means. The data obtained as a result is subjected to oversampling processing of a predetermined multiple by the oversampling means, and then compressed to N bits by the bit compression means. When reducing the number of bits of data processed, the number of bits is reduced by temporally distributing the information corresponding to the reduced number of bits to multiple data obtained by oversampling. It is possible to prevent deterioration of information caused by.
[0007]
Therefore, it is desirable that the above-described oversampling processing means perform at least 2 ^MN times oversampling processing on input data. As a result, the information corresponding to the decreasing number of bits can be reliably distributed to a plurality of data obtained by the oversampling process, and the deterioration of the information can be surely prevented.
[0008]
Further, it is desirable to obtain N-bit compressed data by performing the ΣΔ modulation processing by the bit compression means described above. By combining ΣΔ modulation processing and oversampling processing, the number of data bits can be reduced without causing information degradation.
[0009]
It is also desirable to obtain N-bit data excluding the lower-order MN bits by performing dither addition processing by the above-described bit compression means. The dither addition process can probabilistically allocate missing M-N bits of information to a plurality of data, so that it is possible to prevent deterioration of information caused by reducing the number of bits. In particular, when the L-bit data input to the data conversion means described above is audio sound data, it is desirable to add a high-frequency concentrated dither whose band is limited to approximately 20 kHz or more by the bit compression means. By adding the high-frequency concentrated dither whose band is limited to approximately 20 kHz or more, it is possible to eliminate the influence on human hearing when the number of data bits is reduced.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an audio system according to an embodiment to which the data processing method of the present invention is applied will be described with reference to the drawings.
[0011]
FIG. 1 is a diagram illustrating a configuration of an audio system according to the present embodiment. An audio system 100 shown in FIG. 1 includes an audio device 1, a sound quality correction unit 2, an oversampling processing unit 3, a digital-analog (D / A) converter 4, a low-pass filter (LPF) 5, an amplifier 6, and a speaker 7. It consists of In FIG. 1, in order to simplify the description, monaural audio data is output from the audio device 1, but when stereo audio data is output, the sound quality correction unit 2 performs a subsequent stage. Each of these configurations may be provided for two or more channels.
[0012]
The audio apparatus 1 is an audio source that outputs audio data corresponding to various audio signals. For example, a CD player or the like corresponds to this. In the following description, it is assumed that the audio device 1 of the present embodiment outputs 24-bit audio data.
[0013]
The sound quality correction unit 2 performs sound quality correction that emphasizes the high frequency range and the low frequency range by performing predetermined data processing on the audio data output from the audio device 1 to change the frequency characteristics and the like. The sound quality correction unit 2 can be realized by a DSP, for example.
[0014]
The oversampling processing unit 3 performs oversampling processing on the corrected audio data output from the sound quality correction unit 2. This oversampling processing unit 3 can be realized by a digital filter.
[0015]
The D / A converter 4 converts the audio data output from the oversampling processing unit 3 into an analog signal. The LPF 5 smoothes the output signal of the D / A converter 4 that changes stepwise by removing high-frequency components (for example, a band of 20 kHz or more) of the analog signal output from the D / A converter 4. .
[0016]
The amplifier 6 amplifies the analog signal output from the LPF 5 with a predetermined gain and outputs a speaker driving signal. The speaker 7 outputs an audio sound corresponding to the driving signal output from the amplifier 6.
[0017]
FIG. 2 is a diagram showing a detailed configuration of the sound quality correction unit 2. As shown in FIG. 2, the sound quality correction unit 2 includes a level shift processing unit 20, an equalizer processing unit 22, an oversampling processing unit 24, and a ΣΔ modulation unit 26.
[0018]
The level shift processing unit 20 receives audio data input from the audio apparatus 1 as a predetermined bit in order to secure a margin for the signal level amplification (bit carry) generated by the equalizer processing by the equalizer processing unit 22 in the subsequent stage. The signal level is lowered by shifting the number of bits. In the present embodiment, when 24-bit audio data is input, the level shift processing unit 20 performs bit shift to the lower side by 2 bits corresponding to the amplification and outputs 26-bit digital data. Shall. As a result, in the 26-bit data, the upper 2 bits are “0”, and the input audio data is included in the lower 24 bits.
[0019]
The equalizer processing unit 22 performs equalizer processing such as emphasizing (amplifying) a part of the frequency band on the 26-bit digital data output from the level shift processing unit 20. For example, as shown in FIG. 7, an equalizer process is performed to amplify the signal level in a part of the middle sound range and maintain the signal level in the other frequency range.
[0020]
The oversampling processing unit 24 performs oversampling processing (upsampling processing) that artificially increases the sampling frequency for the digital data after the equalizer processing output from the equalizer processing unit 22. The number of times of oversampling processing is determined in consideration of how many bits of 26-bit digital data are suppressed (compressed) by the subsequent ΣΔ modulator 26. For example, when data of M bits (M = 26 in the above example) is compressed to N bits, it is desirable to perform at least 2 ^MN times oversampling processing.
[0021]
FIG. 3 is a diagram illustrating a specific example of the oversampling process performed by the oversampling processing unit 24. For example, a case where a fourfold oversampling process is performed is illustrated. First, 0 data (data having a value of 0) is inserted into the original data (FIG. 3A) input from the equalizer processing unit 22 (FIG. 3B). In the case of four times oversampling processing, three 0 data are inserted between two adjacent original data. In general, when X-times oversampling processing is performed, (X-1) 0 data may be inserted between two adjacent original data.
[0022]
Thereafter, the data in which one original data and three 0 data are alternately arranged in this way is passed through a low-pass filter so that the two adjacent original data are smoothly connected to each other. Three pieces of interpolation data are inserted, and a fourfold oversampling process is performed (FIG. 3C).
[0023]
The ΣΔ modulation unit 26 performs ΣΔ modulation processing on the digital data after oversampling processing input from the oversampling processing unit 24. This ΣΔ modulation is a method for converting the amplitude information of data into a temporal pulse width, and by performing this ΣΔ modulation, the number of bits of digital data can be compressed. In the present embodiment, the ΣΔ modulation unit 26 converts the 26-bit data output from the oversampling processing unit 24 into 24-bit data equal to the number of bits of audio data output from the audio device 1.
[0024]
FIG. 4 is a diagram illustrating a detailed configuration of the ΣΔ modulation unit 26. As shown in FIG. 4, the ΣΔ modulator 26 includes two adders 40 and 42, a subtractor 44, two multipliers 46 and 48, two delay units 50 and 52, and a quantizer 54. ing.
[0025]
Adders 40 and 42 add the quantization error delayed by a predetermined delay time to the input digital data. This quantization error is generated when the 26-bit digital data after passing through the adders 40 and 42 is converted into 24-bit digital data by the quantizer 54, and is input to the quantizer 54. The difference between the digital data before being processed and the digital data output from the quantizer 54 is calculated by the subtractor 44.
[0026]
The delay unit 52 delays the quantization error output from the subtractor 44 by a time corresponding to one sampling time of the digital data input to the ΣΔ modulation unit 26. Similarly, the delay unit 50 further delays the quantization error output from the delay unit 52 by a time corresponding to one sampling time. The multiplier 48 multiplies the quantization error output from the delay unit 52 by a multiplier “2”. Similarly, the multiplier 46 multiplies the quantization error output from the delay unit 50 by a multiplier “−1”.
[0027]
The level shift processing unit 20 described above corresponds to the data conversion unit, the equalizer processing unit 22 corresponds to the data processing unit, the oversampling processing unit 24 corresponds to the oversampling processing unit, and the ΣΔ modulation unit 26 corresponds to the bit compression unit.
[0028]
As described above, the sound quality correction unit 2 included in the audio system 100 according to the present embodiment performs the bit shift for 2 bits on the input 24-bit audio data and secures a margin on the upper bit side, and then equalizes the equalizer. Processing is performed, and the 26-bit digital data obtained as a result is subjected to four times oversampling processing, and then ΣΔ modulation processing is performed to obtain 24-bit digital data. By combining the oversampling process and the ΣΔ modulation process, it is possible to obtain information for 2 bits that is reduced when the number of bits of the 26-bit digital data after the equalizer process is reduced by 2 bits by the oversampling process. Since a plurality of digital data can be temporally distributed, it is possible to prevent deterioration of information caused by a decrease in the number of bits.
[0029]
In addition, this invention is not limited to the said embodiment, A various deformation | transformation implementation is possible within the range of the summary of this invention. For example, in the above-described embodiment, the sound quality correction unit 2 performs a process of compressing 26-bit digital data to 24 bits by performing a ΣΔ modulation process on the digital data after the oversampling process is performed. However, the compression processing of this number of bits may be performed by dither addition processing.
[0030]
FIG. 5 is a diagram showing a configuration of the sound quality correction unit 2a when the bit number compression process is performed by the dither addition process. The sound quality correction unit 2a shown in the figure has a configuration in which the ΣΔ modulation unit 26 included in the sound quality correction unit 2 shown in FIG. The dither addition unit 28 corresponds to a bit compression unit. The level shift processing unit 20, the equalizer processing unit 22, and the oversampling processing unit 24 included in the sound quality correction unit 2a are basically the same as those included in the sound quality correction unit 2 shown in FIG. Corresponding components are denoted by the same reference numerals, and detailed description of the operation is omitted.
[0031]
The dither addition unit 28 performs a predetermined dither addition process on the 26-bit digital data after the oversampling process output from the oversampling process unit 24 to convert it into 24-bit digital data. In the present embodiment, the dither addition unit 28 performs processing for adding high-frequency concentrated dither that is band-limited to 20 kHz or more to input digital data. In this way, by performing the process of adding the high-frequency concentrated dither, it is possible to probabilistically distribute the missing information for 2 bits to a plurality of digital data (digital data obtained by oversampling). Information deterioration can be prevented. In addition, since the high-frequency concentrated dither used in the present embodiment is small amplitude noise that is uniformly distributed in a band of 20 kHz or higher, the audio sound reproduced based on the digital data output from the dither addition unit 28 is used. When listening, there is no effect of a sense of incongruity on hearing. Note that a minute amplitude generated by adding the high-frequency concentrated dither may be removed by passing through a low-pass filter having a cutoff frequency of approximately 20 kHz in the subsequent stage.
[0032]
FIG. 6 is a diagram for explaining the principle of the compression processing of the number of bits by the dither addition processing. FIG. 6A shows the relationship between the input signal when the high frequency concentrated dither is not added and the quantization output corresponding thereto. FIG. 6B shows the relationship between the input signal when the high-frequency concentrated dither is added and the quantization output corresponding thereto.
[0033]
Simply deleting the lower bits without adding high-frequency concentrated dither means that the four types of information “00”, “01”, “10”, and “11” represented by the lower two bits are missing. It will be. As shown in FIG. 6A, when the input data is between 1 × Δ and 2 × Δ (Δ = 2 ² because 2 bits are compressed in this embodiment), for example, All are quantized and output as 3/2 values.
[0034]
However, the dither addition unit 28 of the present embodiment performs processing for deleting the lower 2 bits after adding ± Δ / 2 (= ± 2) high-frequency concentrated dither to the input data. For example, as shown in FIG. 6B, considering the case where the input data is (1 + 3/4) × Δ, by adding a dither of ± Δ / 2 to this input data, Data having a distribution with a width of 2.25Δ is obtained. In practice, since one piece of data included in this distribution is obtained, performing 24-bit quantization on such data means that this data is in the range of 75% corresponding to 1.25Δ to 2Δ. Is included in the range of 25% corresponding to 2Δ to 2.25Δ, the quantization output is 5/2. Therefore, when taking a temporal average, it is 1.75.
[0035]
In this way, even if dither addition processing is performed instead of performing ΣΔ modulation processing, information deterioration due to a decrease in the number of bits can be prevented by temporally dispersing the information for two missing bits. it can.
[0036]
In the above-described embodiment, the case where the number of bits of output data of a sound quality correction unit configured by a DSP is compressed has been described. However, the number of bits of output data in a DSP or other apparatus used for other purposes is described. The present invention can also be applied to the case of compression.
[0037]
In the above description of the embodiment, the number of bits of data input / output to / from the sound quality correction unit has been described as being 24 bits, but this is a case where the number of bits of input data is different from the number of bits of output data. Also good.
[0038]
【The invention's effect】
As described above, according to the present invention, the information corresponding to the reduction in the number of bits can be obtained by temporally distributing the information corresponding to the reduction in the number of bits to a plurality of data obtained by the oversampling process. Deterioration can be prevented.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a configuration of an audio system.
FIG. 2 is a diagram illustrating a detailed configuration of a sound quality correction unit.
FIG. 3 is a diagram illustrating a specific example of oversampling processing performed by an oversampling processing unit.
FIG. 4 is a diagram illustrating a detailed configuration of a ΣΔ modulation unit.
FIG. 5 is a diagram illustrating a configuration of a sound quality correction unit when a bit number compression process is performed by a dither addition process;
FIG. 6 is a diagram illustrating the principle of compression processing of the number of bits by dither addition processing.
FIG. 7 is a diagram for explaining correction processing performed in a DSP in a conventional audio system.
FIG. 8 is a diagram illustrating the number of data bits before and after correction processing;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Audio apparatus 2, 2a Sound quality correction part 3 Oversampling process part 4 Digital-analog (D / A) converter 5 Low pass filter (LPF)
6 Amplifier 7 Speaker 20 Level shift processing unit 22 Equalizer processing unit 24 Oversampling processing unit 26 ΣΔ modulation unit 28 Dither addition unit

Claims (5)

Data conversion means for converting the input L-bit data into M-bit data longer than the L bits by adding higher bits ;
Data processing means for performing predetermined data processing on M-bit data output from the data conversion means;
Oversampling processing means for performing oversampling processing on data output from the data processing means;
Bit compression means for performing bit number compression processing on M-bit data output from the oversampling processing means, and converting the data into N-bit data shorter than M bits;
A data processing method characterized by comprising: In claim 1,
The oversampling processing means performs an oversampling process of at least 2 ^MN times on input data. In claim 1 or 2,
The bit compression means obtains N-bit compressed data by performing ΣΔ modulation processing. In claim 1 or 2,
The bit compression means obtains N-bit data excluding lower MN bits after performing dither addition processing. In claim 4,
The L-bit data input to the data conversion means is audio sound data,
The bit compression means adds a high-frequency concentrated dither whose band is limited to approximately 20 kHz or more.

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