JP3656906B2 - Waveform data playback device with variable time axis - Google Patents

Description

・ＴＡＲｉ−ＤＥＳＴｉ＝１３９２７ （ｉ＝４，８のとき） ……（１４）
の関係となるように設定する。これは、（１２）式における１／４サンプル分を調整するため、３回分の読み出しの１ビートの長さを１３９２６サンプルとし、次の１回分の読み出しの１ビートの長さを１３９２７サンプルとしたものである。同様にして、（１１）式における１０／１９サンプル分を調整するため、１９小節のうちの１０小節は１１１４１１サンプルを読み出し、残りの９小節は１１１４１０サンプルを読み出すようにする。例えば、１９小節単位で、２，４，６，８，１０，１２，１４，１６，１８，１９番目の小節（１０小節分）の８ビート目の読み出しサンプル数を＋１すればよい。
【００３９】
なお、ここではテンポの補正を最後の拍で行なうようにしたが、先頭の拍や途中の拍で行なってもよい。また、テンポの補正を１小節単位ではなく、複数小節単位、または任意の複数拍単位で行なってもよい。
【００４０】
図２に戻って、図３および図４で説明した時間軸可変の波形データ再生を行なう書込＆読出再生部１０８の動作について詳しく説明する。
【００４１】
ＣＰＵ１０１は、上述したように計算したジャンプ先アドレスＤＥＳＴ１〜４、ジャンプ元アドレスＴＡＲ１〜４、およびフェードアウト開始点アドレスＦＯＵＴ１〜４の４セットのデータとフェード速度ＲＡＴＥをレジスタ群２０１〜２０４に設定する。カウンタ２１０は、使用するレジスタセットを特定するｉ＝１〜４の値を保持するレジスタである。読み出しが開始されるときカウンタ２１０はｉ＝１に初期化されるから、始めは、レジスタ群２０１〜２０３から、第１セットレジスタのアドレス（ＤＥＳＴ１，ＴＡＲ１，ＦＯＵＴ１）がそれぞれ出力される。
【００４２】
読み出しが開始されると、セレクタ２０５は最初にジャンプ先アドレスレジスタ群２０１からの入力を選択出力する。いまレジスタ群２０１からは、レジスタＤＥＳＴ１に設定されたアドレスが出力されているから、このＤＥＳＴ１に設定されたアドレスがセレクタ２０５を介して現在アドレスレジスタ２０６に設定される。現在アドレスレジスタ２０６に設定されたアドレスは、波形メモリ１０９に入力し、当該アドレスから波形データが読み出し出力される。アドレス加算器２０７は、サンプリング周期ごとに、現在アドレス２０６の値をカウントアップし、その結果をセレクタ２０５に入力する。セレクタ２０５は、上述したように最初にＤＥＳＴ１を選択出力した後は、アドレス加算器２０７からの入力を選択出力する。したがって、現在アドレスレジスタ２０６の値は、ＤＥＳＴ１から順次カウントアップされ、これにより波形メモリのＤＥＳＴ１から波形データが１サンプルずつ読み出される（図３（ａ）の矢印３２１）。
【００４３】
クロスフェードカーブ発生器２１１は、読み出しが開始されてから、所定の速度でフェードインするような乗数を乗算器２１２に出力する。乗算器２１２は、読み出された波形サンプルにクロスフェードカーブ発生器２１１からの乗数を乗算して出力する。これにより、波形データの読み出し開始時のフェードインが実現される。
【００４４】
比較器２０９は、フェード開始点レジスタ群２０３からの出力とアドレス加算器２０７からの出力とを比較する。いまレジスタ群２０３からは、レジスタＦＯＵＴ１に設定されたアドレスが出力されている。これらが一致したとき、すなわち現在アドレスがＦＯＵＴ１に至ったとき、比較器２０９は一致信号を出力する。この一致信号は、クロスフェードカーブ発生器２１１に入力する。クロスフェードカーブ発生器２１１は、この一致信号により現在アドレスがＦＯＵＴ１に至ったことを検出し、この時点からレジスタ２０４に設定された速度でフェードアウトするような乗数を乗算器２１２に出力する。乗算器２１２は、読み出された波形サンプルにクロスフェードカーブ発生器２１１からの乗数を乗算して出力する。これにより、現在アドレスがＦＯＵＴ１に至ったとき以降のフェードアウトが実現される。
【００４５】
比較器２０８は、ジャンプ元アドレスレジスタ群２０２からの出力とアドレス加算器２０７からの出力とを比較する。いまレジスタ群２０２からは、レジスタＴＡＲ１に設定されたアドレスが出力されている。これらが一致したとき、すなわち現在アドレスがＴＡＲ１に至ったとき、比較器２０８は一致信号を出力する。この一致信号は、セレクタ２０５、カウンタ２１０、およびクロスフェードカーブ発生器２１１に入力する。これによりカウンタ２１０はｉ＝１から２にカウントアップするので、レジスタ群２０１からはレジスタＤＥＳＴ２に設定されたアドレス、レジスタ群２０２からはレジスタＴＡＲ２に設定されたアドレス、レジスタ群２０３からはレジスタＦＯＵＴ２に設定されたアドレスが出力される。また、比較器２０８からの一致信号を受けたセレクタ２０５は、ジャンプ先アドレスレジスタ２０１からの入力を選択出力する。これ以降の動作は、上述のｉ＝１の場合と同様である。カウンタ２１０がｉ＝１，２，３，４とカウントアップされるのに伴って処理が進み、ｉ＝４の後は再びｉ＝１に設定され、上述の処理を繰り返す。なお、ＣＰＵ１０１は順次ジャンプ先アドレスＤＥＳＴ１〜４、ジャンプ元アドレスＴＡＲ１〜４、およびフェードアウト開始点アドレスＦＯＵＴ１〜４のデータを書き替えていく。
【００４６】
以上のように処理を進めることにより、書込＆読出再生部１０８は、時間軸可変の波形データ再生を実現する。
【００４７】
図５は、時間軸制御レジスタ（ＤＥＳＴ１〜４，ＴＡＲ１〜４，ＦＯＵＴ１〜４）の更新タイミングを示す図である。５０１は読出される波形データを示す。ａ，ｂ，ｃ，…は、それぞれ時間軸制御レジスタに設定する１セットのデータ（ジャンプ先アドレス、ジャンプ元アドレス、およびフェードアウト開始点アドレス）を示す。
【００４８】
読み出しを開始するとき、ＣＰＵ１０１は、５２１に示すように４セット分のデータを時間軸制御レジスタに設定する。矩形５２１内に記載したａｂｃｄは、セットデータａ，ｂ，ｃ，ｄを、この順に、第１〜第４セットレジスタに設定したことを示す。矩形５２２，５２３，…についても同様である。読み出し開始タイミング５１１から、第１セットレジスタに設定されたセットデータａにしたがって波形データが読み出される。セットデータａにしたがう波形データの読み出しが終了すると、次のセットデータｂにしたがう波形データの読み出しに移行する。また、セットデータａにしたがう波形データの読み出しが終了したタイミングで割り込みが発生し、ＣＰＵ１０１は、この割り込みを契機として時間区間５１２で次のセットデータｅを第１セットレジスタに設定する（５２２）。同様にして、セットデータｂにしたがう波形データの読み出しが終了したタイミングで割り込みが発生し、ＣＰＵ１０１は、この割り込みを契機として時間区間５１３で次のセットデータｆを第１セットレジスタに設定する（５２３）。
【００４９】
セットデータの設定は、２セット単位で行なうこともできる。例えば、５５１に示すように４セット分のデータを設定した後、波形データの読み出しを開始し、セットデータａ，ｂにしたがう波形データ読み出しが終了したタイミングで割り込みを発生させ、時間区間５４２で２セット分のデータｅ，ｆを書き込む。これを繰返すことにより波形データを読出すことができる。
【００５０】
上記実施形態によれば、現在の読み出しアドレスがジャンプ元アドレスに達する前に、少なくともその次のジャンプ元アドレスの設定を終えているようにしているので、安定した動作が可能である。
【００５１】
なお、上記実施形態では、再生すべき波形データのサンプル数Ｍをビート数で割り切れる整数としたが、必ずしも割り切れる数でなくてもよい。割り算の結果１以下の分数が生じてしまった場合には、波形データの各ビート先頭位置に、生じてしまった分数に対応する補正をかけてやればよい。例えば、ビート数８で割った結果の余りが３で、分数３／８が生じてしまった場合は、８ビートの波形の３番目と６番目と８番目を＋１すればよい。
【００５２】
また、各ビートの先頭位置は、必ずしも等間隔である必要はない。ユーザが、各ビートの先頭位置を個別に指定できるようになっていてもよい。あるいは、波形データから音の立ち上がり位置を検出し、その検出結果に基づいて各ビートの先頭位置を自動的に決定するようにしてもよい。
【００５３】
各ビート位置が等間隔でない場合、テンポを変えつつ波形データを再生する際の各ビートの長さは、波形データの元のテンポ、再生するテンポ、および各ビート先頭位置間のサンプル数とに基づいて決定するとよい。すなわち、波形データのテンポを変更した場合でも、各ビート毎のサンプル数の比率が保たれるようにする。また、この場合も、再生される全ビート分の波形データのサンプル数がテンポとビート数に応じて決定されるサンプル数に合致するよう補正をかける必要がある。
【００５４】
さらにまた、各ビート位置が等間隔でない場合に、そのビート位置をテンポに応じた正確なビート位置に修正し（いわゆる波形データのクォンタイズ）、その修正後のビート位置を基準に時間軸の伸縮を行うようにしてもよい。
【００５５】
波形データのビート先頭位置のアドレスをビート数に基づいて毎回算出する必要はない。すなわち、波形データの再生時にビート先頭位置の計算するのではなく、各波形データ毎に予め決定しておいてその波形データに対応するデータとして記憶しておくのがよい。
【００５６】
上記実施形態では、レジスタ群２０１〜２０４を、ビートを単位として更新していたが、その代わりに、ジャンプを単位に更新を行なうようにしてもよい。すなわち、ジャンプ先アドレスＤＥＳＴｉとジャンプ元アドレスＴＡＲｉを組として更新を行なうのではなく、ジャンプ元アドレスＴＡＲｉとジャンプ先アドレスＤＥＳＴ（ｉ＋１）とを組にして、その組単位でレジスタの更新を行なうようにしてもよい。
【００５７】
【発明の効果】
以上説明したように、この発明によれば、時間軸制御データに基づいてジャンプ元アドレスとジャンプ先アドレスとを設定するだけで、読み出しアドレスを移行させながら読み出しを行なうことができるので、ＣＰＵで直接波形サンプルを扱う必要がなく、ＣＰＵの負荷が小さい。また、時間軸制御をサンプリング周期で行なうことができる。さらに、ジャンプ元アドレスとジャンプ先アドレスとの組を複数組記憶できるようにしているので、ＣＰＵによる制御が一時的に遅れても、時間軸制御された波形データの再生が破綻しない。また、再生すべき時間区間でのサンプル数と、各組のジャンプ先アドレスからジャンプ元アドレスまでの読み出しサンプル数の和にずれがあるときは、ジャンプ先アドレスからジャンプ元アドレスまでの読み出しを所定回数行なうごとに、その所定回数の読み出しの各組のジャンプ先アドレスからジャンプ元アドレスまでの読み出しサンプル数を調整して、ずれ量の補正を行なっているので、例えばディジタルレコーダのテンポマップで規定されたテンポからずれることなく、正確な時間軸制御が可能である。また、各拍ごとに補正をするのに比べて、補正に要する演算量を大幅に減少できる。
【図面の簡単な説明】
【図１】この発明に係る時間軸可変の波形データ再生装置を適用したディジタルレコーダのブロック構成図
【図２】書込＆読出再生部による時間軸可変の読出再生機能を実現するための構成図
【図３】書込＆読出再生部１０８による波形メモリの読み出しアドレスの進行の様子を示すタイミング図
【図４】出力される波形データの例を示す図
【図５】時間軸制御レジスタの更新タイミングを示す図
【符号の説明】
１０１…中央処理装置（ＣＰＵ）、１０２…フラッシュメモリ、１０３…ランダムアクセスメモリ（ＲＡＭ）、１０４…表示器、１０５…フェーダ、１０６…操作子、１０７…ＰＣ入出力インターフェース（Ｉ／Ｏ）、１１１…書込＆読出再生部、１１２…波形メモリ、１１３…ミキサ、１１４…波形入力部、１１５…波形出力部、１１６…転送部、１１７…バッファメモリ、１１８…ＩＤＥ（Integrated Device Electromics）インターフェース、１１９…ハードディスク、１２０…ＣＤ−ＲＷ（CD-rewritable）ドライブ、１３０…バスライン１３０。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a time-variable waveform data reproducing apparatus capable of reproducing waveform data by expanding and contracting in the time axis direction.
[0002]
[Prior art]
Conventionally, a sampler capable of time axis control is known. This can be expanded and contracted in the time axis direction when reproducing sampled (recorded) waveform data. A sampler capable of tempo synchronization is also known. This is because when the loop mode is set, the loop waveform can be synchronized with the tempo, that is, when the tempo of the song changes, the loop waveform is compressed and expanded in the time axis direction in synchronization with the changed tempo. It can be played back.
[0003]
On the other hand, a digital recorder for recording digital data with a tempo map function added is known. In this method, when a new song is created, a tempo map for controlling the tempo change in the song is created prior to recording. For example, the tempo map has a tempo of 100 BPM at the start of the song (BPM is a unit representing the tempo by the number of quarter notes per minute), tempo 120 BPM from the 10th measure, 100 BPM again from the 14th measure, ... Is a screen for presetting the tempo of each range of the song. Thereby, the user can set arbitrary tempo information within an arbitrary range in the song. During recording, a metronome sound with a tempo corresponding to the created tempo map is generated, and the performer plays his part while listening to the metronome sound. Record the performance on the track corresponding to the part. In this way, the performance of each part of the plurality of parts is performed sequentially, and the musical tones that have been performed are recorded on different tracks. After the performances of all parts are recorded, the musical sounds recorded on a plurality of tracks are mixed down to obtain, for example, stereo two-channel musical sounds. As described above, a plurality of tracks can be recorded at a tempo according to the setting of the tempo map.
[0004]
[Problems to be solved by the invention]
By the way, as a conventional sampler system capable of time axis control as described above, firstly, there is a method in which the CPU arranges each waveform sample in each sampling period to perform compression and expansion in the time axis direction. This is because when the original waveform data is played back in a certain time interval determined according to the tempo, the waveform data is divided, and which sample is read at each sampling period of the time interval is determined and arranged. It is something to do. According to this, expansion and contraction in the time axis direction can be managed with arbitrary accuracy. However, there is a problem that the time axis control processing must be performed for the number of waveform samples corresponding to the sampling frequency every second, and the load on the CPU is large.
[0005]
As a sampler system capable of time axis control, second, a CPU supplies a trigger for starting reproduction of each waveform data sliced to a sound source, and the sound source reproduces each waveform data in accordance with the trigger. is there. According to this, since the CPU only needs to handle data for controlling the reproduction of waveform data such as a trigger (it is not necessary to handle the waveform sample itself), the load on the CPU is small. However, since the CPU performs various processes other than the time axis control of the waveform data, there is a problem that it is difficult to increase the accuracy of the trigger timing.
[0006]
A conventional sampler capable of tempo synchronization has a problem that tempo synchronization with respect to the tempo map of the digital recorder gradually shifts when performing time axis control with the accuracy of the sampling period.
[0007]
The present invention provides a time-variable waveform data reproducing apparatus capable of compressing or expanding waveform data in the time-axis direction, reducing the load on the CPU, and reproducing time-controlled waveform data without failing. Another object of the present invention is to provide a waveform data reproducing apparatus capable of performing reproduction by accurately controlling the time axis without deviating from a predetermined desired tempo as in the case of setting with a tempo map.
[0008]
[Means for Solving the Problems]
  In order to achieve this object, the invention according to claim 1A memory for storing a control program; a CPU for controlling the operation of the entire apparatus by executing the control program; waveform storage means for storing waveform data; andWaveform dataReadReproduceAnd a reading / reproducing unitA waveform data reproducing device,The read / playback unit generates a read address that proceeds in sequence, a means for reading out and reproducing waveform data from the waveform storage means with the generated read address, and an address for storing a jump source address and a jump destination address Storage means and readingWhen the address reaches the jump source address,Reading generated by the generating meansMeans for transferring an address to the jump destination address corresponding to the jump source address;And when the readout / reproduction unit is performing readout / reproduction of the waveform data, the CPU includes, based on the time axis control data for controlling expansion / contraction of the time axis of the waveform data, in the waveform data to be read out. Time axis expansion / contraction control of the waveform data to be read is performed by executing processing for sequentially setting a jump source address, which is a predetermined position in the waveform sample unit, and a jump destination address corresponding to the jump source address in the address storage means.It is characterized by that.
[0009]
  The invention according to claim 2 is described in claim 1.Wave ofData playback deviceBecause,In the process of setting the jump source address and the jump destination address, the CPUCurrentReadAddressIs setBefore reaching the jump source addressSmallAt least the next jump source address has been set.
[0010]
  The invention according to claim 3 is described in claim 1.Wave ofData playback deviceBecause,The waveform data stored in the waveform storage means includes waveform data for a plurality of beats, and the CPUSaidJump source address andJump destination addressAndSetIn processing, The jump destination addressWaveShape dataofMultiple beat start positionsTo each ofIt is characterized by setting sequentially.
[0011]
  The invention according to claim 4A memory for storing a control program; a CPU for controlling the operation of the entire apparatus by executing the control program; waveform storage means for storing waveform data; andWaveform dataReadReproduceAnd a reading / reproducing unitA waveform data reproducing device,The read / playback unit includes a generation unit that generates a read address that sequentially proceeds, a unit that reads and reproduces waveform data from the waveform storage unit using the generated read address,Address storage means for storing a first set, a second set,..., And an Nth set of jump destination addresses expressed in waveform sample units in the waveform data and jump source addresses corresponding to the jump destination addresses. When,For the generating means, first,The first set of jump destination addresses of the waveform dataIs set as the read address of the generating meansAndReadIf the address reaches the first jump source addressKidaiTwo sets of jump destination addressesIs set to the read address of the generating means.,ReadIf the address reaches the second set of jump source addressesKidai3 sets of jump destination addressesIs set to the read address of the generating means....ReadIf the address reaches the Nth set of jump source addressesKidaiA set of jump destination addressesIs set to the read address of the generating means.While using the N sets of addresses cyclically,ReadMigrated addressMakeMeansAnd when the read / playback unit is reading and playing the waveform data, the CPU selects the jump source address from among the N sets of jump destination addresses and jump source addresses stored in the address storage means. A set of the i-th set of jump destination addresses and the i-th set of jump source addresses or the i-th set of jump source addresses and the (i + 1) -th set of jump destination addresses that are already used for the transfer of the read address by the transfer means. Time of waveform data to be read out by executing processing for setting a jump destination address and a jump source address to be used next based on time axis control data for controlling expansion and contraction of the time axis of waveform data. Perform axis expansion / contraction controlIt is characterized by that.
  According to a fifth aspect of the present invention, in the waveform data reproducing device according to the fourth aspect, the CPU uses the jump source address used next in the process of setting the jump source address and jump destination address used next. And jump destination addresses are set in the address storage means for one set or two sets.
[0012]
  Claim6The invention according to claim 4 is the waveform data reproducing device with variable time axis according to claim 4,The CPU performs a process of setting a jump source address and a jump destination address to be used next.The set of addresses already used for reading out of the N setsButNextRead onAt a predetermined timing until it is usedExecuteIt is characterized by that.
[0013]
  According to a seventh aspect of the present invention, in the waveform data reproducing device according to any one of the first to sixth aspects, the CPU sets each beat in the waveform data prior to the process of setting the jump source address and the jump destination address. Based on the process of determining the start position of each waveform data as the jump destination address of each beat, and the sampling frequency, tempo, time signature and beat of the waveform data to be reproduced,By finding the number of waveform samples in a measure and dividing the number of waveform samples equally by the number of beats in one measureCalculating the number of samples for one beat including an integer part and a fractional part, and calculating the number of samples of waveform data of each beat by adjusting the integer part according to the fractional part; and And a step of determining a position obtained by adding the calculated number of samples of each beat to the head position of the determined waveform data of each beat as a jump source address of each beat.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0015]
FIG. 1 is a block diagram of a digital recorder to which a time-variable waveform data reproducing apparatus according to the present invention is applied. This system includes a central processing unit (CPU) 101, a flash memory 102, a random access memory (RAM) 103, a display 104, a fader 105, an operator 106, a PC input / output interface (I / O) 107, writing and reading. Playback unit 111, waveform memory 112, mixer 113, waveform input unit 114, waveform output unit 115, transfer unit 116, buffer memory 117, IDE (Integrated Device Electromics) interface 118, hard disk 119, CD-RW (CD-rewritable) drive 120 and a bus line 130.
[0016]
The CPU 101 is a processing device that controls the overall operation of the system. The flash memory 102 is a nonvolatile memory that stores various control programs executed by the CPU 101 and various data used by the CPU 101. The flash memory 102 can be rewritten, and stored information is not lost even when the power is turned off. The RAM 103 is a volatile memory used for a load area and a work area for programs executed by the CPU 101. The display device 104 is a display for displaying various information provided on the external panel of the system. A fader 105 is an operator for setting various parameter values provided on the external panel of the system. The operator 106 is various operators provided on the external panel of this system. The operation element 106 includes a plurality of pads for operation by the user.
[0017]
The PC I / O 107 is an interface for connecting to an external PC device. The write & read reproduction unit 111 is a part for realizing a sampler function to be described later, writes waveform data input from the outside to the waveform memory 112, and reads and reproduces the waveform data stored in the waveform memory 112. Perform processing. The waveform memory 112 is a storage device that stores externally input waveform data (sampled).
[0018]
The mixer 113 includes a waveform data from the waveform memory 112 input via the write & read reproduction unit 111, a waveform data input from the waveform input unit 114, and a hard disk 119 and a CD-RW drive input via the transfer unit 116. Waveform data from 120 are mixed in any combination. The mixing result is output to the waveform output unit 115 and the transfer unit 116. The waveform input unit 114 converts an analog musical tone signal input from a microphone into digital waveform data and supplies the digital waveform data to the mixer 113. The waveform output unit 115 outputs the waveform data supplied from the mixer 113. The output waveform data is converted into an analog musical tone signal as necessary and emitted by a sound system (not shown).
[0019]
The mixer 113 is actually constituted by a digital signal processor (DSP). The mixer 113 performs the processing of a plurality of tracks in parallel by time division multiplexing processing performed in units of sampling periods. The input / output to / from the mixer 113 is basically to input / output one sample of waveform data at one sampling period. The peripheral units that perform waveform input / output with respect to the mixer 113 input / output waveform data in synchronization with the time division processing of the mixer 113. For example, when a performance sound input from a predetermined microphone is recorded on a predetermined track, the waveform data input from the microphone and converted into digital data by the waveform input unit 114 is time for the mixer 113 to process the track. The timing is adjusted so that the waveform is supplied from the waveform input unit 114 to the mixer 113 by a thread. Similarly, the waveform data output in the time thread for outputting the waveform of the track from the mixer 113 is received by the transfer unit 116 at the output timing, and the waveform data is written in the file corresponding to the track. It is processed.
[0020]
The transfer unit 116 controls transfer between the hard disk 119 and the buffer memory 117 and transfer between the buffer memory 117 and the mixer 113 (1 sample / sampling period × reproduction or number of recording tracks) in accordance with an instruction from the CPU 101. The buffer memory 117 is provided with storage areas for a plurality of tracks, and can be recorded / reproduced for a plurality of tracks simultaneously.
[0021]
Recording for one track is performed as follows. The transfer unit 116 receives the sample from the mixer 113 at the timing of the sampling period at which one sample of waveform data to be recorded on the track is output, and writes the sample in the storage area of the track in the buffer memory 117. When a sample for one cluster is accumulated in the storage area of the track of the buffer memory 117, the sample is transferred to the track storage area of the hard disk 119. The waveform data is transferred from the transfer unit 116 to the hard disk 119 when data for one cluster is accumulated, and is independent of the transfer synchronized with the sampling period between the mixer 113 and the transfer unit 116. Accordingly, the above-described writing operation to the buffer memory 117 is continued while the transfer from the transfer unit 116 to the hard disk 119 is performed.
[0022]
Playback for one track is performed as follows. First, samples of two or more clusters at the head of a track to be reproduced are read from the hard disk 119 and written in a storage area corresponding to the track in the buffer memory 117. The transfer unit 116 reads one sample of the track from the buffer memory 117 and passes it to the mixer 113 at the timing of the sampling period when the mixer 113 inputs the waveform data of the track. When an empty area for one cluster (storage area for the sample that has been reproduced) is created in the buffer memory 117, data for the subsequent one cluster is transferred from the hard disk 119 to the empty area. The data transfer from the hard disk 119 to the buffer memory 117 is performed independently of the data transfer between the mixer 113 and the transfer unit 116 as in the case of recording.
[0023]
The IDE I / O 118 is an interface for connecting the hard disk 119 and the CD-RW drive 120 to the transfer unit 116. The IDEI / O 118 is also an interface between the hard disk 119 and the CD-RW drive 120 and the CPU 101, flash memory 102, and RAM 103. The hard disk 119 is an external storage device for storing performance data. The CD-RW drive 120 is a device that reads or writes data by inserting a CD, CD-R, or CD-RW.
[0024]
The recorder function by the transfer unit 116 and the sampler function realized by using the writing & reading reproduction unit 111 will be described. The CPU 101 reads the waveform data written in the hard disk 119 using the recorder function by the transfer unit 116 as described above, and creates waveform data to be stored in the waveform memory 112 from the waveform data on the RAM 103. For example, the recorded waveform data is cut off before and after it so that it fits into one measure of four quarters. The created waveform data is written into the waveform memory 112 in accordance with an instruction from the CPU 101. This system includes a plurality of pads. When each pad is operated during reproduction, the waveform data on the waveform memory 112 assigned to the pad is read and reproduced. At this time, it is possible to compress and expand the time axis of the waveform data. The time-axis compression / decompression is performed by the writing & reading reproduction unit 108 in accordance with an instruction from the CPU 101.
[0025]
FIG. 2 shows a configuration for realizing a reading / reproducing function with variable time axis by the writing & reading reproducing unit 108 of FIG. The write & read reproduction unit 108 includes a jump destination address register group (DEST1-4), a jump source address register group (TAR1-4), a fadeout start point register group (FOUT1-4), a fade speed register (RATE) 204, A selector 205, a current address register 206, an address adder 207, comparators 208 and 209, a counter 210, a crossfade curve generator 211, and a multiplier 212 are provided. The write & read reproduction unit 108 can perform processing of a plurality of channels by time division multiplex processing. Here, the configuration for one channel is shown.
[0026]
The register groups 201 to 204 are registers used when reproducing waveform data on this channel. The CPU 101 can read waveform data that is time-axis controlled as desired by setting values in these register groups 201 to 204. The jump destination address register group (DEST1 to 4) 201 is a register for setting four jump destination addresses. The jump source address register group (TAR1 to 4) 202 is a setting register for four jump source addresses. The fade-out start point register group 203 is a register that sets four fade-out start point addresses indicating positions where fade-out is started. The fade speed register 204 is a register for setting a fade-out speed (rate).
[0027]
For register groups 201 to 203 each composed of four registers, n = 1 to 4 and DESTn, TARn, and FOUTn are used as one set (4 sets in total). One set of DESTn, TARn, and FOUTn is called an nth set register. Note that a register and data set in the register are referred to by the same symbol. For example, the data set in the register DEST1 for setting the jump destination address is called the jump destination address DEST1.
[0028]
Before explaining the operation of each unit in FIG. 2, a method of advancing the read address for reproducing the waveform data by expanding and contracting in the time axis direction will be described.
[0029]
FIG. 3A is a timing chart showing the progress of the read address of the waveform memory by the write & read reproduction unit 108. 301 represents the waveform data to be read. The right-pointing arrows 321, 322, and 323 above them indicate the directions in which waveform samples are read from the waveform data 301 at each sampling period. That is, the read address proceeds in the direction of the arrow. Note that the reading speed of the waveform data from the waveform memory is constant at one sample / sampling period for each channel. The waveform data to be read has a unique tempo (tempo when sampling), but this tempo may be an arbitrary value.
[0030]
As described above, as parameters for time axis control, the CPU 101 determines, for each channel (that is, for each sound generation), jump destination addresses DEST1 to DEST4, jump source addresses TAR1 to 4, and fade-out start point addresses FOUT1 to FOUT1. 4 sets of 4 data and one fade speed RATE can be set. Reading of the waveform data starts from the jump destination address DEST1. As shown by the arrow 321, the read address is advanced by one for each sampling period to read the waveform sample. When the waveform sample is advanced to the jump source address TAR1, the read address is shifted to the next jump destination address DEST2. Similarly, when the read address is advanced from the jump destination address DEST2 as shown by the arrow 322 and the next jump source address TAR2 is advanced, the process proceeds to the next jump destination address DEST3. The read address is advanced in this way, and when the jump source address TAR4 is reached, the read address is shifted to the next jump destination address DEST1. By the time the read address is jumped from TAR4 to DEST1, the addresses DEST1, TAR1, and FOUT1 are rewritten to the next data to be used. In this way, among the four sets of address registers described above, the CPU 101 sequentially updates the register that has been read by the address written therein, in units of sets, as shown in FIG. The time-controlled waveform data is continuously reproduced.
[0031]
Reference numeral 331 in FIG. 3 indicates the state of fade-in and fade-out of waveform data that is read out by advancing the read address as indicated by an arrow 321. When reading is started from the jump destination address DEST1, fade-in is performed at a predetermined speed and waveform data is output. The fade-out timing 311 is controlled so that the fade-out is started when the fade-out start point address FOUT1 is reached, and the fade-out is ended when the jump source address TAR1 is reached. The same applies to the waveform data 332 and 333 in the subsequent reading. The fade-out speed is based on the setting of the fade speed register 204.
[0032]
In order to simplify the description, the symbols DEST1 to 4, TAR1 to 4, FOUT1 to 4 indicating the address registers and the addresses set therein are expanded and used to represent the subsequent set addresses. . For example, as for the jump destination address, the registers are used in the order of DEST1, DEST2, DEST3, and DEST4. The address used next to DEST4 uses the data set in the register DEST1 again, but is used next to DEST4. The address to be written is denoted as DEST5. The subsequent addresses are also written in order as DEST6, DEST7,. In other words, an address sequentially calculated by the CPU 101 as a jump destination address is DESTn (n is a positive integer), DEST1 → DEST2 → DEST3 → DEST4 → DEST5 → DEST6 →... → DESTn (n is a positive integer) →. Address DESTn is stored in register DESTn ′ (where n ′ is the remainder when (1) n divided by 4 is 1 to 3, and (2) when n is divisible by 4) It is set to). The same applies to TARn and FOUTn.
[0033]
FIG. 3B shows a state of reading when reading is performed with the waveform data extended from the tempo (at a slower tempo). Reference numerals 341 to 343 denote waveform data. The waveform data is preliminarily divided into beat units, and 341 indicates the first beat, 342 indicates the second beat, and 343 indicates the third beat. Even when the tempo is slowed down, the address advance is the same as described with reference to FIG. However, fade-out from the position where the data 341 of the first beat that started reading from DEST1 ends, playback of the first beat is completed up to TAR1 through a silent period, reading continues from DEST2, and the second beat is started. Fading out from the position where the data 342 ends, the playback of the second beat is finished up to TAR2 through the silent section, and so on. Here, the end position of the first beat data 341 is FOUT1, the end position of the second beat data 342 is FOUT2, and so on, but the position of FOUT is not limited to this. However, it is necessary to fade out to a position where the attack portion of the next beat is not output.
[0034]
FIG. 4 shows an example of output waveform data. Reference numeral 401 denotes output waveform data. BLOCK 0, 1, 2,... Therein indicate waveform data read from the jump destination address DESTn such as 331, 332, and 333 in FIG. 402 is an enlarged view of BLOCK0-3. The waveform data read by each BLOCK is connected.
[0035]
Next, a specific example in which the CPU 101 sets a jump destination address, a jump source address, and a fade-out start point address will be described.
[0036]
(First specific example)
When waveform data is reproduced at a sampling frequency Fs of 44.1 kHz, a tempo of 90 BPM, 4/4 time, and 8 beats, the CPU 101 calculates the number of samples per beat as follows. First, because the tempo is 90 BPM and 4/4 time,
1 bar length = (60/90) x 4 = 8/3 seconds
It is. Therefore,
Number of samples in one measure = 44100 x (8/3) = 117600 samples
It is. Since one measure is 8 beats,
1 beat length = 117600/8 = 14700 samples
It is. Therefore, the jump destination address and the jump source address are:
TARi-DESTi = 14700 (1)
It becomes the relationship.
[0037]
The waveform data to be reproduced is prepared by the CPU 101 by editing the sampled waveform. Therefore, for example, waveform data such as a waveform for 8 beats used for 4/4 time signatures or a waveform for 12 beats used for 3 time signatures can be generated. Here, the waveform data to be reproduced is data of which the number of samples for 8 beats is M (M is an integer divisible by 8), and the time axis control is performed so that this waveform data is reproduced in one measure at the above-described tempo. Then. First, the top address of the waveform data is set in DEST1. Further, since there are 8 beats per bar, there is a beat start position for every M / 8 samples from the beginning of the waveform data. Therefore,
DESTj + 1 = DESTj + M / 8 (j = 1-7) (2)
It is. TARi may be obtained from equation (1). That is, each TARi is calculated based on the length per beat corresponding to the tempo and each DESTi (beat start position). As described above, the jump destination address DESTi and the jump source address TARi (i = 1 to 8) for reproducing one measure can be calculated. The fade-out start point address FOUTi may be set a predetermined sample before the jump source address TARi. However, in the case of FIG. 3B, the end position of each beat is set as FOUTi.
[0038]
(Second specific example)
When reproducing waveform data at a sampling frequency Fs of 44.1 kHz, tempo 95 BPM, 4/4 time, 8 beats, the CPU 101 calculates the number of samples per beat as follows. First, because the tempo is 95 BPM and 4/4 time,
1 bar length = (60/95) x 4 = 48/19 seconds
It is. Therefore,
Number of samples in one measure = 44100 × (48/19) = 111410 + (10/19) samples (11)
It is. From the integer part 111410 of the above equation (11),
Length of one beat = 111410/8 = 13926 + (1/4) sample (12)
It is. So, jump destination address and jump source address,

TARi-DESTi = 13927 (when i = 4, 8) (14)
Set so that This is because the length of one beat for three readings is set to 13926 samples and the length of one beat for the next reading is set to 13927 samples in order to adjust the ¼ sample in equation (12). Is. Similarly, in order to adjust 10/19 samples in Equation (11), 10 out of 19 bars read 111411 samples, and the remaining 9 bars read 111410 samples. For example, the number of read samples at the eighth beat of the second, fourth, sixth, eighth, tenth, twelfth, fourteenth, sixteenth, eighteenth and nineteenth measures (for ten measures) may be incremented by one.
[0039]
Although the tempo correction is performed at the last beat here, it may be performed at the first beat or the middle beat. Further, the tempo correction may be performed not in units of one measure but in units of a plurality of measures or in units of arbitrary multiple beats.
[0040]
Returning to FIG. 2, the operation of the write & read reproduction unit 108 for performing the time axis variable waveform data reproduction described with reference to FIGS. 3 and 4 will be described in detail.
[0041]
The CPU 101 sets four sets of data of the jump destination addresses DEST1 to DEST4, the jump source addresses TAR1 to TAR4, and the fadeout start point addresses FOUT1 to FEAT4 calculated as described above and the fade speed RATE in the register groups 201 to 204. The counter 210 is a register that holds values of i = 1 to 4 that specify a register set to be used. Since the counter 210 is initialized to i = 1 when reading is started, first, the addresses (DEST1, TAR1, FOUT1) of the first set registers are output from the register groups 201-203, respectively.
[0042]
When reading is started, the selector 205 first selects and outputs the input from the jump destination address register group 201. Since the address set in the register DEST 1 is now output from the register group 201, the address set in the DEST 1 is set in the current address register 206 via the selector 205. The address set in the current address register 206 is input to the waveform memory 109, and the waveform data is read out from the address and output. The address adder 207 counts up the value of the current address 206 for each sampling period, and inputs the result to the selector 205. The selector 205 selects and outputs the input from the address adder 207 after first selecting and outputting DEST1 as described above. Therefore, the value of the current address register 206 is sequentially counted up from DEST1, thereby reading out waveform data sample by sample from DEST1 of the waveform memory (arrow 321 in FIG. 3A).
[0043]
The cross fade curve generator 211 outputs a multiplier that fades in at a predetermined speed to the multiplier 212 after the reading is started. The multiplier 212 multiplies the read waveform sample by the multiplier from the crossfade curve generator 211 and outputs the result. Thereby, fade-in at the start of reading waveform data is realized.
[0044]
The comparator 209 compares the output from the fade start point register group 203 with the output from the address adder 207. From the register group 203, the address set in the register FOUT1 is output. When they match, that is, when the current address reaches FOUT1, the comparator 209 outputs a match signal. This coincidence signal is input to the crossfade curve generator 211. The crossfade curve generator 211 detects that the current address has reached FOUT1 based on the coincidence signal, and outputs a multiplier that fades out at the speed set in the register 204 to the multiplier 212 from this point. The multiplier 212 multiplies the read waveform sample by the multiplier from the crossfade curve generator 211 and outputs the result. As a result, the fade-out after the current address reaches FOUT1 is realized.
[0045]
The comparator 208 compares the output from the jump source address register group 202 with the output from the address adder 207. The address set in the register TAR1 is output from the register group 202 now. When they match, that is, when the current address reaches TAR1, the comparator 208 outputs a match signal. The coincidence signal is input to the selector 205, the counter 210, and the crossfade curve generator 211. As a result, the counter 210 counts up from i = 1 to 2, so that the address set in the register DEST2 from the register group 201, the address set in the register TAR2 from the register group 202, and the register FOUT2 from the register group 203 The set address is output. Further, the selector 205 that has received the coincidence signal from the comparator 208 selects and outputs the input from the jump destination address register 201. The subsequent operation is the same as in the case of i = 1. The processing proceeds as the counter 210 counts up to i = 1, 2, 3, 4, and after i = 4, i = 1 is set again, and the above processing is repeated. The CPU 101 sequentially rewrites the data of the jump destination addresses DEST1 to DEST4, the jump source addresses TAR1 to TAR4, and the fade-out start point addresses FOUT1 to FOUT4.
[0046]
By proceeding as described above, the writing & reading reproduction unit 108 realizes waveform data reproduction with a variable time axis.
[0047]
FIG. 5 is a diagram showing the update timing of the time axis control registers (DEST1 to 4, TAR1 to 4, FOUT1 to 4). Reference numeral 501 denotes waveform data to be read. a, b, c,... each indicate a set of data (jump destination address, jump source address, and fade-out start point address) set in the time axis control register.
[0048]
When starting the reading, the CPU 101 sets four sets of data in the time axis control register as indicated by 521. The abcd described in the rectangle 521 indicates that the set data a, b, c, d are set in the first to fourth set registers in this order. The same applies to the rectangles 522, 523,. From the read start timing 511, the waveform data is read according to the set data a set in the first set register. When the reading of the waveform data according to the set data a is completed, the process proceeds to reading of the waveform data according to the next set data b. Further, an interrupt is generated at the timing when the reading of the waveform data according to the set data a is completed, and the CPU 101 sets the next set data e in the first set register in the time interval 512 using this interrupt (522). Similarly, an interrupt is generated at the timing when the reading of the waveform data according to the set data b is completed, and the CPU 101 sets the next set data f in the first set register in the time interval 513 using this interrupt as a trigger (523). ).
[0049]
Set data can be set in units of two sets. For example, after four sets of data are set as shown at 551, waveform data reading is started, and an interrupt is generated at the timing when waveform data reading according to the set data a and b is completed. Write set data e and f. By repeating this, the waveform data can be read.
[0050]
According to the embodiment, since the setting of at least the next jump source address is completed before the current read address reaches the jump source address, stable operation is possible.
[0051]
In the above embodiment, the number M of samples of waveform data to be reproduced is an integer divisible by the number of beats. However, the number may not necessarily be divisible. If a fraction of 1 or less occurs as a result of the division, correction corresponding to the generated fraction may be applied to each beat start position of the waveform data. For example, if the remainder of the result of dividing by the number of beats is 3 and a fraction of 3/8 is generated, the third, sixth and eighth positions of the 8-beat waveform may be incremented by one.
[0052]
Further, the start positions of the beats do not necessarily have to be equally spaced. The user may be able to individually specify the start position of each beat. Alternatively, the rising position of the sound may be detected from the waveform data, and the head position of each beat may be automatically determined based on the detection result.
[0053]
If the beat positions are not equally spaced, the length of each beat when playing waveform data while changing the tempo is based on the original tempo of the waveform data, the playback tempo, and the number of samples between each beat start position. It is good to decide. That is, even when the tempo of the waveform data is changed, the ratio of the number of samples for each beat is maintained. Also in this case, it is necessary to perform correction so that the number of samples of waveform data for all beats to be reproduced matches the number of samples determined according to the tempo and the number of beats.
[0054]
Furthermore, when each beat position is not equally spaced, the beat position is corrected to an accurate beat position according to the tempo (so-called waveform data quantization), and the time axis is expanded or contracted based on the corrected beat position. You may make it perform.
[0055]
It is not necessary to calculate the beat start position address of the waveform data every time based on the number of beats. That is, instead of calculating the beat start position when reproducing the waveform data, it is preferable to predetermine each waveform data and store it as data corresponding to the waveform data.
[0056]
In the above-described embodiment, the register groups 201 to 204 are updated in units of beats, but instead, updating may be performed in units of jumps. That is, instead of updating the jump destination address DESTi and the jump source address TARi as a set, the jump source address TARI and the jump destination address DEST (i + 1) are set as a set and the register is updated in units of the set. May be.
[0057]
【The invention's effect】
As described above, according to the present invention, it is possible to perform reading while shifting the read address by simply setting the jump source address and the jump destination address based on the time axis control data. There is no need to handle waveform samples and the load on the CPU is small. Further, the time axis control can be performed at the sampling period. Furthermore, since a plurality of sets of jump source addresses and jump destination addresses can be stored, even if the control by the CPU is temporarily delayed, the reproduction of the waveform data controlled in time axis does not fail. If there is a difference between the number of samples in the time interval to be played back and the number of read samples from each jump destination address to the jump source address, the number of reads from the jump destination address to the jump source address is a predetermined number of times. Each time it is performed, the number of read samples from the jump destination address to the jump source address of each set of the predetermined number of times of read is adjusted to correct the deviation amount. For example, it is defined by the tempo map of the digital recorder Accurate time axis control is possible without deviating from the tempo. In addition, the amount of calculation required for correction can be greatly reduced as compared with correction for each beat.
[Brief description of the drawings]
FIG. 1 is a block diagram of a digital recorder to which a time axis variable waveform data reproducing apparatus according to the present invention is applied.
FIG. 2 is a block diagram for realizing a time-variable reading / reproducing function by a writing & reading reproducing unit;
FIG. 3 is a timing chart showing how a read address of a waveform memory is advanced by the write & read reproduction unit 108;
FIG. 4 is a diagram showing an example of output waveform data
FIG. 5 is a diagram showing the update timing of the time axis control register
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 101 ... Central processing unit (CPU), 102 ... Flash memory, 103 ... Random access memory (RAM), 104 ... Display, 105 ... Fader, 106 ... Operator, 107 ... PC input / output interface (I / O), 111 DESCRIPTION OF SYMBOLS WRITE & READ REPRODUCING UNIT 112 ... WAVEFORM MEMORY, 113 ... MIXER, 114 ... WAVEFORM INPUT UNIT, 115 ... WAVEFORM OUTPUT UNIT, 116 ... TRANSFER, 117 ... BUFFER MEMORY, 118 ... IDE (Integrated Device Electromics) Interface ... Hard disk, 120... CD-RW (CD-rewritable) drive, 130.

Claims (7)

A memory for storing a control program;
A CPU that executes the control program and controls the operation of the entire apparatus;
Waveform storage means for storing waveform data;
A waveform data reproducing apparatus comprising a read / reproducing unit that is controlled by the CPU and reads out and reproduces waveform data from the waveform storage means;
The read / playback unit
Generating means for generating read addresses that proceed sequentially;
Means for reading and reproducing the waveform data from the waveform storage means at the generated read address;
Address storage means for storing a jump source address and a jump destination address;
Means for shifting the read address generated by the generating means to the jump destination address corresponding to the jump source address when the read address reaches the jump source address;
When the read / playback unit is reading and playing the waveform data, the CPU
Based on the time axis control data for controlling the expansion and contraction of the time axis of the waveform data, the jump source address that is a predetermined position of the waveform sample unit in the waveform data to be read and the jump destination address corresponding to the jump source address A waveform data reproducing apparatus for performing time-axis expansion / contraction control of waveform data to be read out by executing processing for sequentially setting in an address storage means. The waveform data reproducing device according to claim 1,
In the process of setting the jump source address and the jump destination address, the CPU
A waveform data reproducing apparatus, wherein at least the next jump source address has been set before the current read address reaches the set jump source address. The waveform data reproducing device according to claim 1,
The waveform data stored in the waveform storage means includes waveform data for a plurality of beats,
The CPU sequentially sets the jump destination address to each of a plurality of beat head positions of the waveform data in the process of setting the jump source address and the jump destination address. A memory for storing a control program;
A CPU that executes the control program and controls the operation of the entire apparatus;
Waveform storage means for storing waveform data;
A waveform data reproducing apparatus comprising a read / reproducing unit that is controlled by the CPU and reads out and reproduces waveform data from the waveform storage means;
The read / playback unit
Generating means for generating read addresses that proceed sequentially;
Means for reading and reproducing the waveform data from the waveform storage means at the generated read address;
Address storage means for storing a first set, a second set,..., And an Nth set of jump destination addresses expressed in waveform sample units in the waveform data and jump source addresses corresponding to the jump destination addresses. When,
First, for the generation means, the first set of jump destination addresses of the waveform data is set as the read address of the generation means, and when the read address reaches the first set of jump source addresses, the second set of jump destination addresses. The address is set to the read address of the generating means, and when the read address reaches the second set of jump source addresses, the third set of jump destination addresses is set to the read address of the generating means,. When N sets of jump source addresses are reached, the first set of jump destination addresses is set as the read address of the generating means, and the read addresses are shifted while cyclically using the N sets of addresses. Means and
When the read / playback unit is reading and playing the waveform data, the CPU
Of the N sets of jump destination addresses and jump source addresses stored in the address storage means, the i th jump destination address and the i th set that have already been used for transfer of the read address by the means for shifting the jump source address Next, based on the time axis control data for controlling the expansion and contraction of the time axis of the waveform data, for the set of the jump source address of the first group or the set of the i th jump source address and the (i + 1) th jump destination address, A waveform data reproducing apparatus for performing time axis expansion / contraction control of waveform data to be read out by executing a process of setting a jump destination address and a jump source address used in In the waveform data reproducing device according to claim 4,
The CPU sets the jump source address and the jump destination address to be used next,
The waveform data reproducing apparatus characterized in that the next jump source address and the jump destination address to be used next are set in the address storage means for one set or two sets. In the waveform data reproducing device according to claim 4,
The CPU performs a process of setting a jump source address and a jump destination address to be used next.
The waveform data reproducing apparatus, which is executed at a predetermined timing until a set of addresses already used for reading out of the N sets is used for next reading. In the waveform data reproducing device according to any one of claims 1 to 6,
Prior to the process of setting the jump source address and the jump destination address, the CPU
A process of determining the start position of the waveform data of each beat in the waveform data as a jump destination address of each beat;
Based on the sampling frequency, tempo, time signature, and beat of the waveform data to be reproduced, the number of waveform samples in one measure is obtained, and the number of waveform samples is equally divided by the number of beats in one measure. And calculating the number of samples of waveform data of each beat by calculating the number of samples for one beat including the fractional part and adjusting the integer part according to the fractional part,
And determining the position obtained by adding the calculated number of samples of each beat to the start position of the waveform data of each beat determined as a jump source address of each beat. Playback device.

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