JP3611788B2 - Microcomputer timer calibration system - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a timer calibration system in a microcomputer that performs timer counting by a program.
[0002]
[Prior art]
Control devices using microcomputers are used in various electrical and electronic equipment, but in order to make the mounted parts as cheap as possible, the oscillation circuit for the operation clock signal is used without using a crystal or ceramic oscillator. An oscillator circuit may be used. In such a control device, the time is measured by a timer count by a program, but the time measurement is usually performed based on the operation clock.
[0003]
However, the CR oscillation circuit is less expensive than an oscillation circuit using a vibrator such as crystal or ceramic, but has a disadvantage that the oscillation frequency varies greatly and is not suitable when accuracy is required. .
[0004]
Therefore, for example, as disclosed in JP-A-11-052080, a timer count program for counting the timer count time by adding the number of instruction execution cycles is provided in the control program, and a reference signal is input from the outside. The period of the reference signal is counted by the number of execution cycles of the microcomputer, and when the signal under measurement is input, the time of the signal under measurement is measured according to how many times the period of the reference signal is repeated. Yes.
[0005]
[Problems to be solved by the invention]
However, the above-described apparatus has a problem that a program for a microcomputer needs to be added with a function for counting reference signals, so that the program becomes long and requires a large ROM capacity for storing the program. . In addition, since the period of the reference signal is stored and the measurement of the signal under measurement is performed according to how many times this period is repeated during input of the signal under measurement, the accuracy is the period of the reference signal. In addition, there is a problem that high-precision time measurement cannot be performed.
[0006]
An object of the present invention is to provide a timer calibration system for a microcomputer that can prevent the program built in the microcomputer from becoming long and can count the timer count time with high accuracy.
[0007]
[Means for Solving the Problems]
The present invention provides a timer calibration system for a microcomputer that includes a CR oscillation circuit that forms an operation clock signal and includes a timer count program that counts a timer count time by adding the number of instruction execution cycles.
The program is
A normal operation mode routine comprising a processing unit A having a predetermined number of instruction execution cycles and a loop routine B that repeatedly executes as many times as stored in the memory;
A processing unit B having the same number of instruction execution cycles as the processing unit A, changing the number of times stored in the memory based on a signal from an external input terminal, or performing an adjustment end operation; and the loop routine B; A loop routine C having the same routine structure, and a step of outputting to the external output terminal a pulse having the processing time of the processing unit B and the loop routine C as one cycle, and a reference signal adjustment operation mode routine. ,
The external input terminal is connected to the external output terminal and the external input terminal, and a signal to increase or decrease the number of times or a signal to end the adjustment according to a comparison result of the period of a pulse from the external output terminal and a reference pulse A reference signal adjusting device for outputting to a terminal is provided.
[0008]
In the timer calibration system of the present invention, a reference signal adjustment device is connected to the microcomputer when performing timer calibration. The reference signal adjustment device is connected, the microcomputer is set to the reference signal adjustment operation mode, and this reference signal adjustment operation mode routine is executed. Then, the frequency variation of the CR oscillation circuit is automatically corrected, and timer calibration is performed.
[0009]
That is, the microcomputer includes a normal operation mode routine and a reference signal adjustment operation mode routine. The normal operation mode routine includes a processing unit A having a predetermined number of instruction execution cycles and a loop routine B that repeatedly executes the number of times stored in the memory. Therefore, once this normal operation mode routine is executed, the execution time is the sum of the time required for the processing unit A and the time required for executing the loop routine B. At this time, if the number of times stored in the memory is changed, the processing time of the loop routine B changes, and as a result, the execution time of the normal operation mode routine changes. In the present invention, the number of times stored in the memory is set to an appropriate value by the reference signal adjustment operation mode routine. As a result, even if there is a variation in the frequency of the CR oscillation circuit, a value for correcting it is stored in the memory, so that one execution time of the normal operation mode routine is a predetermined time, that is, the frequency of the CR oscillation circuit. Can be adjusted to the time when is the correct value. By this adjustment, timer calibration is performed.
[0010]
The reference signal adjustment operation mode routine basically has the same structure as the processing unit A and loop routine B of the normal operation mode routine. That is, a processing unit B for the processing unit A and a loop routine C for the loop routine B are provided. Then, the number of times stored in the memory is changed based on a signal from the external input terminal, and a pulse having the processing time of the processing unit B and the loop routine C as one cycle is output to the external output terminal. With such a configuration, the reference signal adjustment device connected to the microcomputer is operated simultaneously. This reference signal adjusting device includes an oscillation circuit that oscillates at an accurate frequency and includes an oscillator such as ceramic or crystal. Then, a signal to increase or decrease the number of times stored in the memory or a signal to end adjustment is formed according to a comparison result of the period of the pulse from the external output terminal and the reference pulse generated in the reference signal adjustment device. This is output to the external input terminal of the microcomputer. That is, if the pulse input from the microcomputer has a longer period than the reference pulse, a signal to decrease the number of times is output so that the pulse of the microcomputer becomes shorter, and vice versa. Output a signal. When the two match, a signal to end adjustment is output.
[0011]
In the microcomputer, when the number of times is changed in order to change the number of times stored in the memory based on the signal from the reference signal adjustment device or to complete the adjustment, the reference signal adjustment device is The period of the output pulse is also changed. In this way, by exchanging between the two, a signal to be adjusted is finally returned from the reference signal adjusting device to the microcomputer. In the reference signal adjustment operation mode routine of the microcomputer, the adjustment end operation is performed when a signal to end the adjustment is received. The number of times stored in the memory at this time is obtained by correcting the frequency variation of the CR oscillation circuit. Thereafter, by storing this value in the non-volatile memory, it is possible to count the accurate timer count time even in the CR oscillation circuit thereafter.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a block diagram of a timer calibration system according to an embodiment of the present invention.
The control device 1 incorporates a microcomputer therein and is incorporated into an arbitrary electronic device or the like. As will be described later, the control device 1 includes a normal operation mode routine and a reference signal adjustment operation mode routine. When the control device 1 is incorporated in an electronic device or the like, the normal operation mode routine is executed. The reference signal adjustment operation mode routine is executed when the reference signal adjustment device 2 shown in FIG. 1 is connected and set to the reference signal adjustment operation mode.
[0013]
The control device 1 includes the following terminals.
[0014]
SIGOUT: A pulse signal is output during execution of the reference signal adjustment operation mode routine.
[0015]
FUPIN: A frequency up signal is input from the reference signal adjustment device 2.
[0016]
FDNIN: A frequency down signal is input from the reference signal adjustment device 2.
[0017]
FSIGIN: An adjustment end signal is input from the reference signal adjustment device 2.
[0018]
MODE: An operation mode switching signal indicating whether the operation mode is the normal operation mode or the reference signal adjustment operation mode is input. This operation mode switching signal can be set to the normal operation mode by setting the reference signal adjustment operation mode by connecting to the GND level and disconnecting the operation mode switching signal, for example.
[0019]
The reference signal adjustment operation mode is normally performed once before the control device 1 is operated, but may be appropriately performed according to a change with time of the CR oscillation circuit in the microcomputer. The reference signal adjustment device 2 is connected to the control device 1 only when executing this reference signal adjustment operation mode, and it is not necessary to connect the adjustment device 2 to the control device 1 in normal times.
[0020]
The external input terminal of the present invention corresponds to the FUPIN, FDNIN, and FSIGIN terminals of the control device 1, and the external output terminal corresponds to the SIGOUT terminal. In addition, the SIGIN, FUPOUT, FDNOUT, and FSIGOUT terminals of the reference signal adjusting device 2 are connected to the SIGOUT, FUPIN, FDNIN, FDNIN, and FSIGIN terminals of the control device 1, respectively.
[0021]
Next, operations of the control device 1 and the reference signal adjustment device 2 will be described with reference to FIG.
[0022]
2 and 3 are flowcharts showing the operation of the control device 1.
[0023]
In step 10, the control device 1 determines the level of the operation mode switching signal, and sets either the normal operation mode or the reference signal adjustment operation mode. When the operation mode switching signal is “L”, the normal operation mode after step 11 is executed, and when the operation mode switching signal is “H”, the reference signal adjustment operation mode routine after step 20 is executed. .
[0024]
In the normal operation mode, first, in step 11, EEPROM data is transferred to the memory mem1. Next, process A is executed in step 12, and the contents of the memory mem1 are transferred to the counter CNT in step 13. In step 14 and step 15, a loop is performed by the number of times of this counter. When the counter CNT becomes 0, the carry flag CF becomes 1 and the process returns to step 12 again.
[0025]
In the above processing, the number of instruction execution cycles in the processing A is fixed to 470 cycles. In the loop routine of Step 13 to Step 15, 12 cycles are executed in Step 13, and the number of cycles corresponding to the number of loops stored in the memory mem1 in Step 14 and Step 15 is executed. Therefore, in the normal operation mode, the timer count time corresponding to the number of times stored in the memory mem1 can be counted in Step 12 to Step 15.
[0026]
When the operation mode switching signal is “H”, the process proceeds from step 10 to step 20, and the reference signal adjustment operation mode routine is executed.
[0027]
The basic structure of this mode is basically the same as that of the normal operation mode routine. That is, the process A of step 12 corresponds to the process B from step 21 to step 41, and the loop routine B of step 13 to step 15 corresponds to the loop routine C of step 42 to step 44.
[0028]
First, in step 20, a constant 129 is set as an initial value. The reason why the initial value is 129 is that the center value of the operating frequency of the microcomputer is assumed to be 1 MHz here.
[0029]
In step 21, the SIGOUT terminal is set to “H”. As a result, the external output signal rises to “H”. In steps 22, 25 and 28, the external input terminal is monitored. In steps 23, 26, and 30, the number of times stored in the memory mem1 is changed based on a signal from the external input terminal, or processing for an adjustment end operation is performed.
[0030]
That is, when the input terminal FUPIN is “H” (indicating that the current CR oscillation frequency should be increased as will be described later), the number of times stored in the memory mem1 is decremented in step 23, and step 25 When the input terminal FDNIN is “H” (indicating that the current CR oscillation frequency should be lowered as will be described later), the number of times stored in the memory mem1 is incremented in step 26, and in step 28 When the input terminal FSIGIN is “H” (indicating that the current CR oscillation frequency matches the reference frequency and is appropriate as will be described later), in step 30, the contents of the current memory mem1 are changed. Transfer to EEPROM.
[0031]
Steps 24 and 27 are NOP processes, and have the same number of instruction execution cycles as Steps 23 and 26, respectively. Step 29 is a time waiting step. From Step 21 to Step 29, time waiting is performed in Step 29 so that the total number of instruction execution cycles is 235 cycles. To wait for the time, it is possible to execute a process such as looping a command such as NOP as many times as necessary.
[0032]
In steps 22, 25 and 28, when each external input terminal is “L”, the contents of the memory mem1 are not changed, and the process proceeds to step 40 (see FIG. 3). In step 40, the external output terminal SIGOUT is dropped to "L". As a result, the output changes from “H” to “L”. In the next step 41, time is waited. That is, in steps 40 and 41, the time is waited in step 41 so that a total of 235 cycles is obtained.
[0033]
The total number of instruction execution cycles in process B from step 21 to step 41 is 235 + 235 = 470 cycles, which is the same as the total number of instruction execution cycles in process A of step 12 of the normal operation mode routine.
[0034]
Subsequently, in the loop routine C of step 42 to step 44, the same loop routine as that of step 13 to step 15 is executed. When this loop routine C ends, the process jumps to step 21 again and the same processing is repeated thereafter. By repeating this operation, the external output terminal becomes “H” in step 21 and the pulse that becomes “L” in step 40 is continuously output. The pulse period is determined based on the contents (the number of repetitions of the loop routine) stored in the memory mem1.
[0035]
FIG. 4 is a flowchart showing the operation of the reference signal adjustment device 2.
[0036]
In step 50, the period Tsig of the pulse input to the SIGIN terminal is measured. The pulse input to this terminal is a pulse output from the external output terminal of the control device 1. In step 51, it is determined whether or not the period of Tsig is the same as the reference period Ts. The reference period Ts is a period of a reference pulse oscillated in the reference signal adjusting device 2 using a high-precision element such as a crystal oscillator. If they are different, the process proceeds to step 53 to determine the magnitude of both. If the cycle of the input pulse is shorter than the reference cycle (if the frequency is high), the process proceeds to step 55 where the terminal FUPOUT is set to “L”, the terminal FDNOUT is set to “H”, and the external input terminal FDNIN of the control device 1 is set. In contrast, a signal whose frequency is to be lowered is output. If the cycle of the input pulse is longer than the reference cycle (if the frequency is low), the process proceeds to step 54 where the terminal FUPOUT is set to “H”, the terminal FDNOUT is set to “L”, and the external input terminal FUPIN of the control device 1 is connected. On the other hand, a signal for raising the frequency is output. In step 51, if the period of the input pulse coincides with the reference period, in step 52, the terminals FUPOUT and FDNOUT are set to “L”, and the FSIGOUT terminal is set to “H”. As a result, a signal indicating the “H” adjustment end operation is input to the input terminal FSIGIN of the control device 1.
[0037]
As described above, when the operation mode switching signal becomes “H” and the reference signal adjustment operation mode is entered, the reference signal adjustment operation mode routine including steps 21 to 44 of the control device 1 and the reference signal adjustment device 2 is exchanged with the routine of step 50 to step 55. Finally, the contents of the memory mem1 are adjusted so that the CR oscillation frequency cycle of the control device 1 becomes the reference cycle, and the value is stored in the EEPROM. The adjustment is completed after being stored.
[0038]
When the adjustment is completed, the operation mode switching signal is set to “L”. Thereafter, the normal operation mode routine in step 11 and subsequent steps is executed, and an accurate timer count time is counted.
[0039]
The adjustment operation will be described below using specific numerical values.
[0040]
The operating frequency of the microcomputer is 800 kHz, and the number of instruction cycles is 8 clocks.
[0041]
When the adjustment operation is performed under the above conditions, when the operation is first started with the memory mem1 = 129 (step 20), the cycle of the pulse output from the SIGOUT at this time is
235 + 235 + 12 + 4 × 129 + 2 = 1000 cycles 1000 × 8/800000 = 0.01 s
And the period is 10 ms. In this case, if the reference period is 8 ms, the external input terminal FUPIN on the control device 1 side becomes “H”, so the value of the memory mem1 is decreased, and when the memory mem1 = 79,
235 + 235 + 12 + 4 × 79 + 2 = 800 cycles 800 × 8/800000 = 0.008 s
And coincides with the reference period of 8 ms. At this stage, the adjustment operation ends.
[0042]
【The invention's effect】
According to the present invention, since it is not necessary to add a function for counting the reference signal to the microcomputer side, there is an advantage that the program for that purpose does not become long. Further, since the adjustment resolution is the time required for one processing of the loop routine C, highly accurate timer calibration can be performed.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of a timer calibration system for a microcomputer according to an embodiment of the present invention. FIG. 2 is a flowchart showing an operation of a main part of a control device. Flow chart showing the operation of the main part of the reference signal adjustment device

Claims (1)

In a timer calibration system for a microcomputer that includes a CR oscillation circuit that forms an operation clock signal and includes a timer count program that counts a timer count time by adding the number of instruction execution cycles,
The program is
A normal operation mode routine comprising a processing unit A having a predetermined number of instruction execution cycles and a loop routine B that repeatedly executes as many times as stored in the memory;
A processing unit B having the same number of instruction execution cycles as the processing unit A, changing the number of times stored in the memory based on a signal from an external input terminal, or performing an adjustment end operation; and the loop routine B; A loop routine C having the same routine structure, and a step of outputting to the external output terminal a pulse having the processing time of the processing unit B and the loop routine C as one cycle, and a reference signal adjustment operation mode routine. ,
The external input terminal is connected to the external output terminal and the external input terminal, and a signal to increase or decrease the number of times or a signal to end the adjustment according to a comparison result of the period of a pulse from the external output terminal and a reference pulse A timer calibration system for a microcomputer, characterized in that a reference signal adjustment device for output to a terminal is provided

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