JP3589172B2 - Field emission electron source - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a field emission type electron source that emits an electron beam by field emission.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, as a field emission electron source, there is a so-called Spindt electrode disclosed in, for example, US Pat. No. 3,665,241. This Spindt-type electrode has a substrate on which a number of minute triangular pyramid-shaped emitter chips are arranged, a gate layer having a radiation hole for exposing the tip of the emitter chip, and being arranged insulated from the emitter chip. And applying a high voltage with the emitter tip as a negative electrode to the gate layer in a vacuum to emit an electron beam from the tip of the emitter tip through a radiation hole.
[0003]
However, the Spindt-type electrode has a complicated manufacturing process, and it is difficult to accurately configure a large number of triangular pyramid-shaped emitter chips. For example, it is difficult to increase the area when applied to a flat light emitting device or a display. There was a problem. In the Spindt-type electrode, the electric field is concentrated at the tip of the emitter tip, so if the degree of vacuum around the tip of the emitter tip is low and residual gas exists, the emitted gas turns the residual gas into positive ions. Since the positive ions are ionized and collide with the tip of the emitter tip, the tip of the emitter tip is damaged (for example, damage due to ion bombardment), and the current density and efficiency of emitted electrons become unstable, There is a problem that the life of the chip is shortened. Therefore, in a Spindt-type electrode, a high vacuum (about 10^-5Pa to about 10^-6Pa), there is a problem that the cost increases and the handling becomes troublesome.
[0004]
In order to improve this kind of problem, a MIM (Metal Insulator Metal) system and a MOS (Metal Oxide Semiconductor) type field emission electron source have been proposed. The former is a flat field emission type electron source having a metal-insulating film-metal structure, and the latter is a metal-oxide film-semiconductor stacked structure. However, in order to increase the emission efficiency of electrons in this type of field emission electron source (to emit a large number of electrons), it is necessary to reduce the thickness of the insulating film and the oxide film. If the thickness of the insulating film or the oxide film is too thin, dielectric breakdown may occur when a voltage is applied between the upper and lower electrodes of the laminated structure, and in order to prevent such dielectric breakdown, Since the thickness of the insulating film or the oxide film is limited, the electron emission efficiency (drawing efficiency) cannot be increased.
[0005]
In recent years, as disclosed in JP-A-8-250766, a single-crystal semiconductor substrate such as a silicon substrate is used, and one surface of the semiconductor substrate is anodized to form a porous semiconductor layer (porous semiconductor layer). A field emission electron source (semiconductor) configured to form a silicon thin film, form a metal thin film on the porous semiconductor layer, and apply a voltage between the semiconductor substrate and the metal thin film to emit electrons. Cold electron-emitting devices) have been proposed.
[0006]
However, the field emission type electron source described in Japanese Patent Application Laid-Open No. 8-250766 has a problem that it is difficult to increase the area and reduce the cost because the substrate is limited to a semiconductor substrate. Further, in the field emission type electron source described in JP-A-8-250766, a so-called popping phenomenon is apt to occur during electron emission, and the amount of emitted electrons tends to be uneven. There is a problem that can be done.
[0007]
In view of this, the inventors of the present application have disclosed in Japanese Patent Application Nos. 10-272340 and 10-272342 that a porous polycrystalline semiconductor layer (for example, a polycrystalline silicon layer made porous) is subjected to rapid thermal oxidation (RTO). ) A field emission type electron source that forms a strong electric field drift layer that is interposed between a conductive substrate and a metal thin film (surface electrode) and drifts electrons injected from the conductive substrate by rapid thermal oxidation by technology Proposed. In the field emission type electron source 10 ′, for example, as shown in FIG. 9, a strong electric field drift layer 6 made of an oxidized porous polycrystalline silicon layer is formed on the main surface side of an n-type silicon substrate 1 serving as a conductive substrate. Then, a surface electrode 7 made of a metal thin film is formed on the strong electric field drift layer 6, and an ohmic electrode 2 is formed on the back surface of the n-type silicon substrate 1.
[0008]
In the field emission type electron source 10 'having the configuration shown in FIG. 9, the surface electrode 7 is disposed in a vacuum, and the collector electrode 21 is disposed opposite the surface electrode 7 as shown in FIG. A DC voltage Vps is applied as a positive electrode to the silicon substrate 1 (ohmic electrode 2), and a DC voltage Vc is applied to the surface electrode 7 as a positive electrode from the n-type silicon substrate 1. The drifted electrons drift in the strong electric field drift layer 6 and are emitted through the surface electrode 7 (the dashed line in FIG. 10 indicates the electron e emitted through the surface electrode 7).⁻Shows the flow of). Therefore, it is desirable to use a material having a small work function as the surface electrode 7. Here, a current flowing between the surface electrode 7 and the ohmic electrode 2 is referred to as a diode current Ips, and a current flowing between the collector electrode 21 and the surface electrode 7 is referred to as an emission electron current Ie. The electron emission efficiency increases as the current Ie increases (Ie / Ips increases). In this field emission type electron source 10 ′, electrons can be emitted even when the DC voltage Vps applied between the surface electrode 7 and the ohmic electrode 2 is as low as about 10 to 20 V.
[0009]
In the field emission type electron source 10 ′, the electron emission characteristics have a small dependence on the degree of vacuum and the electrons can be stably emitted at a high electron emission efficiency without generating a popping phenomenon at the time of electron emission. Here, as shown in FIG. 11, the strong electric field drift layer 6 includes at least a columnar polycrystalline silicon (grain) 51 arranged substantially orthogonal to the main surface of the n-type silicon substrate 1 and a polycrystalline silicon. A thin silicon oxide film 52 formed on the surface of the microcrystalline silicon layer 51, a microcrystalline silicon layer 63 of nanometer order interposed between the polycrystalline silicon 51, and a crystal of the microcrystalline silicon layer 63 formed on the surface of the microcrystalline silicon layer 63. It is considered to be composed of a silicon oxide film 64 which is an insulating film having a thickness smaller than the particle diameter. That is, in the strong electric field drift layer 6, it is considered that the surface of each grain is porous and the crystalline state is maintained in the central portion of each grain. Therefore, most of the electric field applied to the strong electric field drift layer 6 is applied to the silicon oxide film 64, so that the injected electrons are accelerated by the strong electric field applied to the silicon oxide film 64 and pass between the polycrystalline silicon 51 toward the surface. Since the electron beam drifts in the direction of arrow A in FIG. 11 (upward in FIG. 11), the electron emission efficiency can be improved. The electrons that have reached the surface of the strong electric field drift layer 6 are considered to be hot electrons and are easily tunneled through the surface electrode 7 and discharged into a vacuum. The thickness of the surface electrode 7 is set to about 10 nm to 15 nm.
[0010]
By the way, if instead of a semiconductor substrate such as the n-type silicon substrate 1 as the conductive substrate, a substrate in which a conductive layer made of, for example, an ITO film is formed on an insulating substrate such as a glass substrate is used, the size of the electron source becomes large. The area and cost can be reduced.
[0011]
FIG. 12 shows a field emission type electron source 10 ″ using a conductive substrate composed of an insulating substrate 11 made of a glass substrate and a conductive layer 8 ′ made of an ITO film formed on the insulating substrate 11. That is, in the field emission type electron source 10 ″, as shown in FIG. 12, a conductive layer 8 ′ made of, for example, an ITO film is formed on an insulating substrate 11, and a strong electric field drift is formed on the conductive layer 8 ′. A layer 6 is formed, and a surface electrode 7 made of a metal thin film is formed on the strong electric field drift layer 6. Here, the strong electric field drift layer 6 is formed by depositing a non-doped polycrystalline silicon layer on the conductive layer 8 ', making the polycrystalline silicon layer porous by anodizing treatment, and further oxidizing it by a rapid heating method. Alternatively, it is formed by nitriding.
[0012]
In this field emission type electron source 10 ″, the surface electrode 7 is arranged in a vacuum and a collector electrode 21 is arranged opposite to the surface electrode 7 as shown in FIG. 13, and the surface electrode 7 is formed on the conductive layer 8 ′. On the other hand, by applying a DC voltage Vps as a positive electrode and applying a DC voltage Vc as a positive electrode to the surface electrode 7 with the collector electrode 21, electrons injected from the conductive layer 8 ′ pass through the strong electric field drift layer 6. Drift and emitted through the surface electrode 7 (note that the dashed line in FIG.⁻Shows the flow of). Here, the current flowing between the surface electrode 7 and the conductive layer 8 'is referred to as a diode current Ips, and the current flowing between the collector electrode 21 and the surface electrode 7 is referred to as an emission electron current Ie. The larger the emission electron current Ie (the larger Ie / Ips), the higher the electron emission efficiency. In this field emission type electron source 10 ″, electrons can be emitted even when the DC voltage Vps applied between the surface electrode 7 and the conductive layer 8 ′ is as low as about 10 to 20 V.
[0013]
In the field emission type electron source 10 ″ using the insulating substrate 11, the strong electric field drift layer 6 is formed by depositing a non-doped polycrystalline silicon layer on the conductive layer 8 ′. The layer is formed by making the layer porous by anodizing treatment and then oxidizing it by a rapid heating method. Since the oxidation temperature at this time is relatively high (temperature range from 800 ° C. to 900 ° C.), the insulating substrate 11 As a result, expensive quartz glass must be used, which limits the increase in area and cost. As a method of oxidizing a porous polycrystalline silicon layer, for example, a method of oxidizing with an acid or a method of irradiating with ultraviolet rays in a gas atmosphere containing at least one of oxygen and ozone is used. A method of oxidizing such a porous polycrystalline silicon layer with an acid, or a method of exposing a porous polycrystalline silicon layer to ultraviolet light in a gas atmosphere containing at least one of oxygen and ozone is considered. By adopting the method of irradiating and oxidizing, a glass substrate (for example, a non-alkali glass substrate, a low alkali glass, Substrate, a soda lime glass substrate, or the like).
[0014]
[Problems to be solved by the invention]
However, in the field emission type electron source 10 ″ using the insulating substrate 11, the non-doped polycrystalline silicon layer is deposited on the conductive layer 8 ′ made of the ITO film in the manufacturing process. A high-resistance amorphous layer is formed in the vicinity of the interface with the film, and the thickness of the amorphous layer varies in the plane, so that the potential varies in the plane, and the degree of the porosity due to the anodic oxidation treatment is reduced. There has been a problem that in-plane variations occur, causing variations in the in-plane electron emission amount, and a high-resistance amorphous layer remains in the strong electric field drift layer 6, so that, for example, as shown in FIG. When the amorphous layer 6a having a relatively large thickness is formed in the drift layer 6, the resistance of the strong electric field drift layer 6 increases, and the current flowing through the strong electric field drift layer 6 decreases. 14 has a disadvantage that the amount of emitted electrons is lower than that of the field emission type electron source 10 'using the n-type silicon substrate 1. The reference numeral 6c in FIG. This shows a crystallized layer other than the amorphous layer 6a.When a cross section of the field emission electron source 10 ″ using the above-mentioned insulating substrate 11 is observed by a cross-sectional TEM, the thickness of the amorphous layer 6a is shown in FIG. Since the electric field in the strong electric field drift layer 6 is the strongest in the silicon oxide film 64 formed on the surface of the microcrystalline silicon layer 63 as described above, the amorphous layer 6a as shown in FIG. If the thickness is not uniform, the electric field intensity in each region of the strong electric field drift layer 6 varies, so that electrons cannot be uniformly emitted from the entire surface of the surface electrode 7. There is a problem that becomes the distribution by location occurs in the energy of the electrons emitted from the surface electrodes 7.
[0015]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a field emission type electron source which has a high electron emission amount and can be reduced in cost.
[0016]
[Means for Solving the Problems]
In order to achieve the above object, the invention of claim 1 provides an insulating substrate, a conductive layer formed on one surface of the insulating substrate, and an oxidized or nitrided porous layer formed on the conductive layer. A strong electric field drift layer made of a crystalline semiconductor layer, and a surface electrode formed on the strong electric field drift layer, and the surface electrode is injected from the conductive layer by applying a voltage to the conductive layer as a positive electrode. Field electron source in which the electrons drift through the strong electric field drift layer and are emitted through the surface electrode.The crystalline semiconductor layer is formed of silicon,Layer is in the thickness directionThe uppermost conductive film is formed of Al or Ni or an alloy mainly containing one of Al and Ni.In this case, the amount of the amorphous layer contained in the strong electric field drift layer can be reduced, and the amount of electron emission can be increased while reducing the cost.
[0018]
Also,Since the upper conductive film is formed of Al or Ni or an alloy mainly containing one of Al and Ni, the cost is low.The bestIt is possible to form an upper conductive film. In addition, since the crystalline semiconductor layer is made of silicon, a silicon process can be used. For example, when the crystal semiconductor layer is applied to an electron source such as a display, the pattern of the conductive layer can be miniaturized and highly accurate.
[0019]
Claim2The invention of claim1In the invention, the uppermost conductive film has a thickness not exceeding 50 nm, so that the amount of diffusion from the uppermost conductive film to the strong electric field drift layer can be reduced. It is possible to suppress an increase in the electron scattering probability in the inside, and it is possible to suppress a decrease in the electron emission efficiency.
[0020]
Claim3Invention ofA strong electric field drift layer comprising an insulating substrate, a conductive layer formed on one surface of the insulating substrate, an oxidized or nitrided porous crystalline semiconductor layer formed on the conductive layer, A surface electrode formed on the electric field drift layer, and electrons injected from the conductive layer drift by the strong electric field drift layer through the surface electrode by applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. In the field emission type electron source to be emitted, the crystal semiconductor layer is formed of silicon, and the conductive layer is formed of at least two conductive films stacked in a thickness direction, and the uppermost layerIs formed of a material that is harder to diffuse into the strong electric field drift layer than Al.It is possible to reduce the amount of the amorphous layer contained in the strong electric field drift layer, to increase the electron emission amount while reducing the cost, andDiffusion from the conductive film of the layer to the strong electric field drift layer can be prevented, and heat resistance and stability over time are improved.. In addition, since the crystalline semiconductor layer is made of silicon, a silicon process can be used. For example, when the crystal semiconductor layer is applied to an electron source such as a display, the pattern of the conductive layer can be miniaturized and highly accurate.
[0021]
Claim4The invention of claim 1 to claim 13According to the invention, since the porous crystalline semiconductor layer is made of a porous polycrystalline semiconductor, it is easy to increase the area.
[0024]
Claim5The invention of claim 1 to claim 14In the invention, the insulating substrate is made of a glass substrate having a heat resistance temperature of 500 ° C. or higher.
[0025]
BEST MODE FOR CARRYING OUT THE INVENTION
As shown in FIGS. 1 and 2, the field emission type electron source 10 of the present embodiment includes a conductive material made of a conductive material on one surface of an insulating substrate 11 made of a glass substrate (for example, an alkali-free glass substrate). A layer 8 is formed, a strong electric field drift layer 6 made of oxidized porous polycrystalline silicon is formed on the conductive layer 8, and a surface electrode 7 is formed on the strong electric field drift layer 6.
[0026]
By the way, in this embodiment, the conductive layer 8 is composed of two layers of conductive films 8 a and 8 b stacked in the thickness direction, and the uppermost conductive film 8 b is close to the temperature at which the strong electric field drift layer 6 is formed. It is characterized in that it is formed of a conductive material having a property of easily reacting with silicon at a temperature (for example, a temperature range of 100 ° C. to 600 ° C.). On the other hand, the lowermost conductive film 8a is formed of a conductive material having a property that hardly reacts with silicon. In short, in the present embodiment, at least the strong electric field drift layer 6 side in the thickness direction of the conductive layer 8 is formed of a conductive material capable of suppressing the formation of amorphous in the strong electric field drift layer 6. As shown, the amount of the amorphous layer 6a contained in the strong electric field drift layer 6 can be reduced (the thickness of the amorphous layer 6a can be reduced), and the amount of electron emission can be increased while reducing the cost. .
[0027]
In the present embodiment, the conductive layer 8 is constituted by two layers of conductive films 8a and 8b stacked in the thickness direction, but is formed by three or more layers of conductive films stacked in the thickness direction. In this case, the uppermost conductive film 8b and the lowermost conductive film 8a only need to have the above properties.
[0028]
In the present embodiment, aluminum (Al) is used as the uppermost conductive film 8b, and copper (Cu) having a smaller resistance than aluminum is used as the lowermost conductive film 8a (accordingly, The resistance value of the conductive layer 8 can be reduced), but instead of aluminum, nickel (Ni), cobalt (Co), chromium (Cr), hafnium (Hf), Any of molybdenum (Mo), palladium (Pd), platinum (Pt), rhodium (Rh), tantalum (Ta), titanium (Ti), tungsten (W), and zirconium (Zr) may be used. Oxides of these metals, alloy films of a plurality of these metals, and alloys of these metals and Si (for example, an Ai-Si alloy containing aluminum as a main component) Silicide film may be used. As the lowermost conductive film 8a, a low-resistance material (wiring material) such as copper, silver, or aluminum, or a material having high adhesion to glass such as chromium or titanium can be used. Can also be deposited in multiple layers.
[0029]
By the way, when aluminum is used as the uppermost conductive film 8b, as shown in FIG. 3, the thickness of the amorphous layer 6a can be made sufficiently thinner than the conventional one (see FIG. 14). (The interface between the amorphous layer 6a and the crystallized layer 6c is substantially flat), so that the variation in the electric field strength in each region of the strong electric field drift layer 6 is reduced, and Electrons can be emitted from the entire surface substantially uniformly, and the energy of the electrons emitted from the surface electrode 7 can be prevented from being distributed depending on the location. When nickel is used as the uppermost conductive film 8b, the strong electric field drift layer 6 is formed only of the crystallized layer 6c and the amorphous layer 6a is not formed as shown in FIG. The electron emission efficiency can be increased as compared with the case where aluminum is used as 8b.
[0030]
The thickness of the uppermost conductive film 8b is desirably small, and by forming the film to a thickness of 50 nm or less, the diffusion amount of the metal element from the uppermost conductive film 8b to the strong electric field drift layer 6 can be increased. It can be considered that the probability of electron scattering in the strong electric field drift layer 6 can be suppressed from increasing, and the decrease in electron emission efficiency can be suppressed. Here, the thickness of the uppermost conductive film 8b is desirably sufficiently smaller than the thickness of the strong electric field drift layer 6 in consideration of the diffusion of the metal element.
[0031]
Hereinafter, a method for manufacturing the above-described field emission electron source 10 will be described with reference to FIG.
[0032]
First, the lowermost conductive film 8a is formed on one surface of the insulating substrate 11 (the upper surface in FIG. 5A), and the uppermost conductive film 8b is further formed on the lowermost conductive layer 8a. By forming a film, a structure as shown in FIG. 5A is obtained.
[0033]
After forming the conductive layer 8 composed of the conductive film 8a and the conductive film 8b, a non-doped polycrystalline silicon layer 3 having a predetermined thickness (for example, 1.5 μm) is formed by, for example, a plasma CVD method. The structure as shown in FIG. 5B is obtained. Here, since the non-doped polycrystalline silicon layer 3 is deposited by the plasma CVD method, it can be formed by a low-temperature process of 600 ° C. or lower (100 ° C. to 600 ° C.). The method of forming the non-doped polycrystalline silicon layer 3 is not limited to the plasma CVD method, but may be a catalytic CVD method. The catalytic CVD method can be used to form a film at a low temperature of 600 ° C. or lower.
[0034]
After the non-doped polycrystalline silicon layer 3 is formed, a platinum electrode (using an anodizing treatment tank containing an electrolytic solution comprising a mixture of a 55 wt% hydrogen fluoride aqueous solution and ethanol in a ratio of about 1: 1) is used. The porous polycrystalline silicon layer 4 is formed by performing anodizing treatment under predetermined conditions while irradiating the polycrystalline silicon layer 3 with light while using the negative electrode as the negative electrode and the conductive layer 8 as the positive electrode. The structure as shown in (c) is obtained. Here, in the present embodiment, as the conditions of the anodic oxidation treatment, the light power applied to the surface of the polycrystalline silicon layer 3 was constant and the current density was constant during the anodic oxidation treatment, but these conditions were appropriately changed. (For example, the current density may be changed).
[0035]
After the above-described anodizing treatment is completed, the electrolytic solution is removed from the anodizing treatment tank, and an acid (for example, about 10% diluted nitric acid, about 10% diluted sulfuric acid, aqua regia, etc.) is added to the anodizing tank. ), And then using the anodizing tank containing the acid, a platinum electrode (not shown) is used as a negative electrode and the conductive layer 8 is used as a positive electrode. Is oxidized to form a strong electric field drift layer 6, and the structure shown in FIG. 5D is obtained.
[0036]
After the strong electric field drift layer 6 is formed, a surface electrode 7 made of a conductive thin film (for example, a gold thin film) is formed on the strong electric field drift layer 6 by, for example, vapor deposition, so that the structure shown in FIG. The field emission type electron source 10 is obtained. In the present embodiment, the thickness of the surface electrode 7 is set to 15 nm. However, the thickness is not particularly limited, and may be any thickness as long as electrons passing through the strong electric field drift layer 6 can tunnel. Further, in this embodiment, the conductive thin film to be the surface electrode 7 is formed by vapor deposition, but the method of forming the conductive thin film is not limited to vapor deposition, and for example, a sputtering method may be used.
[0037]
According to the above-described manufacturing method, the polycrystalline silicon layer 3 is formed by a low-temperature process such as a plasma CVD method, and the porous polycrystalline silicon layer 4 is oxidized with an acid. Is formed by a vapor deposition method, a sputtering method, or the like, so that the field emission electron source 10 can be manufactured by a low-temperature process of 600 ° C. or less. Therefore, a non-alkali glass substrate, which is less expensive than a quartz glass substrate, can be used as the insulating substrate 11, which can reduce the cost and can further increase the area, and can further increase the polycrystalline structure. Depending on the temperature at which the silicon layer 3 is formed, a glass substrate having a lower heat-resistant temperature than a non-alkali glass substrate such as a low alkali glass substrate and a soda lime glass substrate can be used. Moreover, since the uppermost conductive film 8b of the conductive layer 8 is formed of a material which easily reacts with silicon (that is, a constituent element of the polycrystalline silicon layer 3) at the temperature at which the polycrystalline silicon layer 3 is formed, The formation of an amorphous layer in the polycrystalline silicon layer 3 can be suppressed (that is, the formation of the amorphous layer in the initial stage of the deposition of the polycrystalline silicon layer 3 can be suppressed). It is possible to prevent the strong electric field drift layer 6 from having an unnecessarily high resistance (the same as the strong electric field drift layer 6 in the conventional field emission type electron source 10 'using the n-type silicon substrate 1 shown in FIG. 9). The electron emission efficiency can be increased.
[0038]
The field emission electron source manufactured by the above-described manufacturing method is similar to the field emission electron source proposed by the present inventors in Japanese Patent Application Nos. 10-272340 and 10-272342. The electron emission characteristics are less dependent on the degree of vacuum, and electrons can be emitted stably without generating a popping phenomenon during electron emission.
[0039]
By the way, in the above-described manufacturing method, the porous polycrystalline silicon layer 4 is oxidized with an acid. However, the porous polycrystalline silicon layer 4 may be oxidized by irradiating ultraviolet rays in a gas atmosphere containing at least one of oxygen and ozone. It is desirable that oxidation can be performed in a temperature range of 100 ° C. to 600 ° C. Although this temperature may be higher than 600 ° C., it is desirable that oxidation can be performed in a temperature range of 100 ° C. to 600 ° C. from the viewpoint that an inexpensive glass substrate is used as the insulating substrate 11. The reason why the thickness of the uppermost conductive film 8b does not exceed 50 nm as described above is that if the thickness of the uppermost conductive film 8b is too large, the uppermost conductive layer 8b will not be formed. Constituting metal elements diffuse into the polycrystalline silicon layer 3 in a large amount, and the polycrystalline silicon layer 3 becomes silicide. Even if the silicide is made porous and the strong electric field drift layer 6 is formed, electrons during the operation are generated. This is because it is expected that the scattering probability will increase and the electron emission efficiency will decrease. In short, the thickness of the uppermost conductive film 8b has a small amount of diffusion into the strong electric field drift layer 6 (diffuses only to the conductive layer 8 side of the strong electric field drift layer 6), and has an influence on the electron emission efficiency. It is desirable to set so as to reduce the number.
[0040]
Also, the uppermost conductive film 8b is manufactured by using a material that is less likely to diffuse into the polycrystalline silicon layer 3, the porous polycrystalline silicon layer 4, and the strong electric field drift layer 6 (that is, has a large diffusion enthalpy) than aluminum. It is possible to further suppress the diffusion of the constituent elements of the uppermost conductive film 8b due to the temperature rise during operation and during operation. Here, the diffusion enthalpy of aluminum is 329 kJ / mol (78.7 kcal / mol), and materials having a larger diffusion enthalpy than aluminum include Ni, Co, Cr, Hf, Mo, Pd, Pt, Rh, Ta, Ti, W, Zr and oxides thereof may be used.
[0041]
The basic operation of the field emission electron source 10 of the present embodiment is the same as that of the conventional configuration shown in FIG. 12, and for example, as shown in FIG. By applying a DC voltage Vps with the surface electrode 7 as a positive electrode to the conductive layer 8 and applying a DC voltage Vc with the collector electrode 21 as a positive electrode to the surface electrode 7, The electrons injected from the conductive layer 8 drift in the strong electric field drift layer 6 and are emitted through the surface electrode 7 (the dashed line in FIG. 6 indicates the electron e emitted through the surface electrode 7).⁻Shows the flow of). Here, a current flowing between the surface electrode 7 and the conductive layer 8 is referred to as a diode current Ips, and a current flowing between the collector electrode 21 and the surface electrode 7 is referred to as an emission electron current Ie. The electron emission amount increases as the electron current Ie increases (Ie / Ips increases). Also in the field emission type electron source 10 of the present embodiment, electrons are emitted even when the DC voltage Vps applied between the surface electrode 7 and the conductive layer 8 is as low as about 10 to 20 V, as in the conventional configuration. be able to.
[0042]
FIG. 7 shows the electron emission characteristics of the field emission electron source 10 manufactured by the above-described manufacturing method. The horizontal axis in FIG. 7 indicates the value of the DC voltage Vps, and the vertical axis indicates the current density. A in FIG. 7 indicates that the conductive layer 8 has a W / Ti structure (that is, the uppermost conductive film 8b). Is W, the diode current Ips when the lowermost conductive film 8a is Ti), and b (●) in the figure indicates the emission electron current Ie when the conductive layer 8 has a W / Ti structure. C (□) indicates a diode current Ips when the conductive layer 8 has an Al—Si / W / Ti structure (that is, the uppermost conductive film 8b is Al—Si and the lowermost conductive film 8a is Ti). In the figure, (■) indicates the emission electron current Ie when the conductive layer 8 has an Al—Si / W / Ti structure, and (e) in the figure indicates that the conductive layer 8 is Ni / The diode current Ips in the case of a W / Ti structure (that is, the uppermost conductive film 8b is Ni and the lowermost conductive film 8a is Ti) is: Figure f of the (▲) represents the emitted electron current Ie when the conductive layer 8 was Ni / W / Ti structure. FIG. 8 shows a result of Fowler-Nordheim (Fowler-Nordheim) plotting of data on the electron emission current Ie and the DC voltage Vps in FIG. Here, A in FIG. 8 indicates that the conductive layer 8 has a W / Ti structure, B indicates that the conductive layer 8 has an Al—Si / W / Ti structure, and C indicates that the conductive layer 8 has a Ni / W / Ti structure. This is data for a Ti structure. The conditions of the anodizing treatment were such that the current density was 12.5 mA / cm irrespective of the difference in the conductive layer 8.²The energizing time was set to 6 seconds, and the conditions of oxidation with an acid were applied voltage of 20 V and current density of 12.5 mA / cm irrespective of the difference of the conductive layer 8.²And The thickness of the uppermost conductive film 8b was 50 nm. Further, the DC voltage Vc at the time of measuring the characteristics was kept constant at 100V. FIG. 7 shows that good electron emission current Ie and electron emission efficiency (Ie / Ips) were obtained.
[0043]
In the present embodiment, the strong electric field drift layer 6 is made of oxidized porous polycrystalline silicon. However, the strong electric field drift layer 6 is made of porous polycrystalline silicon, or other oxidized or nitrided porous polycrystalline silicon. It may be composed of a polycrystalline semiconductor layer.
[0044]
【The invention's effect】
The invention of claim 1 provides a strong electric field comprising an insulating substrate, a conductive layer formed on one surface of the insulating substrate, and an oxidized or nitrided porous crystalline semiconductor layer formed on the conductive layer. A drift layer and a surface electrode formed on the strong electric field drift layer, and electrons injected from the conductive layer are applied to the strong electric field drift layer by applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. A field emission electron source that drifts and is emitted through a surface electrode;The crystalline semiconductor layer is formed of silicon,Layer is in the thickness directionThe uppermost conductive film is formed of Al or Ni or an alloy mainly containing one of Al and Ni.This has the effect that the amount of the amorphous layer contained in the strong electric field drift layer can be reduced, and the amount of electron emission can be increased while reducing the cost.
[0046]
Also,Since the upper conductive film is formed of Al or Ni or an alloy mainly containing one of Al and Ni, the cost is low.The bestThere is an effect that an upper conductive film can be formed.. In addition, since the crystalline semiconductor layer is made of silicon, a silicon process can be used. For example, when the crystal semiconductor layer is applied to an electron source such as a display, there is an effect that a pattern of a conductive layer can be miniaturized and highly accurate. is there.
[0047]
Claim2The invention of claim1In the invention, the uppermost conductive film has a thickness not exceeding 50 nm, so that the amount of diffusion from the uppermost conductive film to the strong electric field drift layer can be reduced. There is an effect that it is possible to suppress an increase in the electron scattering probability in the inside and to suppress a decrease in the electron emission efficiency.
[0048]
Claim3Invention ofA strong electric field drift layer comprising an insulating substrate, a conductive layer formed on one surface of the insulating substrate, an oxidized or nitrided porous crystalline semiconductor layer formed on the conductive layer, A surface electrode formed on the electric field drift layer, and electrons injected from the conductive layer drift by the strong electric field drift layer through the surface electrode by applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. In the field emission type electron source to be emitted, the crystal semiconductor layer is formed of silicon, and the conductive layer is formed of at least two conductive films stacked in a thickness direction, and the uppermost layerIs formed of a material that is harder to diffuse into the strong electric field drift layer than Al.The effect is that the amount of the amorphous layer contained in the strong electric field drift layer can be reduced, and the amount of electron emission can be increased while reducing the cost.Diffusion from the conductive film of the layer to the strong electric field drift layer can be prevented, and there is an effect that heat resistance and stability over time are improved.. In addition, since the crystalline semiconductor layer is made of silicon, a silicon process can be used. For example, when the crystal semiconductor layer is applied to an electron source such as a display, there is an effect that a pattern of a conductive layer can be miniaturized and highly accurate. is there.
[0049]
Claim4The invention of claim 1 to claim 13According to the invention, since the porous crystalline semiconductor layer is made of a porous polycrystalline semiconductor, there is an effect that the area can be easily increased.
[Brief description of the drawings]
FIG. 1 is a schematic sectional view showing an embodiment.
FIG. 2 is a schematic perspective view of the same.
FIG. 3 is an explanatory diagram of a main part of the above.
FIG. 4 is an explanatory view of a main part of the above.
FIG. 5 is a main process sectional view for explaining the manufacturing method of the above.
FIG. 6 is an explanatory diagram of a characteristic measurement principle of the above.
FIG. 7 is a voltage-current characteristic diagram of the embodiment.
8 is a graph obtained by plotting the data of FIG. 7 with Fowler-Nordheim plots.
FIG. 9 is a schematic sectional view showing a conventional example.
FIG. 10 is an explanatory diagram of a principle of measuring characteristics of the above.
FIG. 11 is an explanatory diagram of an electron emission mechanism of the above.
FIG. 12 is a schematic sectional view showing another conventional example.
FIG. 13 is an explanatory diagram of a characteristic measurement principle of the above.
FIG. 14 is an explanatory diagram of a main part of the above.
FIG. 15 is an explanatory diagram of a main part of the above.
[Explanation of symbols]
6 Strong electric field drift layer
7 Surface electrode
8 Conductive layer
8a Lowermost conductive film
8b Uppermost conductive film
10. Field emission electron source
11 Insulating substrate

Claims (5)

An insulative substrate, a conductive layer formed on one surface of the insulative substrate, a strong electric field drift layer including an oxidized or nitrided porous crystalline semiconductor layer formed on the conductive layer, and a strong electric field drift. And a surface electrode formed on the layer, and electrons injected from the conductive layer drift by the strong electric field drift layer and are emitted through the surface electrode by applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. A field emission electron source, wherein the crystalline semiconductor layer is formed of silicon, the conductive layer is formed of at least two conductive films stacked in a thickness direction , and the uppermost conductive film is A field emission type electron source formed of Al or Ni or an alloy containing one of Al and Ni as a main component . 2. The field emission type electron source according to claim 1 , wherein the uppermost conductive film has a thickness not exceeding 50 nm . An insulative substrate, a conductive layer formed on one surface of the insulative substrate, a strong electric field drift layer including an oxidized or nitrided porous crystalline semiconductor layer formed on the conductive layer, and a strong electric field drift. And a surface electrode formed on the layer, and electrons injected from the conductive layer drift by the strong electric field drift layer and are emitted through the surface electrode by applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. A field emission electron source, wherein the crystalline semiconductor layer is formed of silicon, the conductive layer is formed of at least two conductive films stacked in a thickness direction, and the uppermost conductive film is electric field emission electron source you characterized by comprising formed by diffusion material hard to be strong electric field drift layer from al. 4. The field emission type electron source according to claim 1 , wherein the porous crystalline semiconductor layer is made of a polycrystalline semiconductor made porous . The field emission type electron source according to any one of claims 1 to 4, wherein the insulating substrate is a glass substrate having a heat-resistant temperature of 500 ° C or higher .

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