JP3568156B2 - Semiconductor device - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device. In particular, the present invention relates to a signal processing integrated circuit optical input / output structure in ultra-high-speed optical communication.
[0002]
[Prior art]
At present, various researches for the coming ultra-high-speed and large-capacity communication are progressing under a situation where communication backbone traffic is explosively increasing.
It is said that signal processing of 40 Gb / s is the limit in signal processing integrated circuits using current electrical interfaces.
This is limited by the input / output speed of the electric signal of the packaged integrated circuit. As a method for solving this problem, a high-speed signal of 60 Gb / s or more is input / output by light, and a low-speed signal of less than 60 Gb / s is used. It has been studied to perform input and output with electric signals.
[0003]
Such an optical-electrical integrated circuit (OEIC) having both optical and electrical interfaces has been realized using a surface-type photodiode capable of high-speed operation, and operation at 40 Gb / s has been confirmed. ing.
However, since the light receiving section has a planar structure, the package is as shown in FIG.
This is to input light by introducing a collimator lens system (confocal system) from the back surface of the chip.
However, a new connection method has been demanded because of the disadvantage of mounting, in which the electrical wiring direction and the optical wiring direction are perpendicular to each other, and an increase in cost due to difficulty in alignment and the like.
[0004]
[Problems to be solved by the invention]
As a means for establishing an optical interface of an optical-electrical integrated circuit, the present invention provides an optical interface that performs signal input and output from a surface direction of a semiconductor chip, and performs a signal input and output from an end surface direction of a semiconductor chip. It is an object of the present invention to provide a configuration that is compatible with the electrical interface that is used, and a configuration that enables high-efficiency and easy connection to an optical wiring outside the chip such as an optical fiber.
[0005]
[Means for Solving the Problems]
According to a first aspect of the present invention, there is provided a semiconductor device having an optical wiring layer for handling low-speed signals and an optical input / output structure for handling high-speed signals on a substrate on which an optical device or an electronic device is formed. A wiring layer is mounted, and the optical input / output structure is optically connected to the optical device by an optical path converting means, which is an air space formed as a light reflecting portion on the back surface of the substrate or a crystal surface formed by etching. characterized in that was.
According to another aspect of the present invention, there is provided a semiconductor device having an optical wiring layer for handling low-speed signals and an optical input / output structure for handling high-speed signals on a substrate on which an optical device or an electronic device is formed. A wiring layer is mounted, and the optical input / output structure is optically connected to the optical device by an optical path changing means, which is a micromirror having a condensing function, formed on the optical wiring layer .
The semiconductor device according to claim 3 of the present invention for solving the above SL problem, optical wiring layer according to claim 1 or 2 wherein has a single-mode optical waveguide, said waveguide has a feature that it has a branch I do.
According to a fourth aspect of the present invention, there is provided a semiconductor device according to the fourth aspect , wherein the optical wiring layer according to the first, second or third aspect has a single mode high refractive index difference waveguide or a ridge waveguide. The waveguide has a spot size converter at a connection portion with an external optical wiring.
[0006]
BEST MODE FOR CARRYING OUT THE INVENTION
[Example 1]
As a first embodiment of the present invention, FIG. 1 is a conceptual diagram of a chip in which an optical wiring layer is incorporated into an electric wiring layer on the surface of a chip.
FIG. 1A is an overall external view, and FIGS. 1B to 1D are enlarged views of a lower portion of a surface photodiode.
In the present embodiment, an InP-based surface-type photodiode (PD), which is a light receiving element capable of ultra-high-speed response, is taken as an example of an optical device.
Since an electrode is present above the planar photodiode, the optical path is changed so that signal light can be incident from below the planar photodiode.
[0007]
As shown in FIG. 1, on a substrate 10 on which an optical device or an electronic device is built, an optical / electrical convergence including an optical wiring layer for handling low-speed signals and an optical wiring layer having an optical input / output structure for handling high-speed signals is provided. The wiring layer 20 is mounted.
An optical waveguide 30 having a structure in which a surface photodiode 50 is mounted and a core is sandwiched between claddings is formed in the optical / electrical fusion wiring layer 20, and one end of the optical waveguide 30 is connected to an external optical fiber 40. ing.
On the other hand, a mirror 60 is formed at the other end of the optical waveguide 30, and the signal light input from the optical fiber 40 is guided to the vicinity of the surface photodiode 50, and the optical path conversion by the mirror 60 changes the surface light of the surface photodiode 50. Reach to the bottom.
[0008]
Here, utilizing the fact that the semiconductor has a high refractive index, the light is incident on the surface type photodiode 50 by reflection at the interface between the substrate 10 and air on the back surface of the chip or reflection by a metal film.
As shown in FIG. 1B, when heat is required to be released from the integrated circuit by bringing the back surface into contact with the housing, an air space 11 is secured on the back surface of the chip as a light reflecting portion.
In addition, as shown in FIG. 1C, if the etching 12 using the crystal plane is performed, the incident angle of light can be adjusted.
Furthermore, as shown in FIG. 1D, light can be guided by forming a reflective film 13 typified by a metal thin film.
In particular, in an optical / electrical integrated circuit, heat generation due to an electronic circuit is conceivable, so the structure shown in FIG. 1B is effective.
[0009]
FIG. 3 is a conceptual diagram of a chip having an optical branching function equipped with a 3 dB coupler 31 using two high-refractive index difference single mode optical waveguides 30a and 30b.
If the signal from the optical fiber 40 is guided to one single-mode optical waveguide 30a, it can be branched into two by the 3 dB coupler 31.
The single mode optical waveguides 30a and 30b are waveguides having a high refractive index difference so that there is no loss due to minute bending that can be accommodated in the chip.
In the case of a ridge-type waveguide, a smaller bending structure is possible because a difference in refractive index from air can be used.
In the case of such a single mode optical waveguide having a high refractive index difference, the mode field radius (spot size: SS) of the waveguide becomes smaller than that of the optical fiber, but by providing the spot size converter 32 at the connection site. , Connection efficiency and tolerance can be improved.
[0010]
Here, the 3 dB coupler 32 has been described as an element to be manufactured in the optical wiring layer, but a passive element such as a beam splitter or a filter can be mounted, and the function and type thereof are not particularly limited.
As a material for the optical waveguides 30, 30a, and 30b, an organic wiring material (polymer) is used for the electric wiring layer. Therefore, a manufacturing process using the same material is naturally possible. Can be integrated after the IC process is completed.
In this case, the waveguide material is not particularly limited to a polymer such as a semiconductor / glass material.
Further, if a transparent electrode such as ITO (Indium Tin Oxide) is used as the electrode of the surface type photodiode 50, direct input / output from the upper surface of the chip as shown in FIGS. 4A and 4B is possible. is there.
FIG. 4A shows a structure in which incident light is reflected by a mirror 60 above the surface-type photodiode 50, and FIG. The wave is guided up to.
[0011]
[Example 2]
As a second embodiment of the present invention, FIG. 5 is a conceptual view of a chip in which an optical wiring layer is formed on the back surface of the chip.
As shown in FIG. 5, on the upper surface of the substrate 10, an electrical wiring layer 70 for handling a low-speed signal on which a planar photodiode 50, an FET and the like are mounted is mounted, while on the lower surface of the substrate 10, an optical waveguide 30 is provided. An optical wiring layer 80 formed and handling a high-speed signal is mounted.
In the present embodiment, unlike the first embodiment, since light can be guided directly from the optical waveguide 30 to the surface-type photodiode 50, a 45-degree mirror 60 may be used for optical path conversion.
[0012]
The angle of the mirror 60 is not limited to 45 degrees, and need not be a flat plate.
For example, when the optical distance from the optical waveguide 30 to the planar photodiode 50 is long, light emitted from the optical waveguide 30 may be diffused and light receiving efficiency may be reduced.
Therefore, as shown in FIG. 5B, by giving the mirror 60 a curvature, a micro mirror having a light condensing action can be obtained.
As described in the first embodiment, when heat radiation from the back surface is necessary, if the optical wiring layer 80 is formed on the back surface of the chip using a material having low thermal conductivity such as a polymer, May be an obstacle.
[0013]
Therefore, as shown in FIG. 6, it is conceivable that the embedded optical wiring layer 80a including the core of the optical waveguide 30 and the clad portion having a thickness necessary for light propagation is embedded in the substrate 10.
6A is an overall perspective view, FIG. 6B is a cross-sectional view taken along line AA ′ in FIG. 6A, and FIG.
As described above, if the buried optical wiring layer 80a is embedded in the substrate 10, even when a material having a low thermal conductivity such as a polymer is used as the optical wiring layer 80a on the back surface of the chip, the substrate can be made of a material having a low thermal conductivity. Since the area 10 is not completely surrounded, the problem of heat radiation can be solved.
Further, as shown in FIG. 7, when the device section 90 that generates heat and the light receiving area 100 can be separated from each other, a step 120 for heat radiation can be formed on the back surface of the chip.
As shown in FIG. 8, there is a method in which the step 120 is formed in the housing 110 to increase the heat radiation efficiency from the substrate 10.
[0014]
For a plurality of planar photodiodes, it is possible to input light to each planar photodiode 50 as shown in FIG. 9 (a), or a waveguide branch as described in the first embodiment. By providing an equal passive function, it is possible to guide one input light to a different planar photodiode 50 as shown in FIG. 9B.
Even in these cases, it goes without saying that the heat radiation measures described with reference to FIGS.
As shown in FIG. 10, an optical / electrical fusion connector 140 in which an electric signal line 130 as an electric interface and an optical fiber 40 as an optical interface are integrated is connected to an optical / electrical integrated circuit 160 in a package 150. It is possible to implement simple, inexpensive and space-saving mounting.
[0015]
In the present invention, an optical wiring layer is monolithically formed on the chip surface or the back surface of an optical / electrical integrated circuit using a surface-type light-receiving or light-emitting element, and an optical path conversion structure is provided in the layer. This is an optical interface in an integrated optical / electrical integrated circuit, and inputs / outputs from / to optical wiring outside the chip such as an optical fiber from the chip end face direction.
For example, the optical fiber can be connected by butt-joint, and does not require a special optical system outside the chip.
[0016]
【The invention's effect】
As described above in detail based on the embodiments, the present invention establishes an optical input / output interface in an optical / electrical integrated circuit by introducing optical wiring on a chip. In particular, the present invention enables simple, inexpensive and space-saving mounting, and opens up the realization of an optical / electrical integrated circuit used for ultra-high-speed and large-capacity communication exceeding 100 Gb / s in the future.
[Brief description of the drawings]
FIG. 1A is an explanatory view of a chip structure when an optical wiring layer is provided on the surface of an IC chip. FIG. 1B is a partially enlarged view in which an air space for a mirror is secured, and FIG. 1) is a partially enlarged view in which a structure for controlling a reflection angle is provided in a mirror air space, and FIG. 1D is a partially enlarged view in which a reflection film is formed as a mirror.
FIG. 2 is an explanatory diagram of a conventional surface-type photodiode package.
FIG. 3 is a perspective view showing a structure in which an optical wiring layer has a passive function (two branches by a coupler).
FIG. 4A is a conceptual diagram showing a state in which reflected light from the upper surface is incident on a surface-type photodiode using a transparent electrode, and FIG. FIG. 3 is a conceptual diagram showing a state of incidence on a photodiode.
FIG. 5A is an explanatory diagram of a chip structure when an optical wiring layer is provided on the back surface of an IC chip, and FIG. 5B is a structural diagram in which an optical path conversion mirror has a light collecting function. .
FIG. 6A is a bird's-eye view of a structure in which an embedded optical wiring layer is formed on the back surface of an IC chip, FIG. 6B is a cross-sectional view taken along the line AA ′, and FIG. It is explanatory drawing which looked at the chip | tip from the back surface.
FIG. 7 is an explanatory diagram of the IC chip when the heat generating portion and the light receiving region can be separated from each other when viewed from the end face direction.
FIG. 8 is a conceptual diagram in the case where a heat radiation step is formed on the housing side.
FIG. 9A is a conceptual diagram of an optical wiring for a plurality of surface photodiodes, and FIG. 9B is an optical wiring in the case of one input for a plurality of surface photodiodes. It is a conceptual diagram.
FIG. 10 is a conceptual diagram of application of an optical / electrical fusion interface.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 Substrate 11 Space 12 Etching 13 Reflection film 20 Optical / Electric fusion wiring layer 30 Optical waveguide 30a, 30b Single mode optical waveguide 31 3dB coupler 32 Spot size conversion part 40 Optical fiber 50 Surface photodiode (PD)
60 Mirror 70 Electric wiring layer 80 Optical wiring layer 80a Embedded optical wiring layer 90 Device area 100 Light receiving area 110 Housing 120 Step 130 Electric signal line 140 Optical / electrical fusion connector 150 Package 160 Optical / electrical fusion integrated circuit

Claims (4)

An electrical wiring layer for handling low-speed signals and an optical wiring layer having an optical input / output structure for handling high-speed signals are mounted on a substrate on which optical devices and electronic devices are built , and the optical input / output structure is provided on the back surface of the substrate. A semiconductor device, wherein the semiconductor device is optically connected to the optical device by an optical path changing means which is a space for air formed as a light reflecting portion or a crystal plane formed by etching . An electrical wiring layer for handling low-speed signals and an optical wiring layer having an optical input / output structure for handling high-speed signals are mounted on a substrate on which optical devices and electronic devices are fabricated. A semiconductor device , which is optically connected to the optical device by an optical path changing means, which is a micromirror having a light condensing function, manufactured as described above . Optical wiring layer has a single-mode optical waveguide, the waveguide is a semiconductor device according to claim 1, wherein it has a branch The optical wiring layer has a single mode high refractive index difference waveguide or a ridge type waveguide, and the waveguide has a spot size converter at a connection portion with an external optical wiring. 4. The semiconductor device according to 1, 2, or 3 .

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