JP3531415B2 - SOI substrate, method of manufacturing the same, semiconductor device and liquid crystal panel using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to SOI (Silic
on Insulator) substrate, in particular, SOI substrate using a transparent support substrate, its manufacturing method, and its SO
The present invention relates to a liquid crystal panel and an electronic device using an I substrate.

[0002]

2. Description of the Related Art SOI technology for forming a silicon thin film on an insulating substrate and forming a semiconductor device on the silicon thin film has been widely studied because it has advantages such as high speed operation of elements, low power consumption and high integration. Has been done.

As one of the SOI technologies, there is a technology for manufacturing an SOI substrate by bonding single crystal silicon substrates. This method, which is generally called a bonding method, involves bonding a single crystal silicon substrate and a supporting substrate by utilizing hydrogen bonding force, and then strengthening the bonding strength by heat treatment, and then grinding or polishing the single crystal silicon substrate. Alternatively, a thin film single crystal silicon layer is formed over a supporting substrate by etching. According to this method, since a single crystal silicon substrate is directly thinned, a high-performance device having excellent crystallinity of the silicon thin film can be produced.

Further, as an application of this bonding method, hydrogen ions are implanted into a single crystal silicon substrate, and this is bonded to a supporting substrate, and then a thin film silicon layer is subjected to heat treatment to form a thin film silicon layer into a hydrogen implantation region of the single crystal silicon substrate. (US Pat. No. 5,374,564), or a single crystal silicon layer is epitaxially grown on a silicon substrate having a porous surface, and the silicon substrate is removed after adhering this to a supporting substrate and the porous silicon layer is etched. Method for forming an epitaxial single crystal silicon thin film on a supporting substrate (Japanese Patent Laid-Open No. 4-34641).
8) etc. are known. The SOI substrate by such a bonding method is used for manufacturing various devices like the normal bulk semiconductor substrate. However, as a characteristic different from the conventional bulk substrate, various materials are used for the supporting substrate. Can be mentioned. That is, as well as a normal silicon substrate as a support substrate,
Transparent quartz, a glass substrate, or the like can be used. By forming a single crystal silicon thin film on a transparent substrate, a high performance transistor device using single crystal silicon with excellent crystallinity for devices that require light transparency, such as transmissive liquid crystal display devices. Can be formed.

[0005]

In the SOI substrate in which the transparent support substrate and the single crystal silicon thin film are bonded together as described above, the single crystal silicon layer is formed of a MOSFET (Metal).
Oxide Semiconductor Field
It is used as a channel, a source, and a drain region of a transistor element such as a d effect transistor. If the substrate is transparent at this time, when light is irradiated from the back surface of the substrate, a leak current is generated in the channel region of this MOSFET due to light irradiation, and the device characteristics deteriorate. (Here, the surface on which the single crystal silicon layer is formed is the front surface of the substrate, and the opposite side is the back surface.)
This point will be specifically described with reference to the drawings. Figure 2
Is a bonded SO using a conventionally manufactured transparent substrate
It is sectional drawing of I board. This SOI substrate has a structure in which the single crystal silicon layer 2 is bonded to the supporting substrate 1 with the oxide film layer 3 interposed therebetween. Since the oxide film layer 3 described here generally has a property of transmitting light, a conventional SOI substrate using a transparent material such as quartz or glass for the supporting substrate has a light-shielding property under the single crystal silicon layer 2. This means that no layer is provided.

FIG. 3 is a sectional view of a MOSFET manufactured using the conventional SOI substrate shown in FIG. On the supporting substrate 1, there is an oxide film layer 3, and further, there are a source region 2b, a channel region 2a, and a drain region 2c of a MOSFET formed by patterning a single crystal silicon layer. It is covered with a gate insulating film 2d formed by surface oxidation. Gate insulating film 2
There is a gate electrode 6 on d, and the single crystal silicon region of the MOSFET and the gate electrode 6 are covered with a first interlayer film 7. Further, the source line 9 and the drain line 8 are connected to the source region 2b and the drain region 2c, respectively, through the openings of the first interlayer film 7. A second interlayer film 10 is further formed thereon, and the upper light-shielding layer 11 serves as the second interlayer film 1.
It is formed on 0. The upper light-shielding layer 11 is formed of an opaque insulating material such as black polyimide resin or a metal thin film such as aluminum. When the light 12a is directly incident from the substrate surface side, the light leakage due to the light 12a can be suppressed by the upper light shielding layer 11 in the channel region 2a of the MOSFET provided on the substrate.
However, when the light 12c directly enters the channel region 2a of the MOSFET from the back surface of the substrate, light leakage cannot be prevented. Further, when there is light such as 12b reflected from the backside interface 1a of the substrate, even if it is incident from the substrate surface, part of it reaches the channel region 2a of the MOSFET and causes light leakage. Become.

That is, in the SOI substrate of the conventional structure shown in FIG. 2, since the light shielding layer is not provided between the supporting substrate 1 and the single crystal silicon layer 2, this SOI substrate is used to form a single crystal silicon thin film. When the MOSFET is formed, the MOSFET channel region 2a cannot be shielded from the incident light 12c directly from the back surface of the substrate and the reflected light 12b from the back surface of the substrate. Therefore, there is a fundamental problem that light leakage occurs in the MOSFET manufactured on the SOI substrate having the conventional structure, resulting in deterioration of device characteristics. Further, this makes it difficult to use a transparent SOI substrate for a device that uses light, and has a problem of low versatility.

An object of the present invention is to provide an SOI substrate capable of producing a semiconductor device which does not cause the problem of light leakage even if a transparent supporting substrate is used, and a method for producing the SOI substrate.
Another object of the present invention is to provide a high-performance semiconductor device using an SOI substrate that uses a transparent substrate and has no light leakage.

[0009]

The SOI substrate of the present invention comprises:
In order to achieve the above object, a buried type light-shielding layer for preventing light leakage is provided between a transparent support substrate and a single crystal silicon layer formed thereon. This light shielding layer is formed on one surface of the support substrate,
The single crystal silicon layer is formed on the insulator layer deposited on the light shielding layer. The light-shielding layer is patterned so as to cover the channel region of the MOSFET that constitutes the device to be manufactured, and the light-shielding layer does not exist in the portion other than the channel region of the MOSFET. Therefore, it can be used for applications in which a substrate needs to transmit light, such as a transmissive liquid crystal display device. Further, by using a refractory metal or a silicon compound (silicide) thereof as a material for the light-shielding layer, it has sufficiently stable characteristics against a thermal process indispensable for MOSFET manufacturing such as impurity diffusion into a single crystal silicon layer. An SOI substrate can be manufactured. Further, a method for manufacturing an SOI substrate of the present invention
Includes a step of patterning the light shielding layer on the supporting substrate,
A process of forming an insulating layer on the supporting substrate and the light shielding layer.
And an oxide layer is formed on one surface of the single crystal silicon substrate.
And the single crystal silicon layer on the insulating layer of the supporting substrate.
A step of bonding the oxide layer of the con substrate by heat treatment,
The single crystal silicon substrate is thinned by an etching process.
Forming a single crystal silicon layer by etching, and the etching
A step of performing a heat treatment at a higher temperature than the heat treatment afterwards.
It is characterized by Further, the manufacture of the SOI substrate of the present invention
The method is such that the thickness of the insulator layer is compared with the thickness of the light shielding layer.
It is characterized by being thicker from 500 nm to 1000 nm
And

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 shows an SO to which the present invention is applied.
It is sectional drawing which shows the 1st Example of I board | substrate. 4 and 5 are views showing a method for manufacturing an SOI substrate according to the first embodiment of the present invention. As shown in FIG. 1, S according to the present invention
The OI substrate is one in which a light shielding layer 4 of a transistor element is provided on a transparent support substrate 1, and a single crystal silicon layer 2 is formed on the light shielding layer 4 of a transistor element via an insulating layer 5 and an oxide film layer 3 deposited thereon. . The manufacturing process of this SOI substrate will be described with reference to FIG. First, a transparent support substrate 1 as shown in FIG.
Then, the light shielding layer 4 is formed over the entire surface. In this example, quartz having a thickness of 1.1 mm was used as the supporting substrate. The light-shielding layer 4 is made of molybdenum 100 to 10 by a sputtering method.
Obtained by depositing to a thickness of about 00 nm. In this example, molybdenum was deposited to a thickness of 400 nm. The material of the light-shielding layer 4 is not limited to this embodiment, and any material may be used as long as it is stable to the maximum temperature of the thermal process of the device to be manufactured. For example, refractory metals such as tungsten and tantalum, polycrystalline silicon, and silicides such as tungsten silicide and molybdenum silicide are used as preferable materials, and the formation method is not limited to the sputtering method.
A CVD method, an electron beam heating evaporation method, or the like can be used. Next, in order to remove the light shielding layer 4 formed as shown in FIG. 4B so as to cover the channel region of the MOSFET formed thereon, the photoresist pattern 13 is formed.
To form. Next, the light shielding layer 4 is etched using the photoresist pattern 13 formed as shown in FIG. 4C as a mask, and the light shielding layer other than the transistor formation region is removed by dry etching. After etching, the photoresist pattern 13 is peeled off. Next, as shown in FIG. 4D, an insulating layer 5 is deposited in order to ensure insulation between the light shielding layer 4 and the single crystal silicon layer formed thereon. A silicon oxide film was used for this insulating layer. This silicon oxide film is
For example, it can be formed by a sputtering method or a plasma CVD method using TEOS (tetraethyl orthosilicate). The insulating layer 5 has a film thickness that can ensure sufficient insulation with the single crystal silicon layer 2 on the light-shielding layer 4 even if the step difference of the light-shielding layer 4 is flattened by polishing. Specifically, it is preferable that the insulating layer 5 is deposited in an amount of about 500 to 1000 nm larger than the film thickness of the light shielding layer 4. In this embodiment, the light shielding layer 4
A silicon oxide film having a thickness of 400 nm was deposited to a thickness of 1000 nm by plasma CVD of TEOS. The support substrate with the light-shielding layer thus obtained has unevenness on the substrate surface depending on the presence or absence of the light-shielding layer 4. Therefore, when the substrate is bonded to the single-crystal silicon substrate as it is, voids (voids) are formed in the unevenness. Are formed, and the bonding strength becomes nonuniform when they are bonded together. For this reason, as shown in FIG. 5E, the surface of the support substrate on which the light shielding layer 4 is formed is globally polished and flattened. As a method of flattening by polishing, CM
The P (chemical mechanical polishing) method was used. In CMP,
The polishing amount of the insulating layer 5 on the light shielding layer 4 is preferably set to be 200 to 700 nm larger than the film thickness of the light shielding layer 4. By performing the CMP process under this condition, the step difference at the edge of the light-shielding layer pattern can be reduced to 3 nm or less. Therefore, even when the single crystal silicon substrates are bonded together, uniform bonding strength can be obtained over the entire surfaces of the substrates. Next, as shown in FIG. 5F, the single crystal silicon substrate 20 and the supporting substrate having the light shielding layer formed thereon are bonded together. The single crystal silicon substrate 20 used for bonding has a thickness of 300 μm, and the surface thereof is previously oxidized by about 0.05 to 0.8 μm to form the oxide film layer 3. This is because the interface between the single crystal silicon layer 2 and the oxide film layer 3 formed after the bonding is formed by thermal oxidation, and the interface having good electric characteristics is secured. In the bonding step, for example, a method of directly bonding the two substrates by heat treatment at 300 ° C. for 2 hours can be adopted. In order to further increase the bonding strength, it is necessary to further raise the heat treatment temperature to about 450 ° C. However, there is a large difference in the coefficient of thermal expansion between the quartz substrate and the single crystal silicon substrate. Defects such as cracks occur in the silicon layer, which deteriorates the substrate quality. In order to suppress the occurrence of defects such as cracks,
It is desirable that the single crystal silicon substrate that has been once subjected to the heat treatment for bonding at 300 ° C. be thinned to about 100 to 150 μm by wet etching or CMP, and then heat treated at a higher temperature. In this embodiment, an 80 ° C. KOH aqueous solution was used to perform etching so that the thickness of the single crystal silicon substrate was 150 μm. After that, the bonded substrates are heat-treated again at 450 ° C.,
Improves the bonding strength. Further, as shown in FIG. 5G, this bonded substrate was polished so that the single crystal silicon layer 2 had a thickness of 3 to 5 μm.

The laminated substrate thus thinned is finally subjected to PACE (Plasma Assisted).
The film thickness of the silicon layer 2 is etched to a thickness of about 0.05 to 0.8 μm by the chemical etching method to finish. By this PACE treatment, the single crystal silicon layer 2 was obtained with a uniformity of 10% or less for a film thickness of 100 nm, for example. Through the above steps, the SOI substrate having the light shielding layer could be manufactured.

(Embodiment 2) FIGS. 6 and 7 are views showing a second embodiment of the present invention. 4 and 5 indicate the layers or members formed in the same step. In this embodiment, the steps up to the step of planarizing the surface of the supporting substrate with the patterned light shielding layer shown in FIG. 5E are exactly the same as those in the first embodiment.
FIG. 6A shows a single crystal silicon substrate used for bonding. This single crystal silicon substrate 20 has a thickness of 600 μm.
m, and the surface is 0.05 to 0.8 μm in advance.
The oxide film layer 3 is formed by being oxidized to some extent. Next, as shown in FIG. 6B, hydrogen ions 14 are implanted into the single crystal silicon substrate 20. For example, in this embodiment, hydrogen ions (H ⁺ ) are used at an acceleration voltage of 100 keV and a dose of 1
It was injected at 0E16 cm ⁻² . By this treatment, the high concentration layer 15 of hydrogen ions is formed in the single crystal silicon substrate 20. Next, as shown in FIG. 6C, the ion-implanted single crystal silicon substrate 20 is bonded to the support substrate 1 on which the light shielding layer 4 and the insulating layer 5 are formed. In the bonding step, for example, a method of directly bonding the two substrates by heat treatment at 300 ° C. for 2 hours can be adopted. Further, in FIG. 7D, the oxide film 3 (which becomes an embedded oxide film when the SOI substrate is completed) and the single crystal silicon layer 2 on the bonding surface side of the bonded single crystal silicon substrate 20 are left on the supporting substrate. As it is, heat treatment for peeling the single crystal silicon substrate 20 from the supporting substrate is performed. This peeling phenomenon of the substrate is caused by hydrogen ions introduced into the single crystal silicon substrate.
This occurs because the silicon bond is broken in a certain layer near the surface of the single crystal silicon substrate. In this example, the two bonded substrates were heated to 600 ° C. at a heating rate of 20 ° C./min. By this heat treatment, the bonded single crystal silicon substrate 20 is separated from the supporting substrate, and the silicon oxide film 3 of about 400 nm is formed on the supporting substrate surface.
And a single crystal silicon layer 2 having a thickness of about 200 nm was formed thereon. FIG. 7E is a sectional view showing the SOI substrate after separation. Since the surface of this SOI substrate has irregularities of about several nm remaining on the surface of the single crystal silicon layer, it is necessary to flatten it. For this reason, in this embodiment, a touch polish for polishing the substrate surface to a very small amount (polishing amount less than 10 nm) by using the CMP method was used. As the planarization method, a hydrogen annealing method in which heat treatment is performed in a hydrogen atmosphere can also be used. SOI manufactured by the above
The substrate has a good single crystal silicon film thickness uniformity, and has a structure having a light-shielding layer that suppresses light leakage with respect to a device to be manufactured.

(Embodiment 3) FIGS. 8 and 9 are views showing a third embodiment of the present invention. 4 to 6 indicate the layers or members formed in the same step. In this embodiment, the steps up to the step of flattening the surface of the supporting substrate with the patterned light-shielding layer shown in FIG. 5E are exactly the same as those in the first embodiment. FIG. 8A shows a silicon substrate for forming a single crystal silicon layer for bonding. Silicon substrate 16
Has a thickness of 600 μm, and its surface can be made into the porous layer 17 by anodizing in a HF / ethanol solution. By this treatment, the surface of the single crystal silicon substrate 16 is made porous by about 12 μm in a hydrogen atmosphere.
The surface of the porous layer 17 is smoothed by performing heat treatment at 50 ° C. This reduces the defect density of the single crystal silicon layer formed on the silicon substrate 16 thereafter and improves its quality. Next, as shown in FIG. 8B, the single crystal silicon layer 2 is formed by epitaxial growth on the silicon substrate 16 in which the surface of the porous silicon layer 17 is smoothed. The deposited film thickness of the single crystal silicon layer 2 by epitaxial growth was 500 nm in the present embodiment, but this does not limit the scope of application of the present invention. The thickness of the single crystal silicon layer can be arbitrarily selected according to the device to be manufactured. Furthermore, FIG.
As shown in (c), the surface of the single crystal silicon layer 2 is 50 to 40
Oxidation is performed to about 0 nm to form an oxide film layer 3, which is used as a buried oxide film of the SOI substrate after being bonded. Next, as shown in FIG. 9D, the substrate on which the single crystal silicon layer 2 and the oxide film layer 3 are formed is attached to the supporting substrate 1 on which the light shielding layer 4 and the insulating layer 5 are formed. In the bonding step, for example, a method of directly bonding the two substrates by heat treatment at 300 ° C. for 2 hours can be adopted. Next, as shown in FIG. 9E, the silicon substrate is ground while leaving the surface oxide film 3, the single crystal silicon layer 2 and the porous silicon layer 17 on the bonding surface side. Next, as shown in FIG. 9F, the porous silicon layer 17 is removed by etching to obtain the single crystal silicon layer 2 on the supporting substrate. The etching of the porous silicon layer 17 is very good when the etching liquid having a composition of HF / H ₂ O ₂ is used, because the porous silicon layer 17 exhibits high etching selectivity with respect to the single crystal silicon layer 2. It is possible to completely remove only porous silicon while maintaining uniform film thickness of single crystal silicon. The SOI with the porous silicon layer 17 thus removed
Since the substrate has irregularities of about several nm remaining on the surface of the single crystal silicon layer 2, it is necessary to flatten it. Therefore, in this embodiment, a hydrogen annealing method is used in which heat treatment is performed in a hydrogen atmosphere. As the planarization method, the CMP method is used to form the single crystal silicon layer 2 of the SOI substrate.
It is also possible to use a touch polish that polishes the surface of (1) to a minute amount (less than 10 nm). The SOI substrate manufactured as described above had a good uniformity of the single crystal silicon film thickness, and also had a structure having a light-shielding layer for suppressing light leakage with respect to the device to be manufactured.

(Embodiment 4) FIG. 10 is a diagram showing a planar layout of a transmissive liquid crystal panel as a preferred example of a device using an SOI substrate manufactured according to the present invention. In addition, in order to facilitate understanding, this drawing omits unnecessary portions and is drawn as a model.

As shown in FIG. 10, the display pixel area 27 is provided on the transparent substrate 1, and the pixel electrodes 19 are arranged in a matrix. A drive circuit that processes a display signal is formed around the display pixel region 27. The gate line drive circuit 21 sequentially scans the gate signal lines, and the data line drive circuit 22 supplies an image signal corresponding to image data to the source signal line. Further, circuits such as an input circuit 23 for taking in image data input from the outside via the pad area 26 and a timing control circuit 24 for controlling these circuits are provided, and all of these circuits are for pixel electrode switching. A MOSFET formed in the same process as or a process different from that of the MOSFET is used as an active element or a switching element, and is combined with a load element such as a resistor or a capacitor.

FIG. 11 shows the A- of the liquid crystal panel described in FIG.
It is sectional drawing in the A'line. As shown in FIG. 8, the liquid crystal panel includes a substrate 31 on which display pixels and drive circuits are formed, and a transparent substrate 32 having a counter electrode 33 made of a transparent conductive film (ITO) to which an LC common potential is applied. Well-known TN (Twisted Nematic) type liquid crystal 34 is disposed in a gap whose periphery is sealed by a sealing material 35.
Alternatively, an SH (Super Homeotropic) type liquid crystal in which liquid crystal molecules are substantially vertically aligned in a state where no voltage is applied is filled to form a liquid crystal panel 30. Note that the pad area 26 is set at a position where the seal material is provided so as to be outside the seal material 35 so that a signal can be input from the outside.

FIG. 12 is an enlarged plan view of a pixel portion of a transmissive liquid crystal panel using an SOI substrate manufactured according to the present invention. A MOSFET is formed in each pixel as a transistor element for controlling charge writing to the pixel. Each pixel is provided with a single crystal silicon layer 2 serving as a channel, a source and a drain region to form a MOSFET, one terminal of which is a gate line 6 and the other terminal is a source line 9
The remaining one terminal is connected to the drain electrode 8 connected to the pixel electrode 19 of the display pixel. Further, the upper light shielding layer 11 is formed in order to shield the channel region of the MOSFET and prevent light leakage between display pixels. The most important feature of this liquid crystal panel is that the control MOSFET of each display pixel, the display signal processing, the input circuit, and the MOSFET forming the timing control circuit are all under the formation area of SO.
This is a structure in which the light shielding layer 4 formed when the I substrate is manufactured is arranged.

This will be described in detail with reference to FIG. FIG. 13 is a diagram showing a cross-sectional structure taken along the line BB ′ of the MOSFET provided in the display pixel region shown in FIG. Between the channel region 2a of the MOSFET and the transparent support substrate 1, a light shielding layer 4 is formed so as to cover the channel region 2a.
Is provided, so that any incident light from the back surface side of the substrate can be blocked. For example, conventional SO
The light-shielding layer 4 of the present invention exhibits an effective light-shielding property with respect to the direct incident light 12c from the back surface of the substrate, the reflected light 12b on the back surface of the substrate, etc., which could not be shielded by the I structure. Here, the MOSFET structure of the display pixel portion is shown as an example of the light-shielding layer, but this structure is similarly applied to the MOSFET forming the driving circuit formed in the periphery of the display pixel area.

An oxide film layer 3 is provided on a support substrate 1 provided with a light shielding layer 4 and an insulating layer 5, and a source region 2b, a channel region 2a, and a source region 2b of a MOSFET formed by patterning a single crystal silicon layer. There is a drain region 2c, and this single crystal silicon region is covered with a gate insulating film 2d formed by surface-oxidizing the single crystal silicon region. Gate insulating film 5
There is a gate electrode 6 on the upper side, and the single crystal silicon region of the MOSFET and the gate electrode 6 are covered with a first interlayer film 7. Further, the source line 9 and the drain line 8 are connected to the source region 2b and the drain region 2c, respectively, through the openings of the first interlayer film 7. A second interlayer film 10 is further formed thereon, and the upper light-shielding layer 11 and the pixel electrode 19 are formed on the second interlayer film 10. The pixel electrode 1
9 is the drain electrode 8 through the opening of the second interlayer film 10.
The upper light-shielding layer 11 is formed of an opaque insulating material such as black polyimide resin and has a structure for preventing light leakage between pixel electrodes.

In the above embodiment, the transmissive liquid crystal panel has been described as an example, but this does not limit the application of the present invention, and other display devices using the transmissive display mode and reading optical information. Obviously, it can be applied to various semiconductor devices such as image input devices. Also in this case, the transistor element or the like for driving the semiconductor device may be formed on the light shielding layer provided on the SOI substrate as in the above embodiment.

Since the pattern of the light-shielding layer is determined by the arrangement of the transistors formed thereon, it is desirable that the substrate bonding step be included as part of the intended semiconductor device manufacturing process. By connecting the substrate manufacturing process and the device manufacturing process in this way, it is possible to build a total process using a high-performance substrate that meets the needs of the device side, and to improve the device performance and reduce the process cost. Can also be achieved.

[0023]

As described above, the SOI substrate according to the present invention is
Since a light-shielding layer was provided between the transparent support substrate and the semiconductor thin film layer formed on top of it, the light directly incident from the back surface of the substrate and the light reflected from the back surface of the substrate enter the transistor element formation area and Leakage can be prevented. Therefore, by using the SOI substrate of the present invention, it becomes possible to manufacture a device even for the use of light.

[Brief description of drawings]

FIG. 1 is a sectional view of an SOI substrate according to a first embodiment of the present invention.

FIG. 2 SO using a conventionally manufactured bonding method
Sectional drawing of I board | substrate.

FIG. 3 is a cross-sectional structural view showing a light shielding means of a MOSFET manufactured using an SOI substrate by a conventional bonding method.

FIG. 4 is a diagram showing a manufacturing process of an SOI substrate according to the first embodiment of the present invention.

FIG. 5 is a diagram showing a manufacturing process of the SOI substrate according to the first embodiment of the present invention.

FIG. 6 is a view showing a manufacturing process of an SOI substrate according to the second embodiment of the present invention.

FIG. 7 is a diagram showing a manufacturing process of an SOI substrate according to the second embodiment of the present invention.

FIG. 8 is a diagram showing a manufacturing process of an SOI substrate according to the third embodiment of the present invention.

FIG. 9 is a diagram showing a process of manufacturing an SOI substrate according to the third embodiment of the present invention.

FIG. 10 is a plan view of a liquid crystal panel according to a fourth embodiment of the present invention.

FIG. 11 is a sectional view of a liquid crystal panel according to a fourth embodiment of the present invention.

FIG. 12 is a plan layout view of a display pixel portion manufactured on a substrate of a liquid crystal panel according to a fourth embodiment of the present invention.

FIG. 13 is a sectional structural view of a MOSFET manufactured on a substrate of a liquid crystal panel according to a fourth embodiment of the present invention.

[Explanation of symbols]

1 transparent support substrate 2 Single crystal silicon thin film 2a MOSFET channel region 2b MOSFET source region 2c MOSFET drain region 2d MOSFET gate oxide film 3 Embedded oxide film by surface oxidation 4 Light-shielding layer 5 insulating layers 6 Gate electrode 7 First interlayer film 8 drain electrode 9 Source electrode and signal line 10 Second interlayer film 11 Upper light-shielding layer 12a Incident light from the substrate surface side 12b Light incident on the surface of the substrate and reflected by the supporting substrate 12c Incident light from the backside of the substrate 13 Photoresist mask 14 Hydrogen ion beam 15 Hydrogen ion layer implanted in silicon substrate 16 Silicon substrate 17 Porous silicon layer 19 pixel electrodes 20 Single crystal silicon substrate 21 Data line drive circuit 22 Gate line drive circuit 23 Input circuit 24 Timing control circuit 26 Pad area 27 display pixel area 30 LCD panel 31 LCD panel element substrate 32 transparent substrate 33 Counter electrode 34 Liquid crystal layer 35 Seal material

Claims (6)

(57) [Claims] Formation and 1. A process for the light-shielding layer pattern formed on the support substrate, forming an insulating layer on said supporting substrate and said shading layer, the oxide layer on one surface of the single crystal silicon substrate And a step of bonding the oxide layer of the single crystal silicon substrate on the insulator layer of the supporting substrate by heat treatment, and the single crystal silicon substrate by etching treatment.
Forming a single crystal silicon layer by thinning
A heat treatment at a higher temperature than the above heat treatment after etching
And a method for manufacturing an SOI substrate. 2. The thickness of the insulator layer is the thickness of the light shielding layer.
Thicker from 500nm to 1000nm compared to
The method for manufacturing an SOI substrate according to claim 1, wherein 3. In the step of patterning the light shielding layer,
Transistor element formed of the single crystal silicon layer
Characterized by being patterned to cover the child area
The method for manufacturing an SOI substrate according to claim 1. 4. The manufacturing method according to claim 1.
An SOI substrate manufactured by the manufacturing method. 5. The manufacturing method according to claim 1 or 3.
Device using the completed SOI substrate. 6. The manufacturing method according to claim 1 or 3.
LCD panel using the manufactured SOI substrate.