JP3529238B2 - Semiconductor switch - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor switch for controlling switching by turning on / off a signal, and more particularly to a semiconductor switch suitable for switching an alternating current.

[0002]

2. Description of the Related Art Generally, for switching control for turning on / off an alternating current signal, a mechanical switch using a contact that mechanically contacts or separates or a semiconductor switch that performs contactless switching control by a semiconductor switching element is used. . Reed switches and relays that electrically control mechanical switches are often used.

A semiconductor switch is often used when it is necessary to control ON / OFF of an AC signal at high speed or when it is desired to turn on / off the AC signal based on the operation of an electric control circuit.

Semiconductor switches that can be used to turn on / off alternating current include thyristors, triacs, GTOs, solid state relays (SSRs), and IGs.
BT or the like is used.

Each of these semiconductor switches has a large voltage drop when conducting. Therefore, the power loss is large,
Good results were often not obtained when it was desired to minimize switch losses. Further, when used in a power supply circuit such as an inverter power supply which is a kind of so-called switching power supply, a high voltage must be switched, and a sufficient withstand voltage is required. Further, when the switch is turned on, a large current may flow due to overshoot, and the influence of this large current cannot be ignored.

[0006]

As described above, conventionally, the mechanical switch and the semiconductor switch used as the switch for turning on / off the AC signal have various problems. For example, mechanical switches are inconvenient for high-speed operation and electrical control, and semiconductor switches are
The voltage drop during conduction is large, and the power loss due to the switch is large.

The present invention has been made in view of the above-mentioned circumstances, and is a semiconductor switch that directly responds to electrical control, can operate at high speed, and can suppress voltage drop and power loss at the time of conduction. The purpose is to provide.

[0008]

To achieve the above object, a semiconductor switch according to a first aspect of the present invention comprises a first semiconductor switching element, a second semiconductor switching element and a control circuit. The first semiconductor switch element has a first current path and a first control terminal,
Controlling the opening and closing of the first current path according to a signal applied to the control terminal of the second semiconductor switch element,
Current path and a second control terminal, the second current path is controlled to open / close in accordance with a signal applied to the second control terminal, and the first current path and the second current path are controlled. A current path is connected in series and symmetrically, and the control circuit applies a signal to the first and second control terminals to open and close the first and second current paths connected in series. To control.

According to this structure, the first and second semiconductor switching elements are turned on / off integrally to limit the current. Therefore, the current path can be turned on / off more reliably than when the current path is turned on / off by a single semiconductor switching element. As the semiconductor switch element, a bipolar transistor, a field effect transistor, a phototransistor, a photodiode, a Hall element or the like can be used. When using a bipolar transistor, the control circuit applies a bias voltage and current to the base. When using a FET, the control circuit applies a bias voltage to the gate. When a photodiode or phototransistor is used, the control circuit applies light to turn them on and off. In this case, the control circuit and the first and second semiconductor switch elements are connected by the physical medium of light. When using Hall elements, the control circuit applies a magnetic field (magnetic flux) to turn them on.
Turn off. In this case, the control circuit and the first and second semiconductor switch elements are connected by a physical medium called magnetic flux.

The first and second semiconductor switching elements may be connected in series so that their current paths have opposite directions, and may be symmetrically configured. With such a configuration, when switching the alternating current, the breakdown voltage is secured by either one of the semiconductor switching elements. Therefore, it is suitable as an AC switch.

For example, the first semiconductor switching element controls the opening and closing of the current path according to the voltage between the connection point with the second semiconductor switching element and the first control terminal, The second semiconductor switching element controls opening / closing of the current path according to a voltage between a connection point with the first semiconductor switching element and the second control terminal. In this case, the control circuit applies a voltage between the first and second control terminals and a point where the first and second semiconductor switch elements are connected to each other, and the control circuit is connected in series. On / off of the first and second current paths is controlled.

The control circuit may include, for example, a first resistor connected to the first control terminal, a second resistor connected to the second control terminal, and the first and second currents. A first resistor connected to a connection point of the path,
The signal is applied through the resistor. In this configuration, for example, the bias voltage can be secured by the first to third resistors.

Further, the control circuit includes the first and second control circuits.
May include a resistor that is connected to the control terminal of and that limits the current for control.

In the control circuit, the first and second semiconductor switch elements are turned on substantially completely during on-control,
It is desirable to apply a bias to the first and second semiconductor switching elements so that the first and second semiconductor switching elements are turned off substantially completely during the off control. With such a configuration, it is possible to sufficiently turn on / off the first and second semiconductor switching elements, sufficiently reduce the on-resistance of the semiconductor switch, and to completely shut off the current when turning off. it can. The biasing method, the voltage, etc. are individually changed depending on the type of semiconductor element, the impurity concentration, etc., and therefore an appropriate one is selected. For example, when a normally-on element is used, 0-bias is applied when it is on, and a bias that completely turns off the first and second semiconductor switches is applied when it is off. When a normally-off element is used, 0-bias is applied when it is off, and a signal that completely turns on the first and second semiconductor switches is supplied when it is on.

The control circuit applies the signal to the first and second semiconductor switch elements, for example, by means of the means to be charged which is charged by the current to be switched and the charging power of the means to be charged. Equipped with. When the semiconductor switch is off, the means to be charged is charged and a bias voltage is applied using this charging power, so that the semiconductor switch can be easily turned on / off without using a separate power supply. The means to be charged is composed of a secondary battery or a capacitor such as a super capacitor.

A semiconductor switch according to a second aspect of the present invention comprises a first semiconductor switching element, a second semiconductor switching element and a control circuit, wherein the first semiconductor switching element is a current path. The second semiconductor switch has a pair of current path terminals and a control terminal at both ends, and controls the opening and closing of the current path according to a bias voltage between one of the pair of current path terminals and the control terminal. The element has a pair of current path terminals and a control terminal that are both ends of a current path, and one of the pair of current path terminals is connected to the one current path terminal of the first semiconductor switch element, A current path is connected to the current path of the first semiconductor switching element in series and symmetrically in pairs, and the current is supplied in accordance with a bias voltage between one of the pair of current path terminals and the control terminal. Control the opening and closing of the road, The control circuit has a common terminal between the control terminals of the first and second semiconductor switching elements and the current path terminals of the first and second semiconductor switching elements which are paired with each other. A bias voltage is applied to control the series-connected current paths.

According to such a configuration, the first and second semiconductor switching elements are turned on / off integrally to limit the current. Therefore, the current path can be turned on / off more reliably than when the current path is turned on / off by a single semiconductor switching element. Further, since the current path can be turned on and off almost completely by controlling the bias voltage, the current path can be turned on and off by simple control.

As the semiconductor switch element, a bipolar transistor, a field effect transistor, a phototransistor, a photodiode, a Hall element or the like can be used. When using a bipolar transistor, the control circuit applies a bias voltage and current to the base. When using a FET, the control circuit applies a bias voltage to the gate. When a photodiode or phototransistor is used, the control circuit applies light to turn them on and off. In this case, the control circuit and the first and second semiconductor switch elements are connected by the physical medium of light. When using Hall elements, the control circuit applies a magnetic field (magnetic flux) to turn them on and off. In this case, the control circuit and the first and second semiconductor switch elements are connected by a physical medium called magnetic flux.

It is desirable that the first and second semiconductor switch elements are connected in series with their current paths in opposite directions and are symmetrically configured.

The control circuit includes, for example, control terminals of the first and second semiconductor switch elements and the first and second semiconductor switch elements.
And a resistor commonly connected between each of the semiconductor switch elements and one of the current path terminals connected to each other. Alternatively,
The control circuit includes a resistor that is connected to the control terminals of the first and second semiconductor switch elements and limits a control current.

It is preferable that the control circuit applies a sufficiently deep forward bias to the first and second semiconductor switch elements during ON control. By doing this,
The semiconductor switch can be turned on completely, and the loss in the semiconductor switch element can be suppressed.

A semiconductor switch according to a third aspect of the present invention is a semiconductor switch composed of first and second bipolar transistors and a control circuit, wherein the first bipolar transistor comprises an emitter, a collector and a base. And opening and closing a current path between the emitter and the collector according to a bias voltage between the emitter and the base, the second bipolar transistor has an emitter, a collector and a base, and the emitter is A current path between the emitter and collector of the first bipolar transistor is connected in series and symmetrically to a current path between the emitter and collector of the first bipolar transistor, and Opening and closing the current path between the emitter and collector according to the bias voltage between the emitter and base However, the control circuit applies a bias voltage between the bases of the first and second bipolar transistors and the mutually connected emitters of the first and second transistors to connect them in series. And controlling the generated current path.

With such a configuration, the first and second transistors are turned on / off integrally to limit the current.
Therefore, the current path can be turned on / off more reliably than when the current path is turned on / off by a single transistor. Further, since the current path can be turned on / off by controlling the bias voltage, the current path can be turned on / off by simple control.

Furthermore, since the current paths of the first and second transistors are connected in opposite directions, the breakdown voltage can be secured regardless of the polarity of the applied voltage. That is, generally, the breakdown voltage of the transistor is large between the base and the collector, and the breakdown voltage of the transistor is small between the base and the emitter. According to this configuration, when a voltage of one polarity is applied to the switch, the base of one transistor is
The main breakdown voltage can be secured by the breakdown voltage between the collectors, and when the voltage of the other polarity is applied to the switch, the main breakdown voltage can be secured by the breakdown voltage between the base and collector of the other transistor. Therefore, when this semiconductor switch is used as an AC switch, a sufficient breakdown voltage can be secured.

The control circuit may include resistors commonly connected between the bases of the first and second bipolar transistors and the mutually connected emitters of the first and second transistors. good. With this configuration, the bias voltage can be secured.

The control circuit may include a base current limiting resistor connected to the bases of the first and second bipolar transistors. It is preferable that the control circuit applies a sufficiently deep forward bias between the base and the emitter of the first and second bipolar transistors during ON control. With such a configuration, the first and second transistors can be operated in the saturation region to substantially equalize the voltages of the emitter and collector, that is, the current can be turned on / off without loss. .

The control circuit uses, for example, a charged means to be charged by a current to be switched, and a signal for on / off control using the charging power of the charged means, the first and second semiconductor switches. Apply to the device. The first
The semiconductor layers forming the emitter and the collector of the second transistor may have substantially the same thickness.
With this structure, the breakdown voltage between the emitter and the base and the breakdown voltage between the collector and the base can be made substantially equal. Therefore, the AC switch can be manufactured without paying too much attention to the distinction between the emitter and the collector, and the breakdown voltage can be increased.

The emitters of the first and second transistors may be integrally formed (in one semiconductor layer). With such a structure, the element structure can be simplified and the element size can be suppressed.

The control circuit includes a resistor commonly connected between the bases of the first and second transistors and the mutually connected emitters of the first and second transistors. Good. It is preferable that the control circuit applies a sufficiently deep forward bias between the base and the emitter of the first and second transistors during ON control.

A semiconductor switch according to a fourth aspect of the present invention has a source and a drain which are both ends of a current path and a gate which is a control terminal, and a bias voltage between one of the source and the drain and the gate. A first FET for controlling opening / closing of a current path between the source and the drain according to the
(Field-effect transistor), a source and a drain at both ends of a current path, and a gate as a control terminal, and one of the source and the drain is connected to one of the source and the drain of the first FET. , The source-drain current path is connected in series and symmetrically to the current path of the first FET in a pair, and in accordance with a bias voltage between one of the source and drain and the gate. A second FE for controlling the opening and closing of the current path between the source and drain
A common bias voltage is applied between T, the gates of the pair of first and second FETs, and one of the sources and drains of the first and second FETs, which are connected to each other. And a control circuit for controlling the series-connected current paths.

According to this structure, the first and second FETs are turned on / off integrally to turn on / off the current path. Therefore, the current path can be turned on / off more reliably than when the current path is turned on / off by a single semiconductor switching element. Further, since the current path can be turned on / off by controlling the bias voltage, the current path can be turned on / off by simple control.

The first and second FETs may be symmetrically formed by connecting the first and second FETs in series with their respective current paths oriented in opposite directions.

The control circuit includes the first and second FEs.
A resistor may be commonly connected between the gate of T and one of the source and drain of each of the first and second FETs connected together.

The control circuit may apply a sufficiently deep forward bias to the first and second FETs during ON control.

The first and second FETs may be junction type FETs.

A semiconductor switch according to a fifth aspect of the present invention has a source and a drain which are both ends of a current path, and a gate which is a control terminal, and the semiconductor switch according to the bias voltage between the source and the gate. A first FET that controls opening and closing of a current path between a source and a drain, a source and a drain that are both ends of the current path, and a gate that is a control terminal, and the source is connected to the source of the first FET. Then, the source-drain current path is connected in series and symmetrically to the source-drain current path of the first FET in a pair, and is connected to the bias voltage between the source and the gate. Accordingly, a second FET for controlling the opening and closing of the current path between the source and the drain, the gates of the first and second FETs forming the pair, and the first and second FEs.
A control circuit for applying a common bias voltage to each of the T sources connected to each other and controlling the series-connected current paths.

Also with this structure, the current path can be turned on (conducting) or off (cutting off) reliably and efficiently by controlling the bias voltage using the two FETs.

The control circuit includes the first and second FEs.
A resistor commonly connected between the gate of T and each of the sources of the first and second FETs connected to each other may be included.

The control circuit turns on both transistors substantially completely during on control, turns off both transistors substantially completely during off control, and sets the bias to the first level.
It is desirable to apply between the source and the drain of the second FET. With such a configuration, the on resistance of the semiconductor switch can be made almost zero.

The first and second FETs may be MOS (metal oxide semiconductor) type FETs.

A semiconductor switch according to a sixth aspect of the present invention has a source and a drain which are both ends of a current path and a gate which is a control terminal, and a bias voltage between one of the source and the drain and the gate. A junction-type FET that controls opening / closing of a current path between the source and the drain, and a gate of the junction-type FET.
A control circuit for controlling a current path between the source and the drain by applying a common bias voltage between the source and the drain.

The control circuit is the junction type F
A first resistor having one end to the gate of the ET is connected, it has an anode and a cathode, respectively, each of the mosquito source de is <br/> are respectively connected to the source and drain of each of the junction-type FET, the first The other end of the resistance of 1
First and second diodes over de is connected respectively, the second and third resistors connected in parallel to said first and second diode, it may be included.

A normal junction type FET is normally on when a positive voltage is applied to its gate. Therefore, the control circuit does not apply a bias during the ON control and applies a strong reverse bias during the OFF control to turn off the junction type FET.

The semiconductor portion excluding the control portion of each semiconductor switch may be modularized, and ON / OFF of the semiconductor in the module may be controlled by an external circuit or the like.

[0045]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. A semiconductor switch according to a first embodiment of the present invention will be described with reference to FIGS.

FIG. 1 schematically shows the structure of a semiconductor switch according to the first embodiment of the present invention. The semiconductor switch shown in FIG. 1 includes a first transistor TR1, a second transistor TR2 and resistors R1, RB1 and RB2.
Is equipped with.

First and second transistors TR1 and T
Each of R2 is an NPN type transistor. The transistor TR1 has a base B1, a collector C1 and an emitter E1. The transistor TR2 has a base B2, a collector C2 and an emitter E2.

The emitter E1 of the transistor TR1 is connected to the emitter E1 of the transistor TR2, and the base B1 of the transistor TR1 is connected to one end of a current limiting resistor RB1. Base B2 of transistor TR2
Is connected to one end of a current limiting resistor RB2. One end of the resistor R1 is connected to a connection point between the emitter E1 and the emitter E2. The other ends of the resistors R1, RB1 and RB2 are connected to each other. The connection point of the resistors R1, RB1, and RB2 is the first bias terminal BT1 and the emitter E
1 is connected to the emitter E2 at the second bias terminal B
As T2, a control bias is supplied between them.

The collector C1 of the transistor TR1 has
The connection terminal TAC1 is connected. Transistor TR2
A connection terminal TAC2 is connected to the collector C2 of. For example, transistors TR1 and TR2, resistors R1,
RB1 and RB2 are modularized by molding with resin or the like. Connection terminal TAC to this module
1, TAC2, BT1 and BT2 are arranged.

As described above, in the transistors TR1 and TR2, the emitters (E1 and E2) of the transistors TR1 and TR2 are connected to each other to have a symmetrical structure, and the collector C1-emitter E1 is formed.
The current path between the emitter E2 and the collector C2 is connected in series and in the opposite direction to the current path between them. That is, the current paths of the transistors TR1 and TR2 are symmetrically connected in series in opposite directions. The voltage (current) to be switched is applied (supplied) between the connection terminals TAC1 and TAC2. The bases (B1 and B2) of the transistors TR1 and TR2 are also commonly connected via the current limiting resistors RB1 and RB2, and the control bias applied from both ends of the resistor R1, that is, the bias terminals BT1 and BT2, is the bases of both. Commonly given between emitters.

The signal AC to be turned on / off may be an alternating current signal or a direct current. When the semiconductor switch is turned on, the signal AC flows through the current path between the collector C1-emitter E1-emitter E2-collector C2.

The bias controller BA has a bias terminal BT.
1 and BT2 have an on bias or an off bias as shown in FIG.
Apply as shown in.

In such a configuration, the bias control unit BA applies a negative control bias to the bias terminal BT1 and a positive control bias to the bias terminal BT2 during the off control. Due to this control bias, the transistor TR1
And TR2 are both cut off, and the current path between collector C1-emitter E1-emitter E2-collector C2 is cut off.

When the switch is turned off, the transistor TR1 or TR2 is a reverse connection transistor (inverse transistor) depending on the polarity of the current to be cut off. The inverse transistor has a large withstand voltage. Therefore, a semiconductor switch having a large breakdown voltage can be obtained.

On the other hand, at the time of ON control, the bias control unit B
A is the bias terminal BT1 plus, the bias terminal BT
The control bias is applied with 2 being negative. Due to this control bias, both the transistors TR1 and TR2 are turned on, and the current path between the collector C1-emitter E1-emitter E2-collector C2 becomes conductive.

At this time, the control bias current is set to the base B1.
And B2 are sufficiently flowed, the transistor TR1
, And TR2 can be turned on substantially completely and operated in the saturation region. Therefore, the voltage drop between the collector C1 and the emitter E1 of the transistor TR1 and between the emitter E2 and the collector C2 of the transistor TR2 can be made sufficiently small, and a switch with a small voltage loss during conduction can be realized.

Further, in the process of changing from the cutoff state to the conduction state during the ON control, a large inrush current flows in the case of a mechanical switch or the like, but in the semiconductor switch shown in FIG. 1, the OFF state is changed to the ON state. In the process, due to the constant current characteristic (the characteristic that a constant current corresponding to the base voltage flows), the current is limited to a substantially constant value, and a large inrush current does not flow.

FIG. 2 shows a comparison of the inrush currents of the semiconductor switch and the mechanical switch. The example shown in FIG.
It is a result of actually measuring the inrush current of the switch and the mechanical switch as shown in FIG. 1 in the experimental circuit shown in FIG.

In the experimental circuit shown in FIG. 3, a switch, a load and a measuring resistor are connected in series. Load is 10
It is an inductive load (white lamp) of 0 V and 200 W, and the value of the resistance for measurement is 0.1Ω. Such a switch-
Apply 100V DC to the load-measuring resistor series circuit,
The waveforms at both ends of the measuring resistor are measured with a storage oscilloscope. In FIG. 2, the voltage waveform between the terminals of the measuring resistor observed by the storage oscilloscope is converted into a current value and shown. This switch-load-
A capacitor is connected in parallel to the series circuit of the measuring resistor.

In the case of the mechanical switch shown by the broken line in FIG. 2, when the switch is turned on, an inrush current of about 18 A flows, and then gradually attenuates and converges to 2 A. On the other hand, in the case of the semiconductor switch of FIG. 1, the peak is about 8 A immediately after the switch is turned on.
Although a certain amount of current flows, a sharp inrush current does not flow and gradually attenuates and converges to 2A. Therefore, a large amount of current does not suddenly flow through the transistors TR1 and TR2, and good withstand current and withstand voltage characteristics can be obtained.

In the semiconductor switch shown in FIG. 1, NPN type transistors are used as the transistors TR1 and TR2, but PNP type transistors can be used in the same manner as described above. Even in the case of a PNP type transistor, the emitters are connected to each other, and the polarity of the control bias may be reversed between on and off.

The breakdown voltage of the bipolar transistor is small between the base and the emitter and large between the base and the collector.
For this reason, when the configuration shown in FIG. 1 is adopted, the transistor TR1 or TR
One of the two becomes a reverse connection (inverse transistor),
A large breakdown voltage can be obtained due to the breakdown voltage between the base and the collector.

As the bipolar transistor used in such a structure, it is desirable that the thickness t e of the emitter layer and the thickness t c of the collector layer are substantially equal, as shown in FIG. By using the bipolar transistor element having this structure, the current paths of the two transistors can be connected in a cascade to form a semiconductor switch without having to worry about the emitter and collector.

Further, in order to reduce the area occupied by the elements on the semiconductor substrate, the emitters of the two bipolar transistors may have a common structure as shown in FIG. In this case, it is desirable that the thickness of the common emitter is the same as or thicker than the thickness of each collector.

As shown in FIG. 6, the alternating current AC to be switched is rectified by the rectifier circuit RF to charge the supercapacitor SC (which may be a secondary battery or the like), and this is used as the power source of the bias controller BA. May be used. With this configuration, it is not necessary to separately prepare a power source for controlling the semiconductor switch, and the configuration and control of the semiconductor switch are facilitated.

Further, as shown in FIG. 3, a supercapacitor or a secondary battery may be charged with a direct current to be switched, and this may be used as a power source for the bias controller BA. With this configuration, it is not necessary to separately prepare a power source for controlling the semiconductor switch, and the configuration and control of the semiconductor switch are facilitated.

FIG. 7 schematically shows the structure of a semiconductor switch according to the second embodiment of the present invention.

The semiconductor switch shown in FIG. 6 is constituted by using a MOS type FET (metal oxide semiconductor type field effect transistor to hereinafter referred to as "MOSFET element") as a semiconductor switching element.
Element MF1, second MOSFET element MF2 and resistor R
1 is provided.

The first and second MOSFET elements MF1 and MF2 are both N-type MOSFETs. MO
The SFET element MF1 has a gate G1, a drain D1 and a source S1, and the MOSFET element MF2 has a gate G2, a drain D2 and a source S2. MO
The source S1 of the SFET element MF1 is connected to the source S2 of the MOSFET element MF2,
The gate G1 of 1 is the gate G of the MOSFET element MF2.
Connected to 2.

The connection terminal TAC1 is connected to the drain D1 of the first MOSFET element MF1. Second M
The connection terminal T is connected to the drain D2 of the OSFET element MF2.
AC2 is connected.

One end of the resistor R1 has a source S1 and a source S
2 is connected to the connection point with 2 and the other end of the resistor R1 has a gate G
1 and the gate G2. A first bias terminal BT1 is provided at a connection point between the gate G1 and the gate G2.
Is connected, and at the connection point between the source S1 and the source S2,
The second bias terminal BT2 is connected. By a bias circuit (not shown), the first and second bias terminals BT1
A control bias is provided between BT2 and BT2.

That is, the MOSFET elements MF1 and M
The drain D1-source S1 current path of F2 is connected in series and in the opposite direction to the source S2-drain D2 current path. Gates (G1 and G2) of the MOSFET elements MF1 and MF2 are also commonly connected. Resistance R
The control bias applied from both ends of 1, that is, from the bias terminals BT1 and BT2 is commonly applied between the gate and source of both.

For example, the first and second MOSFET elements MF1 and MF2 and the resistor R1 are modularized by molding with resin or the like. Connection terminals TAC1, TAC2, BT1 and BT2 are arranged outside the module.

When the semiconductor switch is turned on, the signal AC to be controlled flows through the current path between the drain D1-source S1-source S2-drain D2.

In such a configuration, at the time of OFF control, a control bias is applied with the bias terminals BT1 on the gate G1 and G2 side being negative and the bias terminals BT2 on the sources S1 and S2 side being positive, contrary to the illustration.
Due to this control bias, the MOSFET elements MF1 and MF2 are both cut off, and the current path between the drain D1-source S1-source S2-drain D2 is cut off.

At the time of ON control, as shown in FIG.
Bias terminal BT1 on the 1st and G2 side is positive, source S
Bias terminal BT2 on the 1st and S2 side is set to minus,
Apply a control bias. With this control bias, M
Both the OSFET elements MF1 and MF2 are turned on, and the current path between the drain D1-source S1-source S2-drain D2 is conducted. At this time, by applying a sufficient bias, that is, by applying a sufficiently deep bias, it becomes possible to operate each MOSFET element in a saturated state and sufficiently reduce the on-resistance.

The semiconductor switch shown in FIG.
N-type MOSFE as the SFET elements MF1 and MF2
Although T is used, a P-type MOSFET can be used in the same manner as described above. P-type MOSF
In the case of ET as well, the sources are connected to each other, and only the polarity of the control bias may be reversed between on and off.

The MOSFET element is not limited to the enhancement type, but a depletion type may be used. For example, by using a normally-on MOSFET element by injecting impurities into the gate region, both MOSFETs can be sufficiently turned on with 0 or a slight bias when turned on to obtain a semiconductor switch with a small on-resistance. it can. However, when off,
It is necessary to apply a bias sufficient to turn off both MOSFET devices.

If MOSFET elements having substantially the same source and drain structures are used, the MOSF
The semiconductor switch can be configured without paying attention to the direction of the ET current path. Also, as shown in FIG.
If two MOSFET elements having a common source region are used, the size of the semiconductor switch as a discrete member can be reduced.

FIG. 9 schematically shows the structure of a semiconductor switch according to the third embodiment of the present invention. The semiconductor switch shown in FIG. 9 is configured by using an N-type junction type FET (metal oxide semiconductor field effect transistor to hereinafter referred to as “JFET element”) as a semiconductor switching element, and includes a JFET element JF and a diode. D1 and D2 and resistors R2, R3 and R4 are provided.

In the JFET, since the source and the drain are equivalent and it is not necessary to distinguish them, both ends of the current path function as both the source and the drain. Therefore, here, the source or the drain is referred to as a source / drain. The JFET element JF is an N-type JFET, and has source / drains SD1 and SD2 and a gate G.

The connection terminal TAC1, the cathode of the diode D1 and one end of the resistor R2 are commonly connected to one source / drain SD1 of the JFET element JF. JF
The connection terminal TAC2, the cathode of the diode D2 and one end of the resistor R3 are commonly connected to the other source / drain SD2 of the ET element JF.

The gate R of the JFET element JF has a resistor R.
4, one end of which is connected to the other end of the resistor R4, the anode of the diode D1, the other end of the resistor R2, and the diode D2.
And the other end of the resistor R3 are commonly connected. The gate G is the first bias terminal BT1, and the common connection point of the other end of the resistor R4, the anode of the diode D1, the other end of the resistor R2, the anode of the diode D2 and the other end of the resistor R3 is the second bias terminal BT2. As a result, a control bias is supplied between them.

That is, the JFET element JF has a symmetric structure in essence, and the controlled signal AC is source / source.
It flows through the current path between the drain SD1 and the source / drain SD2. Both ends of the resistor R4, that is, the bias terminal BT1
And the control bias applied from BT2 is the gate G of the JFET element JF and both source / drain SD1 and SD.
It is commonly given to the two.

In such a configuration, in the OFF control, the bias terminal BT1 on the gate G side is minus, and the bias terminals BT2 on the source / drain SD1 and SD2 sides are BT2.
Is positive and the control bias is applied. By this control bias, the JFET element JF is cut off, and the current path between the source / drain SD1 and the source / drain SD2 is cut off.

When a positive potential is applied to the gate of the JFET element, it is basically in a normally-on state. Therefore, at the time of ON control, as shown in the figure, the bias terminal BT1 on the gate G side is positive and the source / drain SD1 is
And the bias terminal BT2 on the SD2 side is set to zero or minus, and a control bias is applied. By this control bias, the JFET element JF is turned on, and the current path between the source / drain SD1 and the source / drain SD2 is conducted.

Incidentally, the semiconductor switch shown in FIG.
Although the N-type JFET element is used as the ET element JF, it can be implemented in the same manner as described above by using the P-type JFET element. In the case of a P-type JFET element, the polarity of the control bias may be reversed between on and off.

FIG. 10 schematically shows the structure of a semiconductor switch according to the fourth embodiment of the present invention. Figure 1
The semiconductor switch shown in FIG.
It is configured by using a JFET element instead of the FET element. The semiconductor switch in FIG. 10 includes a first JFET element JF1, a second JFET element JF2, and a resistor R1.

First and second JFET elements JF1 and JF
F2 is an N-type JFET element. JFET
The element JF1 has source / drain SD11, SD12 and gate G11, and the JFET element JF2 has source / drain SD21, SD22 and gate G21. One source / drain SD12 of the JFET element JF1 is connected to one source / drain SD2 of the JFET element JF2 and the gate G of the JFET element JF1 is connected.
Reference numeral 11 is connected to the gate G21 of the JFET element JF2.

The connection terminal TAC1 to which the voltage (current) to be switched is applied is connected to the other source / drain SD11 of the JFET element JF1, and the connection terminal TAC2 to which the voltage (current) to be switched is applied is the JFET element JF2. Is connected to the other source / drain SD22.

One end of the resistor R1 has a source / drain SD.
12 and the source / drain SD21 are connected to each other, and the other end of the resistor R1 is connected to a connection point between the gate G11 and the gate G12. The connection point between the gate G11 and the gate G12 is the first bias terminal BT1, and the source / source
A connection point between the drain SD12 and the source / drain SD21 serves as a second bias terminal BT2, and a control bias is supplied therebetween.

That is, JFET elements JF1 and JF2
Source / drain (SD12 and SD21) of each one of them are mutually connected to form a symmetric structure.
The current path between the drain SD11 and the source / drain SD12 is connected in series with the current path between the source / drain SD21 and the source / drain SD22. JFET element J
The gates (G11 and G21) of F1 and JF2 are also connected in common, and both ends of the resistor R1, that is, the bias terminal BT1.
And the control bias applied from BT2 are commonly applied between the gate and the source / drain of both.

The controlled signal AC flows through a current path between the source / drain SD11-source / drain SD12-source / drain SD21-source / drain SD22.

In such a configuration, at the time of OFF control, contrary to the figure, the bias terminal BT1 on the side of the gates G11 and G21 is minus and the bias terminal BT2 on the side of the source / drain SD12 and SD21 is plus, and the control bias is applied. To do. With this control bias, JF
Both ET elements JF1 and JF2 are cut off, and source / drain SD11-source / drain SD12-
Source / Drain SD21-Source / Drain SD22
The current path between them is cut off.

At the time of ON control, as shown in FIG.
Bias terminal BT1 on the side of 11 and G21 is plus, bias terminal B on the side of source / drain SD12 and SD21 is B
A control bias is applied with T2 set to 0 or negative. By this control bias, both JFET elements JF1 and JF2 are turned on, and the source / drain SD
11-source / drain SD12-source / drain S
The current path between D21 and source / drain SD22 is conducted.

The semiconductor switch shown in FIG.
Although the N-type JFET is used as the FET elements JF1 and JF2, the same operation as described above can be performed by using the P-type JFET. Even in the case of the P-type JFET, one source / drain is still connected, and only the polarity of the control bias may be reversed between on and off.

As a semiconductor element capable of controlling large current on / off, SIT (Static Induction Transisto
r) is known. This semiconductor element is basically
For example, as shown in FIG. 11, it has a configuration in which a gate made of a thin metal wire is inserted into an n-type semiconductor layer in which a source electrode is formed on the upper surface and a drain electrode is formed on the lower surface. By controlling the size of the depletion layer in the vicinity of the thin metal wire, the current is turned on / off. By using this semiconductor element in place of the MOSFET element in FIG. 7 or the JFET element in FIG. 11, it is possible to manufacture a semiconductor switch using SIT as a switch element.

FIG. 12 schematically shows the configuration of a power supply control circuit using a semiconductor switch according to the fifth embodiment of the present invention. The power supply control circuit shown in FIG. 12 is a circuit to which the same semiconductor switch as that shown in FIG. 7 is applied, and the same parts as those in FIG.

Drain D1- of MOSFET element MF1
The load L is connected in series with the current path between the source S1 of the MOSFET element MF1 and the source S2-source of the MOSFET element MF2 and the drain D2 of the MOSFET element MF2. The AC signal A is connected to the series circuit of the load L and the current path between the drain D1-source S1-source S2-drain D2.
C is applied, and this AC signal AC serves as a power source for the load L. A control switch S is provided between both ends of the resistor R1.
W and bias power supply E are connected in series.

In such a structure, the control switch S
By turning on W, the output of the bias power supply E
Supply a forward bias to MOSFETs MF1 and MF2,
The MOSFETs MF1 and MF2 are turned on at the same time. As a result, the load L is supplied with the AC signal AC as a power source. Further, when the control switch SW is turned off, the output of the bias power supply E changes to the MOSFETs MF1 and MF2.
To be reverse biased,
The SFETs MF1 and MF2 are turned off at the same time. Therefore, the power supply to the load L is cut off.

The semiconductor switch of the above embodiment is suitable for relatively high voltage and large current switching, especially for alternating current switching, but as shown in FIG. 3, it is also suitable for direct current switching. is there. It can also be applied to switching of relatively low voltage and small current. Further, the present invention is not limited to the above embodiment, and various modifications and applications are possible.

For example, a photodiode or phototransistor can be used as the semiconductor switch element. When the phototransistor is used, for example, the emitters of the first phototransistor and the second phototransistor are connected to each other, and the reference voltage is applied thereto. Further, a voltage to be switched is applied between the collector of the first phototransistor and the collector of the second phototransistor. Bias control unit BA
For example, according to an on / off instruction from the outside, when it is on, the light receiving surface of the optical bipolar transistor is irradiated with light, and when it is off, the light irradiation surface of the optical bipolar transistor is stopped. . In this case, the semiconductor switch element and the bias controller BA are optically connected.

It is also possible to use a Hall element as the semiconductor switching element. In this case, for example,
The current path of the first Hall element and the current path of the second Hall element are connected in series. Then, a constant voltage is applied between the voltage terminals of each Hall element. Bias control unit BA
Applies a magnetic field (magnetic flux) in the direction perpendicular to the current path and the voltage application direction when turned on, and turns off the magnetic field (magnetic flux) when turned off. In this case, the semiconductor switch element and the bias controller BA are connected by the magnetic field (magnetic flux).

[0104]

As described above, according to the present invention, a semiconductor that directly responds to electrical control, can operate at high speed, suppresses a voltage drop and power loss when turned on, and has a high breakdown voltage when turned off. A switch can be provided.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram schematically showing a configuration of a semiconductor switch according to a first embodiment of the present invention.

FIG. 2 is a switching characteristic waveform diagram for explaining the operation of the semiconductor switch of FIG.

FIG. 3 is a block diagram showing a configuration of an experimental circuit in which the switching characteristic waveform of FIG. 2 is measured.

4 is a diagram showing an example of a device structure of a transistor suitable for forming the semiconductor switch of FIG.

5 is a diagram showing an example of a device structure of the semiconductor switch of FIG.

FIG. 6 is a diagram illustrating an improved example of a bias control unit.

FIG. 7 is a circuit configuration diagram schematically showing a configuration of a semiconductor switch according to a second embodiment of the present invention.

8 is a diagram showing an element structure of an element forming the semiconductor switch shown in FIG.

FIG. 9 is a circuit configuration diagram schematically showing a configuration of a semiconductor switch according to a third embodiment of the present invention.

FIG. 10 is a circuit configuration diagram schematically showing a configuration of a semiconductor switch according to a fourth embodiment of the present invention.

FIG. 11 is a diagram showing a basic configuration of SIT.

FIG. 12 is a circuit configuration diagram schematically showing a configuration of a power supply control circuit using a semiconductor switch according to a fifth embodiment of the present invention.

[Explanation of symbols]

TR1, TR2 Transistors R1-R4, RB1, RB2 Resistors B1, B2 Bases E1, E2 Emitters C1, C2 Collectors BT1, BT2 Bias terminals BA Bias control units MF1, MF2 Metal oxide semiconductor field effect transistors (MOSFETs) G, G1 , G2, G11, G21 Gates S1, S2 Sources D1, D2 Drains JF, JF1, JF2 Junction field effect transistors (JFET) SD1, SD2, SD11, SD12, SD21, SD
22 Source / Drain D1, D2 Diode L Load SW Control switch E Power supply

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H03K 17/68

Claims (3)

(57) [Claims] 1. A first source / drain at both ends of a current path.
An in terminal and a second source / drain terminal, and
Has a gate terminal that serves as a control terminal that controls the opening and closing of the flow path.
Open and close the current path according to the applied control bias.
A junction type FET to be controlled, the first source / drain terminal and the second saw
Any one of the drain / terminal terminals and the gate terminal
And a control circuit providing said control bias between said control circuit, different from the said gate terminal and said gate terminal
By applying a bias voltage between the
Alternating current flowing through the current path to generate the control bias
A semiconductor switch characterized by performing open / close control of current.
Ji. 2. A common terminal to which the bias voltage is applied
Is dependent on the applied voltage applied across the current path.
The non-existent substantially constant value according to claim 1.
Semiconductor switch. 3. The control circuit has one end connected to the first source / drain terminal, and the other end.
A first resistor having an end connected to the common terminal and a cathode connected to the first source / drain terminal.
A first diode having an anode connected to the common terminal.
And one end of which is connected to the second source / drain terminal,
A second resistor having an end connected to the common terminal and a cathode connected to the second source / drain terminal.
And a second diode whose anode is connected to the common terminal.
Half according to claim 1 or 2, comprising: the over-de, the
Conductor switch.