JP3520697B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a self-aligned contact MOS FET using a sidewall of a silicon nitride (Si ₃ N ₄ ) film.
Regarding

[0002]

2. Description of the Related Art A conventional self-aligned contact MOS FET using a sidewall of a silicon nitride film is shown in FIG.
Will be explained.

FIGS. 10A to 10C, 11D and 11E are explanatory views of a conventional example. In Fig. 10 (A), silicon (Si)
A silicon nitride film 2 is formed on the conductive film 1 formed on the substrate.
Deposit.

In FIG. 10B, the conductive film 1 and the silicon nitride film 2 are patterned to form wiring, and the silicon nitride film 3 is deposited thereon. In FIG. 10C, the silicon nitride film 3 is anisotropically etched to form sidewalls 4 made of silicon nitride.

In FIG. 11D, an interlayer insulating film is formed on the substrate.
5 is deposited, and a contact hole connecting to the substrate is formed in this film. The contact hole is formed by self-alignment with the wiring due to the difference in etching rate between silicon nitride and silicon dioxide.

In the above process, after patterning the wiring, a thin silicon dioxide film may be laid under the sidewall-forming silicon nitride film for the reason that the hard silicon nitride film is not desired to be in direct contact with the conductive film. desirable.

In particular, in the case of wiring formed on an oxide film such as a gate electrode obtained by thermally oxidizing a substrate, a silicon dioxide film is laid under a silicon nitride film for forming a sidewall and a strong stress of the silicon nitride film is exerted. It is necessary to mitigate the damage and damage to the substrate due to etching during sidewall formation.

[0008]

However, in the above process, in the self-aligned contact using the silicon nitride film as the etching stopper film, if the selection ratio of the silicon nitride film and the silicon dioxide film is not sufficiently large, the conductive film 1 is not formed. The silicon nitride film is largely etched at the shoulder portion, which causes a short circuit (see FIG. 11D).

Further, in the above process, if the silicon dioxide film 6 is formed before the formation of the side wall, the silicon dioxide film between the side wall and the silicon nitride film on the wiring is formed at the time of etching for forming the contact hole. The film 6 is etched, and the lower wiring film 1 and the upper wiring film 7 are short-circuited (see FIG. 11 (E)).

According to the present invention, in a wiring having a laminated structure of a conductive film, a silicon dioxide film, a silicon nitride film and a sidewall made of silicon nitride, a wiring between upper and lower wirings is formed when a contact hole is formed by self-aligning with the wiring. The purpose is to prevent short circuits.

[0011]

Means for Solving the Problems To solve the above problems, 1) a wiring in which a conductive film, a first silicon dioxide film and a first silicon nitride film are sequentially stacked on a semiconductor substrate, and a side surface of the wiring. A semiconductor device having a side wall formed of a second silicon nitride film formed on the semiconductor substrate, and an end face of the first silicon dioxide film existing inside the first silicon nitride film, or 2) on a semiconductor substrate A wiring having a conductive film, a first silicon nitride film and a second silicon dioxide film laminated in this order, and a sidewall made of a second silicon nitride film formed on a side surface of the wiring. A semiconductor device in which an end face of the second silicon dioxide film exists inside the first silicon nitride film, or 3) a wiring in which a conductive film and a first silicon nitride film are sequentially stacked on a semiconductor substrate, and Formed on the side of the wiring The second
A side wall of the first silicon nitride film, and a side surface of the first silicon nitride film has a portion oblique to the surface of the semiconductor substrate, or 4) the conductive film and the first conductive film on the semiconductor substrate. And a second wiring formed on the side surface of the wiring.
A semiconductor device in which the uppermost part of the conductive film exists inside the side surface of the first silicon nitride film, or 5) a sidewall made of a silicon nitride film. A wiring in which a film and a first silicon nitride film are sequentially laminated, and a sidewall formed of a second silicon nitride film formed on a side surface of the wiring, and an upper layer film of the conductive film is the first layer. A semiconductor device existing inside a side surface of a silicon nitride film, or 6) a semiconductor device according to claim 2, 3, 4, or 5, wherein a silicon dioxide film is provided between the conductive film and the first silicon nitride film, or 7) A step of sequentially depositing a conductive film, a silicon dioxide film, and a silicon nitride film on a semiconductor substrate, and patterning these films to form wiring, in which only the silicon dioxide film is laterally etched. Or 8) A conductive film, a silicon nitride film, and a silicon dioxide film are sequentially deposited on a semiconductor substrate, and when these films are patterned to form wiring, only the silicon dioxide film is laterally aligned. Or a method of manufacturing a semiconductor device including a step of performing etching of 9), or 9) depositing a silicon nitride film of a conductive film and a silicon dioxide film on a semiconductor substrate and patterning these films to form wiring. A method for manufacturing a semiconductor device including a step of etching so that a side surface of a silicon nitride film is oblique to a surface of the semiconductor substrate, or 10) a conductive film, a silicon dioxide film, and a silicon nitride film are sequentially deposited on the semiconductor substrate. Then, when patterning these films to form wiring, the silicon nitride film is first subjected to isotropic etching, and then anisotropic etching is performed. Or 11) a conductive film, a silicon dioxide film, and a silicon nitride film are sequentially deposited on a semiconductor substrate, and when these films are patterned to form wiring, the uppermost conductive film is formed. A method for manufacturing a semiconductor device, in which etching is performed so that the upper part exists inside the silicon nitride film, or 12) a conductive film having a multilayer structure, a silicon dioxide film, and a silicon nitride film are sequentially deposited on a semiconductor substrate, This is achieved by a method of manufacturing a semiconductor device, in which, when the film is patterned to form wiring, etching is performed so that the upper conductive film of the conductive film exists inside the silicon nitride film.

The present invention is a conductive film, (silicon dioxide film),
In the wiring structure of the laminated silicon nitride film, the film thickness of the silicon nitride film on the shoulder portion of the conductive film can be effectively adjusted by making the cross-sectional shape of the silicon dioxide film or the uppermost part of the conductive film have a concave side surface. It is thick to prevent short circuit between the upper and lower wiring.

Alternatively, the wiring (here, the insulating film such as a silicon dioxide film and a silicon nitride film formed on it) is formed into a sidewall that is made of silicon nitride by making the cross-sectional shape not a simple rectangle. Even if the silicon dioxide film between the wiring and the silicon nitride film is etched, the upper and lower wirings are not short-circuited.

[0014]

1 (A) and 1 (B) are explanatory views of an embodiment (1) of the present invention. In FIG. 1 (A), a silicon dioxide film 8 and a first silicon nitride film 2 are deposited on a conductive film 1 formed on a substrate, and when wiring is patterned,
Using the resist film 9 as a mask, the first silicon nitride film 2 is etched, and then the silicon dioxide film 8 is isotropically etched.

Subsequently, the conductive film 1 is anisotropically etched, and then the thermal oxide film 6 is formed on the side surface of the conductive film 1.
In FIG. 1B, a second silicon nitride film is deposited on the substrate and etched back to form sidewalls 4.

Then, an interlayer insulating film 5 is deposited and contact holes are formed in a self-aligned manner with respect to the wiring. This formation is performed by etching using the selection ratio of silicon nitride and silicon dioxide.

At this time, the shoulder portion of the conductive film of the wiring has a structure resistant to a short circuit because the silicon nitride film is effectively thick. Here, the silicon dioxide film 8 is to prevent the hard silicon nitride film from coming into contact with the conductive film 1 in a large area.

Next, various methods for the isotropic etching of the silicon dioxide film 8 will be described. (a) Isotropic etching of the silicon dioxide film 8 is performed by anisotropic etching of the silicon nitride film 2 and then wet etching with a hydrofluoric acid solution.

(B) Isotropic etching of the silicon dioxide film 8 is performed by anisotropic etching of the oxide film after anisotropic etching of the silicon nitride film 2. (c) Isotropic etching of the silicon dioxide film 8 is performed, and anisotropic etching of the silicon nitride film 2 is performed.
8 is anisotropically etched and then isotropically dry-etched on the oxide film.

(D) Isotropic etching of the silicon dioxide film 8 is performed by anisotropic etching of the silicon nitride film 2, then anisotropic etching of the silicon dioxide film 8, and then wet etching with a hydrofluoric acid solution.

The anisotropic etching of the silicon dioxide film is
The etching was performed with a parallel plate type etching apparatus using a mixed gas of CF ₄ , CHF ₃ and Ar. The isotropic dry etching of the silicon dioxide film was performed using a down-flow etching system using a mixed gas of CF ₄ and O ₂ .

2A and 2B are explanatory views of the embodiment (2) of the present invention. FIG. 2A shows the same process as FIG.
In FIG. 2 (B), a silicon dioxide film 6 is deposited by a vapor deposition (CVD) method instead of the thermal oxide film after the etching of the wiring described in FIG. 1 (A) of the embodiment (1). .

Also in this case, when opening the contact,
Even if the silicon dioxide film 6 between the silicon nitride film 2 on the wiring and the sidewall 4 is etched, the lower wiring 1
There is no short circuit between the upper wiring and the upper wiring.

FIGS. 3A and 3B are explanatory views of the embodiment (3) of the present invention. In FIG. 3 (A), the first layer is formed on the conductive film 1.
When the silicon nitride film 2 and the second silicon dioxide film 10 are deposited and the resist film 9 is used to pattern the wiring,
The portion of the first silicon dioxide film 10 is laterally etched, and then the conductive film 1 is etched.

In FIG. 3B, a second silicon dioxide film 6 is deposited on the substrate, a second silicon nitride film is deposited thereon, and a sidewall 4 is formed by anisotropic etching.

Next, an interlayer insulating film 5 is deposited, and etching is performed in a self-aligned manner with respect to the wiring by using an etching selection ratio of silicon nitride and silicon dioxide, a contact hole is opened, and an upper wiring 7 is formed. .

When the contact hole is opened, even if the silicon dioxide film 6 on the wiring is etched, the short circuit between the lower wiring 1 and the upper wiring 7 can be prevented because of the structure shown in the drawing.

FIGS. 4A and 4B are explanatory views of the embodiment (4) of the present invention. In FIG. 4 (A), the first film is formed on the conductive film 1.
When the silicon dioxide film 8 and the first silicon nitride film 2 are deposited and the resist film 9 is used to pattern the wiring, the first silicon nitride film 2 has a trapezoidal cross section as shown in the figure. So that it is etched. Subsequently, the first silicon dioxide film 8 and the conductive film 1 are etched to form wiring.

In FIG. 4 (B), a second silicon dioxide film 6 is deposited on the substrate, a second silicon nitride film is deposited thereon, and a sidewall 4 is formed by anisotropic etching.

Then, an interlayer insulating film 5 is deposited, and etching is performed in a self-aligned manner with respect to the wiring by using an etching selection ratio of silicon nitride and silicon dioxide, a contact hole is opened, and an upper wiring 7 is formed. .

When opening the contact hole, even if the silicon dioxide film 6 on the wiring is etched, the cross-sectional shape of the first silicon nitride film 2 on the wiring is trapezoidal.
It is possible to prevent a short circuit between the lower wiring 1 and the upper wiring 7.

The above-mentioned first silicon dioxide film 8 is
Used as an etching stopper during the etching of the silicon nitride film. 5 (A) and 5 (B) show an embodiment of the present invention.
It is explanatory drawing of (5).

In FIG. 5 (A), the first silicon nitride film 2 is deposited on the conductive film 1 and isotropic etching and anisotropic etching are performed when patterning the wiring using the resist film 9. Then, the first silicon nitride film 2 is etched so that the cross-sectional shape thereof has a shape in which the upper portion is cut as illustrated. Subsequently, the conductive film 1 is etched to form wiring.

In FIG. 5B, a second silicon dioxide film 6 is deposited on the substrate, a second silicon nitride film is deposited on the second silicon dioxide film 6, and the sidewalls 4 are formed by anisotropic etching.

Next, an interlayer insulating film 5 is deposited, and etching is performed in a self-aligning manner with respect to the wiring by using the etching selection ratio of silicon nitride and silicon dioxide, a contact hole is opened, and an upper wiring 7 is formed. .

When opening the contact hole, even if the silicon dioxide film 6 on the wiring is etched, since the cross-sectional shape of the first silicon nitride film 2 on the wiring has the illustrated structure, the lower wiring 1 and the upper wiring 1 A short circuit between 7 can be prevented.

FIGS. 6A and 6B are explanatory views of the embodiment (6) of the present invention. In FIG. 6 (A), the first film is formed on the conductive film 1.
When the silicon dioxide film 8 and the first silicon nitride film 2 are deposited, and the resist film 9 is used to pattern the wiring, the first silicon nitride film 2 has an inverse tapered cross section as shown in the figure. Etch into a trapezoid. Subsequently, the first silicon dioxide film 8 and the conductive film 1 are etched to form wiring.

In FIG. 6B, a second silicon dioxide film 6 is deposited on the substrate, a second silicon nitride film is deposited on the second silicon dioxide film 6, and sidewalls 4 are formed by anisotropic etching.

Next, an inter-layer insulating film 5 is deposited, and etching is performed in a self-aligning manner with respect to the wiring by utilizing the etching selection ratio of silicon nitride and silicon dioxide, a contact hole is opened, and an upper wiring 7 is formed. .

When opening the contact hole, even if the silicon dioxide film 6 on the wiring is etched, since the cross-sectional shape of the first silicon nitride film 2 on the wiring is a trapezoid with an inverse taper, the lower wiring 1 and the upper wiring 1 It is possible to prevent a short circuit between the wirings 7.

The above-mentioned first silicon dioxide film 8 is
Used as an etching stopper during the etching of the silicon nitride film. 7 (A) and 7 (B) are embodiments of the present invention.
It is explanatory drawing of (7).

In FIG. 7A, the first silicon dioxide film 8 and the first silicon nitride film 2 are deposited on the conductive film 1, and the resist film 9 is used to pattern the wiring.
As shown in the figure, the conductive layer 1 is etched so that its cross-sectional shape is a trapezoid with an inverse taper, and the uppermost part of the conductive layer 1 is inside the first silicon nitride film 2.

In FIG. 7B, a second silicon dioxide film 6 is deposited on the substrate, a second silicon nitride film is deposited thereon, and a sidewall 4 is formed by anisotropic etching.

Then, an interlayer insulating film 5 is deposited, and etching is performed in a self-aligned manner with respect to the wiring by utilizing the etching selection ratio of silicon nitride and silicon dioxide, a contact hole is opened, and an upper wiring 7 is formed. .

When opening the contact hole, even if the silicon dioxide film 6 on the wiring is etched, the conductive film 1
Since the uppermost part of the structure is inside the first silicon nitride film 2, a short circuit between the conductive film (lower wiring) 1 and the upper wiring 7 can be prevented.

Next, a modification of this embodiment will be described. (a) Instead of depositing the second silicon dioxide film 6 after patterning the above wiring, a thermal oxide film may be formed.
In this case, there is almost no silicon dioxide film between the first silicon nitride film 2 and the sidewall 4 on the wiring,
Moreover, since the uppermost part of the conductive film 1 is inside the first silicon nitride film, the silicon nitride film on the shoulder part of the conductive film 1 is effectively thickened, and the lower wiring 1 and the upper wiring 1 are formed. Short circuit between wires 7 can be prevented (see Fig. 7 (c)).

(B) The conductive film 1 may be polysilicon or a compound of metal and silicon, and the first silicon dioxide film 8 may be formed by oxidation of the conductive film. The above embodiment
Although the conductive layer has a single layer structure in (1) to (7), it may have a structure of two or more layers such as a polysilicon film / metal silicide film.

FIGS. 8A and 8B are explanatory views of the embodiment (8) of the present invention. In FIG. 8 (A), the first film is formed on the conductive film 1.
When the silicon dioxide film 8 and the first silicon nitride film 2 are deposited, and the resist film 9 is used to pattern the wiring, the conductive layer 1 is formed into a two-layer structure 1A, 1B as shown in the figure, and the conductive film on the upper side is formed. Etching is performed so that 1B has a structure that is inside the first silicon nitride film 2.

In FIG. 8B, a third silicon dioxide film 6 is deposited on the substrate, a second silicon nitride film is deposited thereon, and a sidewall 4 is formed by anisotropic etching.

Next, an interlayer insulating film 5 is deposited, and etching is performed in a self-aligned manner with respect to the wiring by using an etching selection ratio of silicon nitride and silicon dioxide, a contact hole is opened, and an upper wiring 7 is formed. .

When opening the contact hole, even if the silicon dioxide film 6 on the wiring is etched, the conductive layer 1
Since the uppermost part of the structure is inside the first silicon nitride film 2, a short circuit between the lower wiring 1 and the upper wiring 7 can be prevented.

Here, an example of the conductive film 1A / 1B having a two-layer structure will be given. Polysilicon / tungsten silicide, polysilicon / titanium silicide, polysilicon / tungsten, polysilicon / cobalt silicide, polysilicon / molybdenum silicide, etc. At this time, the upper conductive film 1B has a higher etching rate than the lower conductive film 1A. For large etching, for example, for polysilicon / tungsten silicide, a mixed gas of Cl ₂ and O ₂ is used as an etching gas.

Next, a modification of this embodiment will be shown. (a) Instead of depositing the second silicon dioxide film 6 after patterning the above wiring, a thermal oxide film may be formed.
In this case, there is almost no silicon dioxide film between the first silicon nitride film 2 and the sidewall 4 on the wiring,
Also, since the uppermost part of the conductive film 1 is inside the first silicon nitride film 2, the silicon nitride film on the shoulder part of the conductive film 1 is effectively thickened to form the lower wiring 1. It is possible to prevent a short circuit between the upper wirings 7 (see Fig. 8 (c)).

(B) The conductive film 1 may be polysilicon or a compound of metal and silicon, and the first silicon dioxide film 8 may be formed by oxidation of the conductive film. 9 (A) to 9 (C) are explanatory views of the embodiment (9) of the present invention.

This drawing shows the first embodiment in the embodiment (8).
This is an example in which the silicon dioxide film 8 is omitted. Embodiment
In (1) (2) (7) (8), the third silicon dioxide film 6
Even if is omitted, since the uppermost part of the conductive film is inside the first silicon nitride film 2, a short circuit can be prevented.

[0056]

According to the present invention, in a wiring having a laminated structure of a conductive film, a silicon dioxide film, a silicon nitride film and a sidewall made of silicon nitride, a contact hole is formed by self-aligning with the wiring. It is possible to prevent a short circuit between the upper and lower wirings.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of an embodiment (1) of the present invention.

FIG. 2 is an explanatory diagram of the embodiment (2) of the present invention.

FIG. 3 is an explanatory diagram of an embodiment (3) of the present invention.

FIG. 4 is an explanatory diagram of an embodiment (4) of the present invention.

FIG. 5 is an explanatory diagram of an embodiment (5) of the present invention.

FIG. 6 is an explanatory diagram of an embodiment (6) of the present invention.

FIG. 7 is an explanatory diagram of the embodiment (7) of the present invention.

FIG. 8 is an explanatory diagram of an embodiment (8) of the present invention.

FIG. 9 is an explanatory diagram of an embodiment (9) of the present invention.

FIG. 10 is an explanatory diagram of a conventional example (1)

FIG. 11 is an explanatory diagram of a conventional example (2)

[Explanation of symbols]

1 conductive film 2 first silicon nitride (Si ₃ N ₄ ) film 3 second silicon nitride film 4 sidewall 5 interlayer insulating film 6 third silicon dioxide (SiO ₂ ) film 7 upper wiring 8 first silicon dioxide Film 9 Resist film 10 Second silicon dioxide film

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/768 H01L 21/28 H01L 21/283 H01L 29/78

Claims (2)

(57) [Claims] 1. A wiring formed on a semiconductor substrate.
Te, possess and said wiring at least a first silicon nitride film is stacked, the side wall comprising a second silicon nitride film formed on the side surface of the wiring on the conductive film, the first silicon nitride The side surface of the film is oblique to the surface of the semiconductor substrate.
Wherein a Rukoto to have a portion. Wherein also deposited nitrided silicon film and least with the conductive film on a semiconductor substrate, form a wiring by patterning both
Is formed by isotropic etching and anisotropic etching.
A semiconductor that is characterized by changing the area of the con film in the film thickness direction.
Body device manufacturing method.