JP3509166B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an electrode on a semiconductor substrate and a semiconductor device manufactured by the method, and more particularly to improving the etching reproducibility of the semiconductor substrate to form an electrode. And the semiconductor substrate thereof. And the usage is, for example, F
It is used in the process of forming electrodes such as ET (field effect transistor) and HEMT (high electron mobility field effect transistor).

[0002]

2. Description of the Related Art MMIC (monolithic microwave
In order to improve high frequency performance such as noise figure and gain of IC), it is necessary to improve reproducibility of device characteristics such as MESFET and HEMT forming MMIC and obtain a good impedance matching state. Furthermore, a MESFET having a recess gate structure effective for improving high frequency characteristics.
In devices such as HEMTs and HEMTs, it is known that the reproducibility of the etching depth and shape of the recess etching before forming the Schottky electrode affects the reproducibility of the device characteristics.

Regarding a method of manufacturing a recess gate electrode which improves the reproducibility of etching depth and shape, a T-shaped gate structure and a special feature disclosed in Japanese Patent Laid-Open No. 4-186640, which uses a thin film of silicon oxide or silicon nitride. Kaihei 4-186
There is a two-stage recess structure disclosed in Japanese Patent No. 641.

[0004]

However, according to the manufacturing method of the above publication, the recess etching depth still varies in the manufacturing process of MESFET, HEMT, and MMIC. Since the manufacturing method of the above-mentioned publication includes a mesa etching step and an ohmic electrode step of source / drain etc. before the recess etching step, the manufacturing method of the above-mentioned publication, therefore, a pre-step of the step of forming the recess on the surface of the semiconductor substrate to be subjected to the recess etching. It was clarified that photoresist remains, chemical etching of chemicals, gas, etc., and alteration of the substrate surface due to heating, etc., resulting in variations in the depth of recess etching. .

[0005] The present invention has light of the above causality, its purpose or remained photoresist of the previous step on the surface of a semiconductor substrate subjected to re Seth etching, etching, the semiconductor substrate surface alteration by heating or the like it is possible to get a manufacturing method of a semiconductor device which does not.

[0006]

[0007]

[0008]

The method for manufacturing a semiconductor device of the present invention , which is configured to achieve the above object, includes an insulating film deposition step of depositing an insulating film on a semiconductor substrate, and an insulating film deposition step. A first resist forming step of forming a first resist having a first opening on a predetermined portion, and a first etching step of chemically removing a part of the insulating film from the first opening, A mesa etching step of performing mesa etching on the semiconductor substrate from the first opening, and a second resist forming step of forming a second resist having a second opening on a portion where the first electrode is formed on the semiconductor substrate. A second etching step of chemically etching away a part of the insulating film from the second opening;
A first electrode material deposition step of depositing an electrode material, and removing the material of the first electrode deposited on the second resist by dissolving the second resist, and then removing the semiconductor substrate. A first electrode forming step of forming the first electrode by heat treatment, and forming a third resist having a third opening on a portion of the semiconductor substrate where recess etching is desired, and forming the insulating film from the third opening. By etching away a part of the semiconductor substrate, recess-etching the semiconductor substrate from the third opening, and depositing the material of the second electrode from the upper portion of the semiconductor substrate; and dissolving the third resist. The second layer deposited on the third resist
And a second electrode forming step of removing the electrode material.

The semiconductor device manufacturing method of the present invention is
An insulating film deposition process for depositing an insulating film on a semiconductor substrate, its
First resist having a first opening at a predetermined portion on the insulating film of
Forming a first resist, and the first opening
To chemically remove a part of the insulating film from
1 etching step, and the semiconductor substrate from the first opening
A mesa etching step for mesa etching to the plate, the
A second opening is formed on the semiconductor substrate at the portion where the first electrode is formed.
A second resist forming step of forming a second resist,
Chemically etch a portion of the insulating film from the second opening
A second etching step of ring removed, the semiconductor substrate
A first electrode material deposition step of depositing a material of the first electrode, prior to
The second resist is formed by dissolving the second resist.
Removing the material of the first electrode deposited on it, and then
First, a semiconductor substrate is heat-treated to form the first electrode.
An electrode formation process and a recess etching on the semiconductor substrate.
Form a third resist with a third opening in the desired area
And etch a part of the insulating film through the third opening.
Then, the semiconductor substrate is recessed through the third opening.
And etching, after the said third resist is removed, the fourth resist is formed with a fourth opening narrower than the third opening in the semiconductor substrate, the semiconductor substrate than the fourth opening further Risesuetchin grayed, the semiconductor substrate
Recess etching step of depositing the material of the second electrode from the bottom part
And a second removing the material of the second electrode deposited on the fourth resist by dissolving the fourth resist .
An electrode forming step may be provided .

[0010]

[0011]

[0012]

[0013]

SUMMARY OF] According to the invention configured according to claim 1, wherein, as described above, and first resist having a first opening for mesa etching, the second opening in the formation portion of the first electrode The second resist is not directly formed on the semiconductor substrate, but is formed on the semiconductor substrate via the insulating film. Then, the insulating film is removed by etching before the recess etching. As a result, variations in recess etching caused by the fact that the first and second resists remain on the semiconductor substrate, heat of heat treatment, and alteration of the surface of the semiconductor substrate when the first and second resists are chemically removed by etching. That is, it is possible to prevent variations in the depth of the semiconductor substrate to be recess-etched and the shape of the recess-etched portion.

[0014]

[0015]

According to the invention of claim 1, wherein, according to the present invention, first, and the second resist remains on the semiconductor substrate, the heat or thermal treatment, first, when the chemically etched removing the second resist It is possible to prevent the deterioration of the surface of the semiconductor substrate that occurs during the process.

[0016]

[0017]

EXAMPLES Reference Example A reference example will be described below with reference to the drawings. 1 (a)-
(L) is a sectional view showing a method for manufacturing a recess gate structure according to the present reference example.

First, GaAs (gallium arsenide) or
Semiconductor substrate 10 such as InP (Indium Phosphorus)1 above
In addition, silicon oxide (SiO₂ ) Or silicon nitride (SiNx)
Alternatively, an insulating film 10 such as silicon oxynitride (SiON)2, C
It is deposited by a method such as VD, vacuum deposition, sputtering (Fig.
1 (a), FIG. 1 (b)).

Then, a resist pattern 10 4 having an opening 10 3 is formed on a predetermined portion of the semiconductor substrate 101 to be removed by etching (FIG. 1C). How such RIE etching using wet etching or CF ₄ gas or the like by subsequent dilute hydrofluoric acid, buffered hydrofluoric acid or the like
More, insulated from the photoresist opening 103 parts film 10
A part of 2 is removed by etching (FIG. 1D).

Then, an electrode material 110 such as AuGe / Ni / Au to be an ohmic electrode is deposited on the semiconductor substrate 101 by vacuum evaporation such as electron beam evaporation (FIG. 1 (e)). Here, the electrode material 110 applied to the exposed resist opening of the semiconductor substrate 101 becomes the ohmic electrodes 111 and 112.

Thereafter, the electrode material 110 on the resist 104 is formed.
Is dissolved and removed (metal lift-off method) by dissolving the resist 104 with an organic solvent such as acetone or a resist peeling material. Then, heat treatment is applied to the semiconductor substrate, whereby ohmic contact between the electrodes 111 and 112 and the semiconductor substrate 101 can be obtained (FIG. 1F). Further, a resist pattern 115 is deposited on the semiconductor substrate 101 (FIG. 1G), and then an opening 113 is formed by etching or the like (FIG. 1H).

Then, a part of the insulating film 102 is removed by etching from the opening 113 by a method such as wet etching using dilute hydrofluoric acid or buffer hydrofluoric acid or RIE etching using CF ₄ gas or the like (FIG. 1 (i)). )). Further, Ga on the surface of the semiconductor substrate 101 is exposed through the opening 113.
Semiconductor materials such as As, InGaAs and InAlAs are citric acid + hydrogen peroxide solution + water, or sesquiacid + hydrogen peroxide solution + water, sulfuric acid + hydrogen peroxide solution + water, phosphoric acid + hydrogen peroxide solution + water, Wet etching with an etching solution such as bromine or RIE using chlorine gas
Performing etching grayed by methods such as etching (FIG. 1
(J)).

Due to its structure, Ti, Al, Au or T
i / Al, the Schottky electrode material 11 6, such as Ti / Pt / Au, to form a Schottky electrode 11 4 was coated by vacuum deposition such as electron beam evaporation (Fig. 1
(K)). Finally, the electrode material 116 on the resist pattern 115 is removed by dissolving the resist pattern 115 with an organic solvent such as acetone or a resist peeling agent (FIG. 1 (l)).

According to this reference example , the ohmic electrode 11
A photoresist for forming 1 and 112 by metal lift-off is not directly formed on the semiconductor substrate 101, but is formed via the insulating film 102. By removing the insulating film 102 before the recess etching, it is possible to prevent the resist from remaining on the semiconductor substrate 101, heat of heat treatment, and alteration of the surface of the semiconductor substrate when the resist is chemically removed. it can. Further, it is possible to prevent variations in recess etching depth and shape due to resist residues. Further, in addition to the influence of the resist residue, the heat treatment for obtaining ohmic contact between the ohmic electrodes 111 and 112, the alteration of the surface of the substrate 101 caused by the chemical solution or gas exposed in the resist stripping step, and the influence thereof It is also possible to prevent variations in recess etching depth and shape due to.

If the ohmic electrodes 111 and 112 are used as the source / drain and the Schottky electrode 114 is used as the gate electrode in the structure of FIG. 1 (l), it can be applied as an FET such as MESFET or HEMT. If the ohmic electrodes 111 and 112 are connected and used as a cathode electrode and the Schottky electrode 114 is used as a cathode electrode, it can be used as a Schottky barrier diode.

[0026] The first embodiment of the present invention (the first embodiment) will be described based on the drawings.
2A to 2F are sectional views showing a method of manufacturing a recess gate structure according to this embodiment. The same numbers are given to the parts corresponding to the same parts as in FIG.

First, on a semiconductor substrate 101 (corresponding to a semiconductor substrate) such as GaAs (gallium arsenide) or InP (indium phosphorus), silicon oxide (SiO ₂ ) or silicon nitride (SiNx) or silicon oxynitride (SiON). ) Etc., an insulating film 102 (corresponding to an insulating film) is formed by CVD, vacuum deposition,
It is deposited by a method such as sputtering. Then, on this, the opening 1 is formed in the portion where the semiconductor substrate 101 is to be removed by etching.
Resist pattern 1 having 03 (corresponding to the first opening)
04 (corresponding to the first resist) is formed to obtain the structure of FIG.

After that, wet etching with dilute hydrofluoric acid, buffer hydrofluoric acid or the like or RIE using CF ₄ gas or the like is performed.
A part of the insulating film 102 is removed by etching from the photoresist opening 103 by a method such as etching (corresponding to chemical etching), and further citric acid + hydrogen peroxide water + water or sesquiacid + hydrogen peroxide water. + Water, sulfuric acid + hydrogen peroxide solution + water, phosphoric acid + hydrogen peroxide solution + water, wet etching with an etching solution such as brommethanol, or RIE etching using chlorine gas, etc. Do mesa etching,
Mesa etching grooves 105 and 106 are obtained. This allows
The structure of FIG. 2 (b) is obtained.

A resist pattern 109 (corresponding to the second resist) having openings 107 and 108 (corresponding to the second opening) is formed thereon, and from the openings 107 and 108,
The insulating film 10 is formed by a method such as wet etching with dilute hydrofluoric acid or RIE etching using CF ₄ gas or the like.
AuGe / N which becomes an ohmic electrode by removing a part of 2
Electrode material 110 such as i / Au (corresponding to the material of the first electrode)
2 is deposited by vacuum evaporation such as electron beam evaporation,
The structure of (c) is obtained. Here, the electrode material 110 deposited on the resist openings 107 and 108 where the semiconductor substrate 101 is exposed becomes the ohmic electrodes 111 and 112 (corresponding to the first electrodes).

After that, the electrode material 110 on the resist 109 is formed.
The resist 109 is dissolved and removed by dissolving the resist 109 with an organic solvent such as acetone or a resist peeling material (metal lift-off method) to obtain the structure of FIG. Then, by applying heat treatment to the structure of FIG. 2D, ohmic contact between the electrodes 111 and 112 and the semiconductor substrate 101 can be obtained.

Further, the opening 113 (corresponding to the third opening)
Resist pattern 115 (corresponding to the third resist)
And a part of the insulating film 102 is removed by etching through a method such as wet etching with dilute hydrofluoric acid or buffer hydrofluoric acid or RIE etching with CF ₄ gas or the like through the opening 113. GaAs, InGaAs, InA on the surface of the semiconductor substrate 101
lAs and other semiconductor materials are citric acid + hydrogen peroxide solution + water,
Alternatively, wet etching with an etching solution such as sesquiacid + hydrogen peroxide water + water, sulfuric acid + hydrogen peroxide water + water, phosphoric acid + hydrogen peroxide water + water, or brom methanol, or RIE etching using chlorine gas, etc. Etching is performed by the method described above, and a Schottky electrode material 116 (corresponding to the material of the second electrode) such as Ti, Al, Au or Ti / Al, Ti / Pt / Au is vacuum-deposited by electron beam evaporation or the like. A Schottky electrode 114 (corresponding to the second electrode) is formed by deposition by a method such as vapor deposition to obtain the structure of FIG.

After that, the electrode material on the resist is removed by dissolving the resist with an organic solvent such as acetone or a resist stripping agent to obtain the structure of FIG. 2 (f). According to the first embodiment , the resist 10 serving as a mask for mesa etching.
4, or the photoresist for forming the ohmic electrodes 111 and 112 by metal lift-off is not directly formed on the semiconductor substrate 101, but is formed via the insulating film 102. Therefore, the insulating film 10 is formed before the recess etching.
When 2 is removed, it is possible to prevent the resist from remaining on the semiconductor substrate 101, heat of heat treatment, and alteration of the surface of the semiconductor substrate when chemically removing the resist. Further, it is possible to prevent variations in recess etching depth and shape due to resist residues. In addition to the influence of the resist residue, the substrate 101 is generated due to the heat treatment for obtaining the ohmic contact between the ohmic electrodes 111 and 112, the chemical solution or the gas exposed in the resist stripping step, and the like.
It is also possible to prevent surface deterioration and variations in recess etching depth and shape due to the effect.

In the structure of FIG. 2F, if the ohmic electrodes 111 and 112 are used as the source / drain and the Schottky electrode 114 is used as the gate electrode, ME
It can be applied as an FET such as SFET and HEMT. If the ohmic electrodes 111 and 112 are connected and used as a cathode electrode and the Schottky electrode 114 is used as a cathode electrode, it can be used as a Schottky barrier diode.

Here, the semiconductor device manufactured by the manufacturing method of the first embodiment has a semiconductor substrate 1 as shown in FIG.
01, and two ohmic electrodes 111 and 112 formed on the mesa-etched grooves 105, 106 which are mesa-etched on a semiconductor substrate 101 (source over the source electrode, corresponds to the drain electrode), the ohmic electrode 111 in the semiconductor substrate
When the recess etching groove 119 formed by recess etching between 112, the recess etching Schottky formed in the groove the electrode 114 and the (Gate electrode) is formed, the ohmic electrode 111 further in the semiconductor substrate 101 And two Schottky electrodes 114, and between the ohmic electrode 112 and the Schottky electrode 114, two insulating films 117 and 118 are provided.

Generally, around the gate electrode on the surface of the semiconductor substrate, a passivation film is attached for the purpose of protecting the surface. However, when such a passivation film is applied after the gate electrode is formed, it must be formed with a very large power at the time of forming the passivation film, so that an interface level called plasma damage occurs at the interface between the passivation film and the semiconductor substrate. This interface state causes a depletion layer on the semiconductor substrate surface, reduces the channel cross-sectional area, and causes loss. However, in the semiconductor device having the structure of the first embodiment , since the insulating films 117 and 118 are formed at the same time when the semiconductor device is formed, the insulating films 117 and 118 are attached so as to be very aligned with the interface. There is. Therefore, in the first embodiment ,
By attaching the passivation film via the insulating films 117 and 118, the damage can be reduced.

[0036] The second embodiment of the present invention (second embodiment) will be described based on the drawings.
3A to 3B are sectional views showing a method of manufacturing the recess gate structure according to the present embodiment. That is, the difference between this embodiment and the first embodiment is that recess etching is performed in two steps. Since steps until it reached a 3 (a) is the same as FIG. 2 (a) ~ (d) , description thereof is omitted for overlapping process.

In this embodiment, first, a resist pattern 208 having an opening 206 is formed on the structure shown in FIG. 2D, and wet etching using dilute hydrofluoric acid, buffer hydrofluoric acid or the like is performed through the opening 206 or CF. A part of the insulating film 102 is removed by etching by a method such as RIE etching using ₄ gas or the like, and GaAs or InGaAs on the surface of the semiconductor substrate 201 is removed through the opening 206.
Semiconductor materials such as InAlAs are citric acid + hydrogen peroxide solution + water, or sesquiacid + hydrogen peroxide solution + water, sulfuric acid + hydrogen peroxide solution + water, phosphoric acid + hydrogen peroxide solution + water, bromethanol, etc. Etching is performed by a method such as wet etching using an etching solution or RIE etching using chlorine gas or the like to form the first recess etching groove 207.
Are formed to obtain the structure shown in FIG. Here, 202, 20
3 is an ohmic electrode such as AuGe / Ni / Au,
204 and 205 are insulating films of silicon oxide, silicon nitride, silicon oxynitride, or the like.

After that, the resist 208 is dissolved and removed, and FIG.
The structure of (b) is obtained. Further, a resist pattern 214 having an opening 209 is formed on the structure of FIG. 3B, and GaAs, InGaAs, InAl exposed on the semiconductor substrate surface of the first etching groove 207 from the opening 209.
For semiconductor materials such as As, citric acid + hydrogen peroxide solution + water, or sesquiacid + hydrogen peroxide solution + water, sulfuric acid + hydrogen peroxide solution + water, phosphoric acid + hydrogen peroxide solution + water, bromethanol, etc. The second recess etching groove 210 is formed by performing wet etching using an etching solution or RIE etching using chlorine gas or the like. Due to its structure, Ti, Al, Au or Ti / A
3, a Schottky electrode material such as Ti / Pt / Au is deposited by a method such as vacuum deposition such as electron beam deposition,
The structure of (c) is obtained. As a result, the Schottky electrode 211 is formed in the second recess etching groove 210.

After that, the Schottky electrode material on the resist 208 is removed by metal lift-off to obtain the structure of FIG. Thus, even if the method of FIGS. 3A to 3D is used, the resist remains on the semiconductor substrate 201,
It is possible to prevent heat of heat treatment and deterioration of the surface of the semiconductor substrate when chemically removing the resist. Further, it is possible to prevent variations in recess etching depth and shape due to resist residues. Further, in addition to the influence of the resist residue, the heat treatment for obtaining ohmic contact between the ohmic electrodes 202 and 203, the alteration of the surface of the substrate 201 caused by the chemical solution or gas exposed in the resist stripping step, and the influence thereof It is also possible to prevent variations in recess etching depth and shape due to.

2 (a) to 2 (a) in the first embodiment.
In FIG. 2F, by exposing the structure of FIG. 2D to an etching solution such as hydrofluoric acid + water, hydrofluoric acid + ammonium fluoride + water, even if the insulating film 102 is removed by etching, mesa etching and ohmic electrode are performed. It is possible to prevent recess etching variations due to resist residues and the like during formation. In this case, the structure shown in FIG. 2F does not have the insulating films 117 and 118 on both sides of the Schottky electrode.

Similarly, FIG. 2 in the second embodiment is also used.
Also in (a) to (d), the resist 20 shown in FIG.
8 is formed or at the stage of FIG. 3B, hydrofluoric acid +
Even if the insulating film is etched with water, hydrofluoric acid + ammonium fluoride + water or the like, it is possible to prevent variations in the recess etching due to the resist residue or the like during the mesa etching and the ohmic electrode formation. In this case, Fig. 3 (d)
In this structure, insulating films 212 and 2 on both sides of the Schottky electrode
The structure has no 13.

[0042]

In FIG. 4, 301 is a semiconductor substrate, and 30 is
2, 303 are ohmic electrodes, 305, 304 are insulating films, 306 is a recess etching groove, and 307 is a Schottky electrode. The structure of FIG. 4 is the structure of FIG. 2 (f) in which the cross-sectional shape of the Schottky electrode is a so-called T shape in which the upper electrode width is wider than the lower electrode width, and this structure was used as the gate of the FET. In this case, the gate resistance can be reduced and high frequency characteristics such as noise figure can be improved .

Similarly, the structure of FIG. 5 is obtained by forming the Schottky electrode into a T shape in the structure of FIG.
1 is a semiconductor substrate, 402 and 403 are ohmic electrodes, 4
Reference numerals 04 and 405 are insulating films, 406 is a first recess etching groove, 407 is a second etching groove, and 408 is a Schottky electrode. 1 (l), FIG. 2 (f), and FIG.
(D), When the structure of FIGS. 4 and 5 is used as an actual device, durability can be secured by covering the upper part of each structure with an insulating film such as silicon nitride.

[Brief description of drawings]

1A to 1L are cross-sectional views showing a method for manufacturing a semiconductor device according to a reference example of the present invention.

2A to 2F are sectional views showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

3A to 3D are sectional views showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a sectional view showing a semiconductor device according to an embodiment of the present invention.

FIG. 5 is a sectional view showing a semiconductor device according to an embodiment of the present invention.

[Explanation of symbols]

101 semiconductor substrate 102 insulating film 103 opening 104 resist pattern 105, 106 Mesa etching groove 107,108 opening 109 resist pattern 110 electrode material 111,112 Ohmic electrode 113 opening 114 Schottky electrode 115 resist pattern 116 Schottky electrode material 117,118 insulating film 119 recess etching groove 201 semiconductor substrate 202,203 Ohmic electrode 204,205,212,213 insulating film 206 opening 207 First recess etching groove 208 resist pattern 209 opening 210 Second recess etching groove 211 Schottky electrode 214 resist pattern

Continuation of the front page (56) Reference JP-A-3-283628 (JP, A) JP-A 64-7664 (JP, A) JP-A 3-239325 (JP, A) JP-A 53-22380 (JP , A) JP-A-3-101239 (JP, A) JP-A-2-208934 (JP, A) JP-A-2-288325 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB) Name) H01L 21/306-21/308

Claims (5)

(57) [Claims] And 1. A dielectric film deposition process for depositing an insulating film on a semiconductor substrate, on the insulating film, a first resist forming step of forming a first resist having a first opening in a predetermined portion, A first etching step of chemically removing a part of the insulating film from the first opening, a mesa etching step of performing a mesa etching on the semiconductor substrate from the first opening, and A second resist forming step of forming a second resist having a second opening in a portion where the first electrode is formed, and a second etching step of chemically removing a part of the insulating film from the second opening A first electrode material depositing step of depositing a material of the first electrode on the semiconductor substrate, and a material of the first electrode deposited on the second resist by dissolving the second resist. And then
A first electrode forming step of heat-treating the semiconductor substrate to form the first electrode; and forming a third resist having a third opening on a portion of the semiconductor substrate where recess etching is desired, and forming the third opening. A part of the insulating film is removed by etching, the semiconductor substrate is recess-etched through the third opening, and a recess etching step of depositing a material for the second electrode from the upper part of the semiconductor substrate; A second electrode forming step of removing the material of the second electrode deposited on the third resist by melting the second electrode forming step. 2.Insulating film for depositing insulating film on semiconductor substrate
The deposition process, A first register having a first opening at a predetermined portion on the insulating film
A first resist forming step of forming a strike; Chemically etch a portion of the insulating film from the first opening
A first etching step for removing the ring, Mesa etching is performed on the semiconductor substrate from the first opening.
Perform mesa etching And A second opening is formed on the semiconductor substrate at a portion where the first electrode is formed.
Resist forming step of forming a second resist having
When, Chemically etch a portion of the insulating film from the second opening
A second etching step for removing First electrode material for depositing the material of the first electrode on the semiconductor substrate
Material deposition process, The second resist is formed by dissolving the second resist.
The material of the first electrode deposited on the
Heat treating the semiconductor substrate to form the first electrode;
1 electrode forming step, On the semiconductor substrate, place a
A third resist having three openings is formed, and the third opening is formed.
Part of the insulating film is removed by etching, and the third opening
Recess etching the semiconductor substrate from the mouth,
Then, the third resist is removed, and the third resist is formed on the semiconductor substrate.
A fourth resist having a fourth opening narrower than the third opening
Is formed, and the semiconductor substrate is formed through the fourth opening.FurtherRe
Seth EthnThe second electrode from above the semiconductor substrate.
A recess etching step of depositing material, By dissolving the fourth resist, the fourthFourRegis
The material of the second electrode deposited on the substrateSecond electrode
And forming processCharacterized bySemiconductorEquipment manufacturing
Method. 3. The first electrode has two ohmic electrodes in ohmic contact with the semiconductor substrate, and the second electrode is formed between the two ohmic electrodes to form a Schottky with the semiconductor substrate. the method of manufacturing a semiconductor device according to claim 1 or 2 characterized by having a Schottky electrode in contact. 4. The first electrode is on the front surface of the semiconductor substrate.
Serial a source electrode and a drain electrode formed on the mesa-etched portion, the second electrode is in the recess groove formed by recess etching between the source electrode and the drain electrode in said semiconductor substrate a gate electrode formed der
Ri, between the source electrode and the gate electrode in the semiconductor substrate, and between the drain electrode and the gate electrode, and <br/> characterized by forming two insulating films by the insulating film 4. The semiconductor device according to claim 1, wherein
Manufacturing method . 5. The method of manufacturing a semiconductor device according to claim 4, wherein the gate electrode is a T-shaped gate.