JP3500977B2 - Manufacturing method of double-sided circuit board - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a double-sided circuit board for mounting various electronic components. [0002] A typical example of a conventional double-sided circuit board is as follows.
5 (a) to 5 (f). First, a through-hole 53 is drilled or the like into a double-sided copper-clad laminate 50 (FIG. 5A) in which a copper foil 52a and a copper foil 52b are laminated on both sides of a polyimide film 51 with an adhesive.
Is formed (FIG. 5B). Next, after a palladium catalyst for electroless plating is adhered to the entire surface of the double-sided copper-clad laminate 50 including the inner wall of the through hole, a copper thin film 54 is formed by electroless plating (FIG. 5 ( c)). Then, the copper thin film 5 is formed by electroplating.
4 (including the inner wall of the through hole 53), a copper thick film 55 is formed (FIG. 5D). Thereby, the copper foil 52a and the copper foil 52
b. If necessary, the periphery of the through hole 53 is masked with an etching resist 56 (FIG. 5).
(E)) By removing the exposed copper thick film 55 and the underlying copper thin film 54 by etching and removing the etching resist 56, a double-sided circuit board is obtained (FIG. 5).
(F)). [0006] However, when the through-holes 53 ensure conduction between the upper and lower copper foils 52a, 52b of the double-sided circuit board, there is a large cavity inside the through-holes 53, so that the conduction reliability is high. There is a problem that the property is insufficient. Further, the diameter of the drill for forming the through hole 53 cannot be excessively reduced in consideration of its mechanical strength, and it is difficult to make the diameter smaller than about 300 μm. In this connection, a relatively large land (approximately 600 to 800 μm square) is formed in the opening of the through hole 53 in order to improve the conduction reliability of the through hole 53 as much as possible.
Need to be formed. This is a major obstacle to increasing the density of wiring patterns on the double-sided circuit board. An object of the present invention is to solve the problems of the prior art and to provide a double-sided circuit board having a high conduction reliability and a high-density wiring pattern. Means for Solving the Problems The inventors of the present invention have proposed that (1) a polyamic acid film formed on a conductive layer (lower conductive layer) such as a copper foil by using a photolithographic method. A very fine via hole reaching the conductive layer can be formed by etching. (2) After a polyamic acid film is converted into a polyimide film to form a polyimide film, a plating metal is formed in the via hole by electrolytic plating using the conductive layer as a cathode. (3) A metal thin film is formed on the polyimide film surface by sputtering, a plating resist film capable of fine patterning is formed thereon, and then an upper conductive layer is formed on the exposed metal thin film by electrolytic plating. Then, a conductive pattern can be formed at a high density, the size of the land can be reduced, and (4) conduction is secured in this way. It has been found that the conduction reliability of the double-sided circuit board is improved, and the present invention has been completed. That is, the present invention provides a double-sided circuit in which a polyimide film and an upper conductive layer are formed on a lower conductive layer, and the lower conductive layer and the upper conductive layer are connected using a via hole formed in the polyimide film. In the method for manufacturing a plate, the following steps (a) to (i): (a) a step of forming a polyamic acid film on the lower conductive layer; (b) chemical etching using a photolithographic method on the polyamic acid film A step of forming a via hole reaching the lower conductive layer; (c) a step of converting the polyamic film into a polyimide to form a polyimide film; (d) a step of filling the via hole with plating metal by an electrolytic plating method using the lower conductive layer as a cathode; (E) a step of forming a metal thin film on the surface of the polyimide film by a sputtering method; (f) a plating resist film corresponding to the upper conductive layer pattern is formed of gold. (G) depositing a metal for an upper conductive layer on a metal thin film by electrolytic plating to form an upper conductive layer; (h) stripping a plating resist film; and (i) A) a method of manufacturing a double-sided circuit board, which comprises a step of soft-etching the upper conductive layer side surface to remove an exposed metal thin film. Further, the present invention provides a double-sided circuit in which a polyimide film and an upper conductive layer are formed on a lower conductive layer, and the lower conductive layer and the upper conductive layer are connected using a via hole formed in the polyimide film. In the method of manufacturing a plate, the following steps (a) to (i): (a) a step of forming a polyamic acid film on a lower conductive layer; (b) chemical etching of the polyamic acid film using a photolithographic method Forming a via hole reaching the lower conductive layer by (c1) polyimide-forming the polyamic acid film in which the via hole is formed into a polyimide film; (c2) laminating a carrier sheet on the back surface of the lower conductive layer; d) a step of filling the via hole with a plating metal by an electrolytic plating method using the lower conductive layer as a cathode; (e) a step of filling the via hole from the side where the via hole is formed; Forming a metal thin film on the surface of the metal film by sputtering; (f) forming a plating resist film corresponding to the upper conductive layer pattern on the metal thin film; and (g) forming an upper conductive film on the metal thin film by electrolytic plating. (H1) a step of removing a plating resist film and subsequently a carrier sheet; and (h2) an etching resist film on each surface of the lower conductive layer and the upper conductive layer. Forming, except that the etching resist film on the lower conductive layer side is processed into a pattern corresponding to the lower conductive layer pattern; (h3) a step of chemically etching the lower conductive layer until the polyimide film is exposed; A) removing the etching resist film formed on each surface of the lower conductive layer and the upper conductive layer;
And (i) a method for manufacturing a double-sided circuit board, comprising a step of soft-etching at least the surface of the upper conductive layer to remove an exposed metal thin film. Hereinafter, the present invention will be described in detail. As shown in FIG. 1, a double-sided circuit board manufactured by the manufacturing method of the present invention has a polyimide film 2 and an upper conductive layer 3 formed on a lower conductive layer 1, and a lower conductive layer 1 and an upper conductive layer 3 are formed. Is the via hole Vh formed in the polyimide film 2.
Are connected by the plating metal 4 filled in the metal. This double-sided circuit board has the following steps (a) to
It is manufactured according to (i). Step (a) First, a polyamic acid film 2a is formed on the lower conductive layer 1 (FIG. 2A). Specifically, on the lower conductive layer 1,
A polyamic acid solution is applied by a bar coater or the like and dried to form a polyamic acid film 2a. The polyamic acid film is a precursor of the polyimide film, and can be easily chemically etched with an alkali etching solution. Therefore, the polyamic acid film 2
In a, a fine hole can be formed by using a photolithographic method capable of performing finer processing than drilling. Although the lower conductive layer 1 is generally made of copper foil, it may be made of other metals, such as gold, silver, aluminum, solder, nickel, and alloys thereof. The thickness of the lower conductive layer 1 can be appropriately determined according to the purpose of use of the double-sided circuit board and the like. The lower conductive layer 1 may be patterned in advance as necessary, or may be patterned by a known method after forming the upper conductive layer 3 as described later. The thickness of the polyamic acid film 2a can be appropriately determined according to the intended use of the double-sided circuit board. Step (b) Next, a via hole Vh reaching the lower conductive layer 1 is formed in the polyamic acid film 2a by photolithography using chemical etching (FIG. 2B). Specifically, a photosensitive resist is applied to the polyamic acid film 2a and dried to form a photosensitive resist layer, and a protective film is further laminated thereon. The photosensitive resist layer is patterned by exposing and developing through a photomask in accordance with the via hole to be opened, and the lower conductive layer 1 is exposed through the polyamic acid film 2a using the patterned photosensitive resist layer as an etching mask. Chemically etch until Then, the via hole Vh is formed by removing the photosensitive resist layer and the protective film. The size of the via hole Vh is generally finer than the diameter of the hole formed by drilling, and is usually 10 to 2 times.
A diameter of 00 μm is preferred. The chemical etching conditions can be appropriately determined according to the type of the polyamic acid film 2a, the size of the via hole Vh to be opened, and the like. Step (c) The polyamic acid film 2a having the via hole Vh formed thereon is
Polyimide is formed by a conventional method to obtain a polyimide film 2 (FIG. 2C). Polyimide conditions are as follows: polyamic acid film 2
It can be appropriately determined according to the type and thickness of a. If necessary, at least the surface of the lower conductive layer 1 exposed at the bottom of the via hole Vh is chemically polished with a sulfuric acid-hydrogen peroxide-based etchant. Step (d) Next, the via hole Vh is filled with a plating metal 4 by an electrolytic plating method using the lower conductive layer 1 as a cathode (FIG. 2).
(D)). In this case, after the step (c), in order to improve the handleability of the object to be plated and to prevent unnecessary plating metal from depositing on the back surface 1a of the lower conductive layer 1, the back surface of the lower conductive layer 1 is formed. Preferably, a carrier sheet is laminated on 1a (not shown). As the plating metal 4, copper can be preferably used. The electroplating conditions can be appropriately determined according to the type of the plating metal 4, the diameter of the via hole, and the like. Step (e) Next, a metal thin film 5 is formed on the surface of the polyimide film 2 from the side where the via hole Vh is formed by a known sputtering method (FIG. 2E). The metal thin film 5 is preferably a nickel thin film, a copper thin film, a nickel / copper laminated metal thin film, or the like. The thickness of the metal thin film 5 is usually 0.1 to
0.2 μm. Here, the reason why the metal thin film 5 is formed not by the electroless plating method but by the sputtering method is that the polyimide film 2 may be damaged by the liquid property of the electroless plating solution. For example, the electroless copper plating solution is usually strongly alkaline, and it is not preferable because the polyimide film 2 swells under strongly alkaline conditions. Step (f) Next, a plating resist film 6 corresponding to the upper conductive layer pattern is formed on the metal thin film 5 (FIG. 2 (f)). Specifically, a photosensitive resist film such as a photosensitive dry film is formed on the polyimide film 2, and the plating resist film 6 is formed by exposing and developing according to the upper conductive layer pattern. Step (g) Next, a metal for an upper conductive layer is deposited on the metal thin film 5 by electrolytic plating to form an upper conductive layer 3 (FIG. 2).
(G)). As the metal for the upper conductive layer, copper can be preferably mentioned. The thickness of the upper conductive layer 3 is usually 5 to 35 μm.
It is. Step (h) Next, the plating resist film 6 is peeled off by an ordinary method (FIG. 2).
(H)). Step (i) Next, the surface of the upper conductive layer 3 is soft-etched by a conventional method so that the exposed metal thin film 5 is removed. Thus, the double-sided circuit board shown in FIG. 2 (i) is obtained. Next, an example of a method for manufacturing a double-sided circuit board for patterning the upper conductive layer and subsequently patterning the lower conductive layer will be described with reference to FIGS. Step (a) First, a polyamic acid film 2a is formed on the lower conductive layer 1 (FIG. 3A). Step (b) Next, a via hole Vh reaching the lower conductive layer 1 is formed in the polyamic acid film 2a by chemical etching using photolithography (FIG. 3B). Step (c1) The polyamic acid film 2a having the via hole Vh formed thereon is
Polyimide is formed by a conventional method to obtain a polyimide film 2 (FIG. 3 (c1)). Step (c2) A carrier sheet CS is laminated on the back surface 1a of the lower conductive layer 1 (FIG. 3 (c2)). After the lamination, at least the surface of lower conductive layer 1 exposed at the bottom of via hole Vh is chemically polished with a sulfuric acid-hydrogen peroxide-based etchant, if necessary. Step (d) Next, the via hole Vh is filled with the plating metal 4 by an electrolytic plating method using the lower conductive layer 1 as a cathode (FIG. 3).
(D)). Step (e) Next, a metal thin film 5 is formed on the surface of the polyimide film 2 from the side where the via hole Vh is formed by a known sputtering method (FIG. 3E). Step (f) Next, a plating resist film 6 corresponding to the upper conductive layer pattern is formed on the metal thin film 5 (FIG. 3 (f)). Step (g) Next, an upper conductive layer 3 is formed by depositing a metal for an upper conductive layer on the metal thin film 5 by electrolytic plating (FIG. 4).
(G)). Step (h1) Next, the plating resist film 6, followed by the carrier sheet CS
Is peeled off by a conventional method (FIG. 4 (h1)). Step (h2) An etching resist film 7 is formed on each surface of the lower conductive layer 1 and the upper conductive layer 3. However, the etching resist film 7 on the lower conductive layer 1 side is processed into a pattern corresponding to the intended lower conductive layer pattern (FIG. 4 (h2)). Step (h3) The lower conductive layer 1 is patterned by chemical etching until the polyimide film 2 is exposed (FIG. 4 (h3)). Step (h4) Next, the etching resist film 7 formed on each surface of the lower conductive layer 1 and the upper conductive layer 3 is removed (FIG. 4 (h4)). Step (i) Next, at least the surface of the upper conductive layer 3 is soft-etched to remove the exposed metal thin film 5. As a result, the double-sided circuit board shown in FIG. As described above, in the double-sided circuit board obtained by the manufacturing method of the present invention, the upper conductive layer and the lower conductive layer are connected by the via hole filled with the plating metal having no void, so that high conduction reliability is obtained. Property can be ensured. Further, since the formation of the via hole is performed by chemical etching utilizing the photolithographic method, the land can be relatively miniaturized, and the density of the wiring pattern can be increased. EXAMPLES Hereinafter, the present invention will be described specifically with reference to examples. Example 1 A copper foil having a thickness of 18 μm was coated on one side with 1.01 mol of pyromellitic dianhydride and 1.0 mol of 4,4′-diaminodiphenyl ether in N-methyl-2-solvent as a solvent. The polyamic acid solution obtained by dissolving in pyrrolidone is dried to a thickness of 2
It was applied to a thickness of 0 μm and dried. On this polyamic acid film, a photosensitive resist (NR-41 (nylon-oligoester-based resist), manufactured by Sony Chemical Co., Ltd.) is applied so as to have a dry thickness of 8 μm, and dried. A protective film (polyester film, manufactured by Toray Industries, Inc.) having a thickness of 12 μm was laminated. The photosensitive resist was exposed from the protective film side by irradiating it with light having a wavelength of 365 nm using a negative film as a photomask, and developed with water to pattern the photosensitive resist. Using the patterned photosensitive resist as an etching mask, the polyamic acid layer was chemically etched with an alkaline solution (etching temperature 25 ° C., etching time 15 seconds) to form a via hole in the polyamic acid film. Copper foil is exposed at the bottom of the via hole,
The diameter of the bottom was 80 μm, and the diameter of the via hole on the surface of the polyamic acid film was 100 μm. Next, the polyamic acid film in which the via hole was formed was made into polyimide to obtain a polyimide film (polyimide heating temperature 350 ° C., polyimide heating time 1).
0 minutes). Next, after covering the outer surface of the copper foil with a masking tape, electrolytic copper plating (copper sulfate plating bath, plating bath temperature 25 ° C., plating current density
15 A / dm ² , plating time 20 minutes). As a result, the via hole could be filled with copper. Next, a sputtering method (Ar gas flow rate 18 sccm, pressure 5 × 10 ^-1 P) is applied to the entire surface of the polyimide film.
Nickel was deposited to a thickness of 150 nm according to a), followed by copper to a thickness of 1000 nm to form a laminated metal thin film. Next, a dry film (manufactured by Asahi Kasei Corporation) was laminated on the laminated metal thin film, exposed through a photomask corresponding to the upper conductive layer pattern, and developed to pattern the dry film. Next, the exposed laminated metal thin film was subjected to electrolytic copper plating (a copper sulfate plating bath, a plating bath temperature of 30 ° C., a plating current density of 1.5 A / dm ² , and a plating time of 40 minutes). Copper was deposited. Next, the dry film was peeled off with an aqueous sodium hydroxide solution, and soft etching (sulfuric acid-hydrogen peroxide-based etching solution) was performed to remove the exposed laminated metal thin film. As a result, a double-sided circuit board shown in FIG. 2 (i) was obtained. The obtained double-sided circuit board was heated at 260 ° C.
(10 seconds) and a hot oil test (JIS C5016) alternately immersed in oil at 20 ° C. (10 seconds) showed that the conduction between the upper conductive layer and the lower conductive layer was at least 100 cycles. I could secure it later. On the other hand, in the case of a conventional double-sided circuit board, 20
After the hot oil test in the cycle, conduction between the upper conductive layer and the lower conductive layer could not be ensured in some cases. According to the present invention, a double-sided circuit board having high conduction reliability and having a high-density wiring pattern can be manufactured.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic sectional view of a double-sided circuit board obtained by a manufacturing method of the present invention. FIG. 2 is a process chart of the manufacturing method of the present invention. FIG. 3 is a process chart of the manufacturing method of the present invention. FIG. 4 is a process chart of the manufacturing method of the present invention. FIG. 5 is a manufacturing process diagram of a conventional double-sided circuit board. [Description of Signs] 1 lower conductive layer, 2 polyimide film, 2a polyamic acid film, 3 upper conductive layer, 4 plating metal, 5 metal thin film, 6 plating resist film, 7 etching resist film

Continuation of the front page (72) Inventor Satoshi Takahashi 12-3 Satsukicho, Kanuma City, Tochigi Prefecture Inside Sony Chemical Co., Ltd. (56) References JP-A-4-179297 (JP, A) JP-A-8-264953 (JP, A) JP-A-5-275820 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H05K 3/42 H05K 3/18

Claims (1)

(57) [Claim 1] A polyimide film and an upper conductive layer are formed on a lower conductive layer, and the lower conductive layer and the upper conductive layer are connected using a via hole formed in the polyimide film. In the method for manufacturing a double-sided circuit board, the following steps (a) to
(I): (a) forming a polyamic acid film on the lower conductive layer; (b) forming a via hole reaching the lower conductive layer in the polyamic acid film by chemical etching using photolithography; A) a step of filling the via hole with a plating metal by an electrolytic plating method using the lower conductive layer as a cathode; and e) forming a metal on the surface of the polyimide film by a sputtering method. (F) forming a plating resist film corresponding to the upper conductive layer pattern on the metal thin film; (g) depositing a metal for the upper conductive layer on the metal thin film by electrolytic plating to form an upper layer Forming a conductive layer; (h) removing the plating resist film; and (i) soft-etching the upper conductive layer side surface to expose the surface. It comprises the step of removing the metal thin film, further, step
Prior to (a), a process is required between step (a) and step (b).
Between step (b) and step (c) or between step (c) and step
There is a step of patterning the lower conductive layer during (d).
Method for producing a double-sided circuit board to said to Rukoto.