JP3494022B2 - Manufacturing method of semiconductor acceleration sensor - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to an automobile, an aircraft,
The present invention relates to a method of manufacturing a semiconductor acceleration sensor used for home electric appliances and the like, and particularly to a triaxial acceleration sensor having sensitivity in x-axis, y-axis, and z-axis.

[0002]

2. Description of the Related Art Generally, a cantilever type and a double-supported beam type have been proposed as acceleration sensors. As a detection method, there are a method of detecting mechanical strain as a change in electric resistance and a detection method by a change in capacitance. For example, Japanese Patent Application Laid-Open No. 6-109755 discloses a double-ended beam type acceleration sensor that detects mechanical strain as a change in electrical resistance, and a method of manufacturing such an acceleration sensor is disclosed in Japanese Patent Application No. 8-
No. 100782 is proposed.

FIG. 11 is a schematic sectional view showing a manufacturing process of a semiconductor acceleration sensor according to a conventional example, and FIG. 12 is a schematic plan view showing a state of the semiconductor acceleration sensor according to the conventional example as viewed from above. First, the n-type single crystal silicon substrate 1
A silicon oxide film 2 is formed thereon by thermal oxidation or the like, and an opening 2a is formed by etching the silicon oxide film 2 using a resist mask (not shown) patterned in a predetermined shape, thereby forming a plasma. The resist mask is removed by ashing or the like. At this time, the opening 2a is formed at a location surrounding the substantially square central portion 1a of the single crystal silicon substrate 1.

Subsequently, by using the silicon oxide film 2 having the opening 2a as a mask, p-type impurities such as boron (B) are deposited and thermally diffused or ion-implanted and annealed to perform p + -type burying. The embedded sacrificial layer 3a is formed (FIG. 11A), and the silicon oxide film 2 is removed by etching.

Next, the n-type epitaxial layer 4 is formed on the surface of the single crystal silicon substrate 1 on which the p + type buried sacrificial layer 3a is formed.
To form the epitaxial layer 4 as shown in FIG.
In addition, a p-type impurity such as boron (B) is deposited by using a resist mask (not shown) in a rectangular shape that is substantially opposite to the beam portion 14b, which will be described later, and lacks the vicinity of the central portion 14a. And p reaching the p + type buried sacrificial layer 3a by performing thermal diffusion or ion implantation and annealing treatment.
A + type impurity layer (not shown) is formed, and the resist mask is removed (FIG. 11B). Here, since the epitaxial layer 4 will become the bending portion 14 later, it is formed to have a thickness that bends when acceleration is applied.

Next, a p-type impurity such as boron (B) is diffused at a portion of the epitaxial layer 4 corresponding to the flexure portion 14 to form a piezoresistor 5 (FIG. 11C), and the piezoresistor 5 is formed. A p-type impurity such as boron (B) is diffused in the epitaxial layer 4 so as to be electrically connected to form the diffusion wiring 6 (FIG. 11D).

Next, CV is formed on the two main surfaces of the single crystal silicon substrate 1 and on the surface of the epitaxial layer 4 on which the piezoresistor 5 is formed.
A protective film 9 such as a silicon nitride film is formed by the D method or the like, and the protective film 9 is formed on the two main surfaces of the single crystal silicon substrate 1 by using a resist mask (not shown) patterned in a predetermined shape. The etching is performed to form the opening 10 at a position corresponding to the outer peripheral edge of the weight portion 15 described later, and the resist mask is removed (FIG. 11E).

Next, the single crystal silicon substrate 1 is anisotropically etched by using an alkaline etchant such as a potassium hydroxide (KOH) solution with the protective film 9 having the opening 10 formed as a mask. , P + type buried sacrificial layer 3
A notch 11 reaching a is formed (see FIG. 11).
(F)).

Next, the protective film 9 at a desired position on the diffusion wiring 6 is removed by etching, and a metal wiring 17 is formed by sputtering and etching so as to be electrically connected to the diffusion wiring 6 (see FIG. 11 (g)).

Next, an etchant made of an acidic solution containing hydrofluoric acid or the like is introduced into the cut portion 11, the p + type buried sacrificial layer 3a and the p + type impurity layer are removed by isotropic etching, and both ends are epitaxially etched. Supported by the frame 13 of the layer 4 to form a flexure 14 to which the neck 15a of the weight 15 is connected. Then, the slit 2 that partially divides the bending portion 14 so that the bending of the bending portion 14 is concentrated.
1 is formed by RIE (Reactive Ion Etching) or the like, and the beam portion 14b is formed in the bending portion 14 (FIG. 11).
(H)).

In this semiconductor acceleration sensor, when acceleration is applied to the weight portion 15, the weight portion 15 is displaced in the direction opposite to the direction of application of the acceleration, and the bending portion 14 bends.
The piezoresistor 5 formed on one surface of 4 bends, and the resistance value of the piezoresistor 5 changes. The acceleration is detected by converting the change in the resistance value into an electric signal.

[0012]

However, in the manufacturing process of the semiconductor acceleration sensor as described above, when the p + type buried sacrificial layer 3a is etched, the aspect ratio of the depth of about 1 mm and the gap of 5 to 10 μm is 200 mm. Since the above-described closed space is etched in the longitudinal direction of the flexible portion 14, convection of the etchant hardly occurs, and there is a problem that etching does not proceed.

The etchant staying in the closed space is
There is a problem in that the change in composition due to the nitric acid autocatalytic action causes deterioration of selectivity, and even the flexible portion 14 that greatly affects the sensitivity of the semiconductor acceleration sensor is etched, and desired characteristics cannot be obtained.

The present invention has been made in view of the above points, and an object thereof is to provide a method of manufacturing a semiconductor acceleration sensor capable of forming a flexure portion with high accuracy.

[0015]

The invention according to claim 1 is
Forming a sacrificial layer at a predetermined position on one surface side of the semiconductor substrate; forming an epitaxial layer on the surface of the semiconductor substrate on which the sacrificial layer is formed; and a high-concentration impurity layer reaching the sacrificial layer in the epitaxial layer. A step of forming
A step of forming an acceleration detecting portion for converting a strain into an electric signal to detect an acceleration at a portion corresponding to the bending portion of the epitaxial layer; and a portion corresponding to an outer peripheral edge of the weight portion of the semiconductor substrate, Anisotropically etching a surface of the substrate different from the surface on which the epitaxial layer is formed to form a notch reaching the sacrificial layer; etching the sacrificial layer to form a notch, and the epitaxial layer In a method for manufacturing a semiconductor acceleration sensor, the method includes a step of forming a flexure part for suspending and supporting the weight part and a frame for supporting the flexure part by etching away a desired part of the sacrificial layer in the epitaxial layer. A step of forming a high-concentration impurity layer that reaches and a step of forming an etchant introduction port that reaches the sacrifice layer by removing the high-concentration impurity layer by etching That and the step, the sacrificial layer by introducing an etchant from the etchant inlet so as to form an etching away said kerfs
None, form the high-concentration impurity layer at a location adjacent to the flexure.
The sacrificial layer under the flexure to remove it by etching.
It is characterized in that it is performed from both sides of the bending portion .

According to a second aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first aspect, the resistance value changes due to bending at a portion corresponding to the bending portion of the epitaxial layer as the acceleration detecting portion. An acceleration is detected by forming a piezoresistor and converting a change in the resistance value of the piezoresistor into an electric signal.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first aspect, electrodes that are substantially opposed to each other are formed as the acceleration detecting section, and the bending section and / or the acceleration section when acceleration is applied. The deflection of the weight portion is detected by the electrode as a change in capacitance, and the acceleration is detected.

According to a fourth aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to any one of the first to third aspects, a high-concentration impurity layer is formed as the sacrifice layer by impurity diffusion. It is what

According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to any of the first to third aspects, a high-concentration impurity layer is formed as the sacrificial layer by impurity diffusion, and anodization is performed. The high-concentration impurity layer is made porous by a method to form a porous silicon layer.

[0020]

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to any one of the first to fifth aspects, the high concentration impurity layer and the sacrificial layer are continuously removed by etching. It is characterized by having done.

[0022]

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 is a schematic sectional view showing a manufacturing process of a semiconductor acceleration sensor according to one embodiment of the present invention, and FIG.
It is a schematic perspective view which shows the state which partially fractured | ruptured the manufacturing process of (b)-(h). The semiconductor acceleration sensor according to the present embodiment has a silicon oxide film 2 formed by thermal oxidation or the like on a single crystal silicon substrate 1 which is an n-type semiconductor substrate having a thickness of 400 to 600 μm.
Then, the opening 2a is formed by etching the silicon oxide film 2 using a resist mask (not shown) patterned into a predetermined shape, and the resist mask is removed by plasma ashing or the like. At this time, the opening 2a is formed in the central portion 1 of the single crystal silicon substrate 1 having a substantially square shape.
It is formed at a location surrounding a. The central portion 1a
The shape of is not particularly limited, and may be, for example, a circle, an ellipse, or a rectangle (rectangle, square).

Subsequently, by using the silicon oxide film 2 having the opening 2a as a mask, deposition and thermal diffusion of p-type impurities such as boron (B) or ion implantation and annealing are performed to perform sacrifice (or sacrificial layer). Concentration impurity layer)
To form a p + type buried sacrificial layer 3a (FIG. 1A),
The silicon oxide film 2 is removed by etching. Here, the impurity concentration of the p + type buried sacrificial layer 3a is 10 ¹⁹
It is preferably cm ^-3 or more.

Although the p + type buried sacrificial layer 3a is formed using the silicon oxide film 2 as a mask in the present embodiment, a silicon nitride film may be used as a mask.

In this embodiment, the p + type buried sacrificial layer 3a is formed on the single crystal silicon substrate 1. However, n type impurities such as phosphorus (P) are deposited and thermally diffused or ion-implanted. Alternatively, the n + type buried sacrificial layer may be formed by performing an annealing process.

The p + type buried sacrificial layer 3a has a central portion 1
It may extend from the entire outer edge of a to completely surround that portion, or it may extend from a portion of the outer edge. When extending from the whole, the p + -type buried sacrificial layer 3a may have an annular shape, for example, the central portion 1a is circular, and the p + -type buried sacrificial layer 3a is formed by a concentric circle and a central portion. 11a is an annular portion, or the central portion 1a is an inner square, and the p + -type buried sacrificial layer 3a is formed by an outer square that is concentric with and has the same direction as that of the inner square. It may be a part. Further, the p + -type buried sacrificial layer 3a may be a portion formed by a portion between the circular central portion 1a and the outer square or the opposite combination, and further, instead of the square, a rectangular shape may be used. Alternatively, an elliptical shape may be used.

Further, the p + type buried sacrificial layer 3a is formed in the central portion 1
p + type buried sacrificial layer 3 when extending from a part of the outer edge of a
a is an equal angle (eg 90 °) around the central portion 1a
, The p + buried sacrificial layer 3a may have four beam configurations facing each other in the central portion 1a (ie, in the central portion 1a). It will be a cross shape). In other words, the p + type buried sacrificial layer 3a may extend radially from the central portion 1a, and the number thereof is not limited.

Next, an n-type epitaxial layer 4 is formed on the surface of the single crystal silicon substrate 1 on which the p + type embedded sacrificial layer 3a is formed, with a thickness corresponding to a bending portion 14 to be described later that bends when acceleration is applied. Then, the epitaxial layer 4 is formed using a photoresist (not shown) patterned into a predetermined shape as a mask.
Of the boron (B) at the location corresponding to the bending portion 14 of the
The piezoresistor 5 is formed by performing the p-type impurity deposition and thermal diffusion or ion implantation and annealing treatment (FIG. 1 (b)), and similarly p-type impurity deposition and thermal diffusion or ion implantation. Then, the diffusion wiring 6 is formed so as to be electrically connected to the piezoresistor 5 by performing the annealing treatment, and the photoresist is removed (FIGS. 1C and 2A).

Next, a p-type impurity such as boron (B) is deposited and deposited on a portion of the epitaxial layer 4 adjacent to a beam portion 14b, which will be described later, by using a resist mask (not shown) patterned in a predetermined shape. By performing thermal diffusion or ion implantation and annealing treatment, ap + type impurity layer 7 reaching the p + type buried sacrificial layer 3a is formed, and the resist mask is removed (FIGS. 1D and 2B).

In the present embodiment, the p + type impurity layer 7 is formed at a position adjacent to the beam portion 14b, but the present invention is not limited to this, and the bending portion of the epitaxial layer 4 which will be described later will be described. It may be formed at a position excluding 14 and the frame 13. Further, in the present embodiment, the p + type impurity layer 7 is formed after the piezoresistor 5 and the diffusion wiring 6 are formed, but the piezoresistance 5 and the diffusion wiring 6 are formed after the p + type impurity layer 7 is formed. It may be formed.

Next, a silicon oxide film 8 is formed on the single crystal silicon substrate 1 and the epitaxial layer 4, and a protective film 9 such as a silicon nitride film is formed on the silicon oxide film 8. Then, the silicon oxide film 8 / protective film 9 formed on the single crystal silicon substrate 1 is etched by using a resist mask (not shown) patterned in a predetermined shape, so that a weight portion 15 described later is formed. The opening 10 is formed at a position corresponding to the outer peripheral edge of the resist mask, and the resist mask is removed (FIG. 1E).

Next, anisotropic etching of the single crystal silicon substrate 1 is performed by using the silicon oxide film 8 / protective film 9 having the openings 10 as a mask and using an alkaline etchant such as KOH solution. p + type embedded sacrificial layer 3a
A notch 11 reaching the height is formed (FIG. 1 (f)).

Next, the silicon oxide film 8 / protective film 9 on the p + type impurity layer 7 is removed by etching to form an opening (not shown), and a hydrofluoric nitric acid-based etchant is introduced from the opening. Then, the p + type impurity layer 7 is removed by etching to form the etchant introducing port 12, and the etchant (50% hydrofluoric acid aqueous solution: 69% nitric acid aqueous solution: acetic acid = 1 is formed from the etchant introducing port 12 by an acidic solution containing hydrofluoric acid and the like. : 1 ~
(3: 8 volume basis) is introduced to remove the p + type buried sacrificial layer 3a by etching to form the cut groove 3, and the central portion 14 is formed.
a and a beam portion 14b, the beam portion 14b extends between at least a part of an inner peripheral side surface of the frame 13 described later and the central portion 14a, and the beam portion 14b and the central portion 14a are integrally connected. The bending portion 14 and the neck portion 1 at the central portion 14a
The weight portion 15 suspended and supported through the frame 5a and the frame 1
And a support member 16 that supports the lower surface side of 3 and surrounds the outer peripheral edge of the weight portion 15 via the notch portion 11 (FIG. 1).
(G), FIG. 2 (c)).

Next, the silicon oxide film 8 / protective film 9 at a desired position on the diffusion wiring 6 is removed by etching to form a contact hole (not shown), the contact hole is buried, and the diffusion wiring 6 is interposed. Metal wiring 17 such as aluminum (Al) is formed so as to be electrically connected to the piezoresistor 5 and the silicon oxide film 8 / protective film 9 on the single crystal silicon substrate 1 is removed by etching (FIG. 2).
(D)).

Finally, a portion of the epitaxial layer 4 except for the portions to be the bending portion 14 and the frame 13 and a part of the single crystal silicon substrate 1 thereunder are subjected to reactive ion etching (RIE). After removal, a frame-shaped frame 13 having an upper surface side and a lower surface side is formed (FIG. 1 (h), FIG. 2 (e)). Here, the beam portion 14
It is desirable that the boundaries between b and the frame 13 and between the beam portions 14b and 14b be processed in a curved (R) shape to avoid stress concentration.

Therefore, in the present embodiment, the etchant introducing port 12 is formed at a position adjacent to the beam portion 14b of the epitaxial layer 4, and the etchant is introduced from the etchant introducing port 12 to form the p + type buried sacrificial layer 3a. Since it is removed by etching, the retention phenomenon of the etchant is eliminated and convection can be performed quickly, and as a result, there is no influence of the liquid composition fluctuation due to the autocatalytic decomposition reaction of nitric acid in the locally closed space, and p + The bending portion 1 can be accurately performed without deteriorating the selectivity between the mold-buried sacrificial layer 3a and the epitaxial layer 4.
4 can be formed.

Since the p + -type impurity layer 7 is a high-concentration impurity layer like the p + -type buried sacrificial layer 3a, the p + -type impurity layer 7 and the p + -type buried sacrificial layer 3a are continuously removed by etching. It can be performed and the process can be shortened.

Further, conventionally, the beam portion 14b had to be etched in the longitudinal direction, but in the present embodiment, the etching can be performed from a direction perpendicular to the longitudinal direction of the beam portion 14b, so that the etching distance is shortened. be able to.

In the present embodiment, the conductivity types of the single crystal silicon substrate 1 and the epitaxial layer 4 are n.
However, the p + type is used as the conductivity type of the impurity diffusion for forming the p + type buried sacrificial layer 3a, the piezoresistive 5, the diffusion wiring 6 and the p + type impurity layer 7. However, the present invention is not limited to this. , And the opposite conductivity type may be used.

Second Embodiment FIG. 3 is a schematic perspective view showing a partially broken state of a semiconductor acceleration sensor according to another embodiment of the present invention, and FIG.
FIG. 5 is a schematic plan view showing a state of the semiconductor acceleration sensor according to the present embodiment as viewed from above, and FIG. 5 is a manufacturing process of the semiconductor acceleration sensor according to the present embodiment taken along the line AA ′ in FIG. 4. 6 is a schematic cross-sectional view showing a manufacturing process of the semiconductor acceleration sensor according to the present embodiment at BB ′ in FIG. 4, and FIG. 7 is a cross-sectional view showing the present embodiment. It is a schematic sectional drawing which shows the manufacturing process in CC 'of FIG. 4 of such a semiconductor acceleration sensor.

First, a silicon oxide film 2 is formed on one main surface of a single crystal silicon substrate 1 which is a semiconductor substrate by thermal oxidation or the like, and the silicon oxide film 2 is etched, so that the single crystal silicon substrate 1 is substantially removed. Substantially elongated openings 2a are formed which extend outward from the outer edge of the rectangular central portion 1a and are spaced at equal angular intervals (90 °). In addition,
The opening 2a may be formed at a position surrounding the central portion 1a.

Then, using the silicon oxide film 2 having the opening 2a as a mask, p-type impurities such as boron (B) are deposited and thermally diffused, or ion-implanted and annealed to perform p + -type burying. The sacrificial layer 3a is formed (FIGS. 5A, 6A and 7A), and the silicon oxide film 2 is removed by etching.

Although the p + type buried sacrificial layer 3a is formed on the single crystal silicon substrate 1 in the present embodiment, n type impurities such as phosphorus (P) are deposited and thermally diffused or ion-deposited. The n + type buried sacrificial layer may be formed by performing implantation and annealing.

The p + type buried sacrificial layer 3a has a central portion 1
It may extend from the entire outer edge of a to completely surround that portion, or it may extend from a portion of the outer edge. When extending from the whole, the p + -type buried sacrificial layer 3a may have an annular shape, for example, the central portion 1a is circular, and the p + -type buried sacrificial layer 3a is formed by a concentric circle and a central portion. 1a is an annular portion, or the central portion 1a is an inner square, and the p + type buried sacrificial layer 3a is formed by an outer square that is concentric with and has the same direction as that of the inner square. It may be a part. Further, the p + -type buried sacrificial layer 3a may be a portion formed by a portion between the circular central portion 1a and the outer square or the opposite combination, and further, instead of the square, a rectangular shape may be used. Alternatively, an elliptical shape may be used.

Further, the p + type buried sacrificial layer 3a is formed in the central portion 1
p + type buried sacrificial layer 3 when extending from a part of the outer edge of a
a is an equal angle (eg 90 °) around the central portion 1a
The p + type buried sacrificial layer 3a may have four beam shapes facing each other in the central portion 1a (that is, a cross in the central portion). Will be crossed with). In other words, the p + type buried sacrificial layer 3a may extend radially from the central portion 1a, and the number thereof is not limited.

Next, n is formed on one main surface of the single crystal silicon substrate 1 with a thickness corresponding to the bending portion 14 that bends when acceleration is applied.
Type epitaxial layer 4 is formed, and a resist mask (not shown) patterned into a predetermined shape is used to form a p-type impurity such as boron (B) at a position adjacent to the beam portion 14b made of the epitaxial layer 4. P + by performing position and thermal diffusion or ion implantation and annealing
Forming a p + type impurity layer 7 reaching the type buried sacrificial layer 3a,
The resist mask is removed.

In the present embodiment, the p + type impurity layer 7 is formed at a position adjacent to the beam portion 14b, but the present invention is not limited to this, and the flexible portion of the epitaxial layer 4 is formed. It may be formed at a position other than the positions of 14 and the frame 13. Further, although the p + type impurity layer 7 is formed in the present embodiment, an n + type impurity layer may be formed.

Next, a silicon oxide film 8 is formed on both sides by a low pressure CVD method, pyrogenic oxidation or the like, and a protective film 9 such as a silicon nitride film is formed on the silicon oxide film 8 by a low pressure CVD method or the like to form a single crystal. The silicon oxide film 8 / on the two main surfaces of the silicon substrate 1 at a position corresponding to the outer peripheral edge of the weight portion 15.
By removing the protective film 9 by etching, the opening 10
Are formed (FIG. 5 (b), FIG. 6 (b), FIG. 7 (b)).

In the present embodiment, the silicon oxide film 8 / protective film 9 is formed, but the present invention is not limited to this, and only the silicon oxide film 8 or the protective film 9 may be formed. good. However, by forming the silicon oxide film 8 / the protective film 9, it becomes possible to reduce the warp of the beam portion 2b by compressing and pulling (or vice versa) the internal stress of each film.

Next, using the silicon oxide film 8 / protective film 9 having the openings 10 as a mask, potassium hydroxide (KO
H) An anisotropic etch of the single crystal silicon substrate 1 is performed using an alkaline etchant such as a solution until the p + type buried sacrificial layer 3a is reached to form the cut portion 11 (FIG. 5C). FIG. 6C).

Next, the metal wiring 17, the upper stopper junction electrode 18, the movable electrode 19 and the electrode pad 20 are formed on the protective film 9 on the main surface side of the single crystal silicon substrate 1 with gold (Au) or Al.
Etc. (FIG. 5 (d), FIG. 6 (d), FIG.
(C)). At this time, the metal wiring 17, the upper stopper junction electrode 18, the movable electrode 19 and the electrode pad 20 may be formed via a chromium (Cr) film or the like in order to enhance the adhesion to the underlying layer. Further, as a patterning method of the metal wiring 17, the upper stopper bonding electrode 18, the movable electrode 19 and the electrode pad 20, a metal layer is formed by performing vapor deposition, sputtering or the like, and is formed into a predetermined shape by using a photolithography technique and an etching technique. Patterning method, metal wiring 17, upper stopper junction electrode 1 in advance
8. A method of forming a metal layer by forming a metal layer by performing vapor deposition or sputtering after forming a resist or the like other than the position where the movable electrode 19 and the electrode pad 20 are formed, a so-called lift-off method, or the like is known.

Next, the silicon oxide film 8 / protective film 9 on the two main surfaces of the single crystal silicon substrate 1 is removed by etching, and the lower stopper 22 having a recess 22a at a portion corresponding to the weight portion 15 is formed by anodic bonding or the like. The silicon oxide film 8 / protective film 9 on the p + type impurity layer 7 is removed by etching to form an opening (not shown), and a hydrofluoric nitric acid-based etchant is introduced from the opening to form the p + type. The impurity layer 7 is removed by etching to form the etchant introduction port 12 (FIGS. 5E, 6E, and 7D), and the etchant introduction port 12 is formed of an acidic solution containing hydrofluoric acid or the like. An etchant (50% hydrofluoric acid aqueous solution: 69% nitric acid aqueous solution: acetic acid = 1: 1 to 3: 8 volume basis) is introduced to remove the p + type buried sacrificial layer 3a by etching to form the cut groove 3 (Fig. 5 (f), FIG. 6 (f ). Then, desired portions of the silicon oxide film 8 / protective film 9 and the epitaxial layer 4 are removed by etching so as to concentrate the bending on the beam portion 14b of the bending portion 14 to form the slit 21, and the central portion 14a and the beam portion 14b. The beam portion 14b extends between at least a part of the inner peripheral side surface of the frame 13 and the central portion 14a, and the beam portion 14b and the central portion 14a are integrally connected to each other. A weight portion 15 suspended and supported by a neck portion 15a is formed on 14a, and a support member 16 that supports the lower surface side of the frame 13 and surrounds the outer peripheral edge of the weight portion 15 through the cut portion 11 is formed.

Finally, the upper stopper 23 having the concave portion 23a at the position corresponding to the weight portion 15 and having the fixed electrode 24 formed so as to face the movable electrode 19 is joined to the upper stopper joining electrode 18 by anodic bonding or the like. To join. here,
The fixed electrode 24 and the electrode pad 2 are provided on the upper stopper 23.
A contact hole 25 for making contact with 0 is formed. (FIG. 5 (g), FIG. 6 (g), FIG.
(E)).

In this embodiment, the slit 2
If 1 is formed at the same time when the etchant inlet 12 and the cut groove 6 are formed, the number of steps can be reduced.

Although the lower stopper 22 is bonded to the two main surfaces of the single crystal silicon substrate 1 before the etchant inlet 12 is formed, the invention is not limited to this. Lower stopper 22 in the process
May be joined together.

In the case where the etchant introduction port 12 is formed by etching away the portion of the epitaxial layer 4 excluding the frame 13 and the bending portion 14, for example, as shown in FIG. 8, the movable electrode 19 has a weight portion. It will be formed on the upper surface side of 15 (on the side where the epitaxial layer 4 is formed).
Further, in the second embodiment, the slits 21 are formed in the portion adjacent to the beam portion 14b and in the inner peripheral side surface of the frame 13 excluding the portion where the beam portion 14b is formed. As shown in FIG. 9, a portion adjacent to the beam portion 14b and the inner circumferential side surface of the frame 13 include the beam portion 14b.
The slits 21 may be formed at locations other than the locations where they are formed, whereby the volume of the weight portion 15 can be increased and the sensitivity can be improved.

Therefore, in the present embodiment, the etchant introducing port 12 is formed at a position adjacent to the beam portion 14b of the epitaxial layer 4, and the etchant is introduced from the etchant introducing port 12 to form the p + type buried sacrificial layer 3a. Since it is removed by etching, the retention phenomenon of the etchant is eliminated and convection can be performed quickly, and as a result, there is no influence of the liquid composition fluctuation due to the autocatalytic decomposition reaction of nitric acid in the locally closed space, and p + The bending portion 1 can be accurately performed without deteriorating the selectivity between the mold-buried sacrificial layer 3a and the epitaxial layer 4.
4 can be formed.

Since the p + -type impurity layer 7 is a high-concentration impurity layer like the p + -type buried sacrificial layer 3a, the p + -type impurity layer 7 and the p + -type buried sacrificial layer 3a are continuously removed by etching. It can be performed and the process can be shortened.

Further, conventionally, it was necessary to etch in the longitudinal direction of the beam portion 14b, but in the present embodiment, since etching can be performed in the direction perpendicular to the longitudinal direction of the beam portion 14b, the etching distance is shortened. be able to.

Further, in this embodiment, since the change in the electrostatic capacitance between the electrodes (movable electrode 19 and fixed electrode 24) facing each other is converted into an electric signal to detect the acceleration, the piezoresistor 5 is used. The process for forming the diffusion wiring 6 and the contact hole is not required, and the process can be simplified.

Further, in the piezoresistor 5, the sensitivity changes with temperature, but in the present embodiment, the sensitivity does not change with temperature, the sensitivity temperature characteristic becomes good, and the sensitivity setting is adjusted by the inter-electrode gap. Is possible.

In the present embodiment, the conductivity types of the single crystal silicon substrate 1 and the epitaxial layer 4 are n.
Although the mold is used, it is not limited to this, and the opposite conductivity type may be used.

Further, in all the above-mentioned embodiments, the weight portion 15 is supported by the four beam portions 2b, but the present invention is not limited to this, and for example, eight beams and twelve beams are provided. The weight portion 15 may be supported by any number of beam portions 2b such as beams or 16 beams.

Further, in all the above-mentioned embodiments,
The case where the p + type embedded sacrificial layer 3a is used as the sacrificial layer has been described, but the sacrificial layer is not limited to this. If a porous silicon layer is formed as the sacrificial layer, the single crystal silicon substrate 1 and the epitaxial layer 4 are formed. As compared with the above, selectivity of about 150 times or more can be obtained, and the bending portion 14 can be formed with high accuracy.

Here, as a method of forming the porous silicon layer, for example, as shown in FIG. 10, the electrodes 27a and 27b are arranged to face each other in the electrolytic cell 26, and the electrodes 27a and 2 are formed.
7b is connected to an external DC power supply (not shown).
Then, the electrolytic bath 26 is filled with an electrolytic solution 28 containing a strong acid such as a hydrofluoric acid (HF) solution, and a space between the electrodes 27a and 27b is patterned into a predetermined shape on one main surface by a substrate fixing jig 29. A single crystal silicon substrate 1 having a silicon oxide film 2 formed thereon is arranged. And the electrode 27
a voltage is applied to a and 27b to make the electrode 27a a cathode and the electrode 2
By using 7b as an anode, fluorine ions are generated in the electrolytic solution 28, and the fluorine ions are generated in the p + type buried sacrificial layer 3a.
Is dissolved to form a porous silicon layer. Alternatively, the single crystal silicon substrate 1 may be directly made porous by using the anodization method.

Further, in all of the above-described embodiments, the case where the etchant is introduced only from the etchant introduction port 12 has been described, but the present invention is not limited to this, and both the cut portion 11 and the etchant introduction port 12 are provided. It is also possible to introduce an etchant from.

Further, in all the above-mentioned embodiments,
If the metal wiring is arranged so as to pass through the center of gravity of the weight portion 15 and is rotationally symmetric with respect to the center line perpendicular to the sensor, 4
Since the metal wiring is evenly formed on the beam portion 2b of the book, thermal strain is evenly applied, and a structure in which offset is unlikely to occur can be obtained.

[0070]

According to the first aspect of the invention, the step of forming a sacrificial layer at a predetermined position on one side of the semiconductor substrate, the step of forming an epitaxial layer on the side of the semiconductor substrate on which the sacrificial layer is formed, and the epitaxial layer A step of forming a high-concentration impurity layer reaching the sacrificial layer, a step of forming an acceleration detecting section for converting the strain into an electric signal to detect acceleration at a portion corresponding to the bending section of the epitaxial layer, and A step of anisotropically etching a portion corresponding to the outer peripheral edge of the weight portion from a surface side different from the epitaxial layer formation surface of the semiconductor substrate to form a cut portion reaching the sacrifice layer, and cutting and removing the sacrifice layer A step of forming a groove, and a step of etching and removing a desired portion of the epitaxial layer to form a bending portion for suspending and supporting the weight portion and a frame for supporting the bending portion. The method for manufacturing a semiconductor acceleration sensor according to claim 1, comprising a step of forming a high-concentration impurity layer reaching the sacrificial layer in the epitaxial layer, and a step of etching away the high-concentration impurity layer to form an etchant introduction port reaching the sacrificial layer. Since the etching groove is formed by removing the sacrificial layer by introducing the etchant from the etchant introduction port, the etchant can be convected even in the cut groove, and the composition change of the etchant in the closed space is not affected. Thus, it is possible to provide a method for manufacturing a semiconductor acceleration sensor that can maintain the selectivity and can form the flexure portion with high accuracy. Furthermore, a high concentration impurity layer,
Since it is formed at a location adjacent to the flexure,
Remove the sacrificial layer at the bottom of the flexure from both sides of the flexure.
Can reduce the etching time
It

According to a second aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first aspect, a piezoresistor whose resistance value changes due to bending is provided as an acceleration detecting portion at a portion corresponding to the bending portion of the epitaxial layer. Since the acceleration is detected by forming and forming the change in the resistance value of the piezoresistor into an electric signal, the same effect as the invention according to claim 1 can be obtained.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor acceleration sensor according to the first aspect, electrodes that are substantially opposed to each other are formed as the acceleration detecting portion, and the bending portion and / or the weight portion when acceleration is applied. In this case, since the deflection is detected as an electrostatic capacitance change by the electrode to detect the acceleration, in addition to the effect of the invention according to claim 1, the sensitivity temperature characteristic is improved and the piezo resistance is formed. The process can be simplified and the sensitivity setting can be easily adjusted by the gap between the electrodes.

According to a fourth aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to any one of the first to third aspects, a high-concentration impurity layer is formed as a sacrifice layer by impurity diffusion. The same effect as that of the invention according to any one of claims 1 to 3 can be obtained.

According to a fifth aspect of the present invention, in the method for manufacturing a semiconductor acceleration sensor according to any one of the first to third aspects, a high-concentration impurity layer is formed as a sacrificial layer by impurity diffusion, and an anodization method is used. Since the high-concentration impurity layer is made porous to form the porous silicon layer, in addition to the effect of the invention described in any one of claims 1 to 3, the flexure portion can be formed with higher accuracy.

[0075]

According to the sixth aspect of the invention, in the method for manufacturing the semiconductor acceleration sensor according to any of the first to fifth aspects, the high concentration impurity layer and the sacrificial layer are continuously removed by etching. , Claims 1 to 5
In addition to the effects of the invention described in any one of the above, the manufacturing process can be shortened.

[0077]

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a manufacturing process of a semiconductor acceleration sensor according to an embodiment of the present invention.

FIG. 2 is a schematic perspective view showing a partially broken state of the manufacturing process of FIGS. 1 (b) to 1 (h).

FIG. 3 is a schematic perspective view showing a partially broken state of a semiconductor acceleration sensor according to another embodiment of the present invention.

FIG. 4 is a schematic plan view showing a state of the semiconductor acceleration sensor according to the present embodiment as viewed from above.

FIG. 5 is a diagram of a semiconductor acceleration sensor according to the present embodiment.
FIG. 6 is a schematic cross-sectional view showing the manufacturing process at AA ′ in FIG.

FIG. 6 is a diagram of a semiconductor acceleration sensor according to the present embodiment.
FIG. 6 is a schematic cross-sectional view showing the manufacturing process at BB ′ in FIG.

FIG. 7 is a diagram of a semiconductor acceleration sensor according to the present embodiment.
FIG. 8 is a schematic cross-sectional view showing the manufacturing process at CC ′ in FIG.

FIG. 8 is a schematic perspective view showing a partially broken state of a semiconductor acceleration sensor according to another embodiment of the present invention.

FIG. 9 is a schematic perspective view showing a partially broken state of a semiconductor acceleration sensor according to another embodiment of the present invention.

FIG. 10 is a schematic sectional view showing a porous silicon layer forming apparatus according to another embodiment of the present invention.

FIG. 11 is a schematic cross-sectional view showing the manufacturing process of the semiconductor acceleration sensor according to the conventional example.

FIG. 12 is a schematic plan view showing a state of the semiconductor acceleration sensor according to the conventional example as viewed from above.

[Explanation of symbols]

1 Single crystal silicon substrate 1a central part 2 Silicon oxide film 2a opening 3 notch 3a p + type embedded sacrificial layer 4 Epitaxial layer 5 Piezoresistor 6 diffusion wiring 7 p + type impurity layer 8 Silicon oxide film 9 Protective film 10 openings 11 notch 12 Etchant inlet 13 frames 14 Flexible part 14a central part 14b Beam part 15 Weight section 15a neck part 16 Support member 17 Metal wiring 18 Upper stopper junction electrode 19 Movable electrode 20 electrode pads 21 slits 22 Lower stopper 22a recess 23 Upper stopper 23a recess 24 fixed electrode 25 contact holes 26 Electrolyzer 27a, 27b electrodes 28 Electrolytic solution 29 Substrate fixing jig

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takuro Ishida 1048 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Works, Ltd. (56) References JP-A-8-236784 (JP, A) JP-A-5-26754 ( JP, A) JP 5-102495 (JP, A) JP 3-110478 (JP, A) JP 2-81477 (JP, A) JP 3-255369 (JP, A) (58) ) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 29/84 G01L 5/16 G01P 15/125

Claims (6)

(57) [Claims] 1. A step of forming a sacrificial layer at a predetermined position on one side of a semiconductor substrate, a step of forming an epitaxial layer on the side of the semiconductor substrate on which the sacrificial layer is formed, and a step of forming the sacrificial layer on the epitaxial layer. A step of forming a high-concentration impurity layer that reaches, a step of forming an acceleration detecting portion that converts strain into an electric signal to detect acceleration at a portion corresponding to the bending portion of the epitaxial layer, and a weight portion of the semiconductor substrate. A step of anisotropically etching a portion corresponding to the outer peripheral edge of the semiconductor substrate from a surface different from the epitaxial layer forming surface to form a notch reaching the sacrificial layer,
A step of etching away the sacrificial layer to form a groove, and a step of etching away a desired portion of the epitaxial layer to form a bending portion for suspending and supporting the weight portion and a frame for supporting the bending portion. And a step of forming a high-concentration impurity layer reaching the sacrificial layer in the epitaxial layer, and forming an etchant introduction port reaching the sacrificial layer by etching away the high-concentration impurity layer. And a step of
By introducing an etchant from the etchant introduction port, the sacrifice layer is removed by etching to form the cut groove, and the high-concentration impurity layer is formed on the flexible portion.
It is formed at the adjacent location, and the sacrificial layer under the flexible section is
A method for manufacturing a semiconductor acceleration sensor, wherein the hatching is removed from both sides of the same bending portion . 2. A piezoresistor whose resistance value changes due to bending is formed as a portion of the acceleration detecting portion corresponding to the bending portion of the epitaxial layer, and a change in resistance value of the piezoresistor is converted into an electric signal. The method of manufacturing a semiconductor acceleration sensor according to claim 1, wherein the acceleration is detected by performing the above. 3. The acceleration detecting section is provided with electrodes which are arranged substantially opposite to each other, and the bending section and / or
Alternatively, the method of manufacturing a semiconductor acceleration sensor according to claim 1, wherein the deflection of the weight portion is detected by the electrode as a change in electrostatic capacitance to detect acceleration. 4. The method for manufacturing a semiconductor acceleration sensor according to claim 1, wherein a high-concentration impurity layer is formed as the sacrificial layer by impurity diffusion. 5. The porous silicon layer is formed by forming a high-concentration impurity layer by impurity diffusion as the sacrificial layer and making the high-concentration impurity layer porous by an anodization method. A method for manufacturing the semiconductor acceleration sensor according to claim 3. 6. The high-concentration impurity layer and the sacrificial layer,
The method of manufacturing a semiconductor acceleration sensor according to any one of claims 1 to 5 continuously, characterized in that so as to etch away.