JP3493285B2 - Power factor improvement circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power factor correction circuit used for reducing the harmonic distortion of a commercial AC power supply, and more particularly, it improves the overvoltage protection response due to the transient response of the output voltage when the power is turned on. And a power factor correction circuit.

[0002]

2. Description of the Related Art In recent years, even in a switching regulator known as a power supply device for a computer due to regulation of total amount of power supply harmonic distortion of electronic equipment, a power factor correction circuit is provided in an input circuit stage of a commercial power supply for the switching regulator. It is provided. FIG. 8 shows a conventional power factor correction circuit, which is known as a power factor correction active filter circuit. First, the main circuit is provided with a rectifying diode circuit 2 after the noise filter 1, and subsequently, as a C / DC converter, a step-up chopper circuit is constituted by an inductance L1 and an FET-Q1, and a rectifying circuit of a diode D1 and a smoothing circuit of a capacitor C1. Thus, the DC output voltage Eo is obtained.

The control circuit 3 stabilizes the output voltage Eo by PWM control by fixed oscillation, and at the same time improves the power factor by making the input current a sine waveform. That is,
The output voltage Eo is input to the error amplification circuit 15, and the error voltage with respect to the reference voltage Vr1 of the reference power supply 16 is amplified and output. The error voltage is input to the multiplier 6 and full-wave rectified input voltage E
It is multiplied by i and input to the PWM comparator 8 via the adding amplifier 7.

A PWM comparator 8 compares the sawtooth wave oscillation signal from the sawtooth wave oscillator 9 with the output voltage of the multiplier 8 and outputs a PWM signal, and a driver 12 including transistors Q2 and Q3 outputs a booster chopper circuit FET-Q1. Is turned on and off. By controlling the switching of the input current waveform so that the waveform is the same as the waveform obtained by multiplying the output voltage Eo and the input voltage Ei, the input current is approximated to a sine waveform and the force for reducing harmonic distortion is reduced. The rate is improving.

Further, the current of the FET-Q1 is detected by the resistor R8, and the overcurrent protection circuit 11 prevents an excessive current from flowing into the FET-Q1 at a low input voltage. Furthermore, an overvoltage protection circuit 17 is provided. The responsiveness of the output voltage control by the error amplification circuit 15 used for the power factor correction circuit is slower than that of a normal DC / DC converter. The reason for this is that when the error amplification circuit 15 of the power factor correction circuit is made to respond to the frequency of the commercial power source, the input current is distorted from a sine wave, so the response is deteriorated so that it does not respond at the commercial frequency.

Therefore, the output voltage greatly vibrates at the time of start-up, and there is a problem that an excessive output voltage is output due to overshoot, or the circuit of the next stage is stopped due to undershoot, and overshoot is prevented. To prevent this, an overvoltage protection circuit 17 is provided. FIG. 9 is a circuit diagram of a conventional error amplification circuit 15 and overvoltage protection circuit 17.
The error amplifier circuit 15 divides the output voltage Eo by a voltage dividing circuit in which resistors R1 and R2 are connected in series, and the voltage dividing point is divided by the input resistor R3.
Is connected to the inverting input terminal of the start error amplifier 18, and the error voltage with respect to the reference voltage Vr1 of the reference voltage source 16 connected to the non-inverting input terminal is amplified and output.

Further, in order to delay the response of the output voltage control, a capacitor C2 is feedback-connected from the output of the error amplifier 18 to the inverting input terminal to form an integrating circuit.
2 and a low responsiveness that does not respond to the commercial frequency according to the time constant determined by the input resistance R3. The overvoltage protection circuit 17 divides the output voltage Eo by a voltage dividing circuit in which resistors R11 and R12 are connected in series, and the voltage dividing point is connected to the inverting input terminal of the operational amplifier 19 and the non-inverting input terminal of the input resistor R3. The input voltage exceeding the reference voltage Vr2 of the reference voltage source 16 is clamped over the time T1 to prevent the output voltage from overshooting at the time of startup.

FIG. 10 shows a transient response waveform of the output voltage Eo at the time of start-up. Since the response of the output voltage control of the error amplification circuit 15 is delayed, the output voltage Eo is the reference voltage Vr1.
Based on the above, hunting is greatly performed with respect to the set value Er to cause overshoot. A clamp level Er2 based on the reference voltage Vr2 of the overvoltage protection circuit 7 is set for this overshoot, and the overshoot of the output voltage Eo exceeding the clamp level Vr2 is clamped for T time to perform overvoltage protection.

[0009]

However, in the conventional overvoltage protection circuit of the power factor correction circuit as described above,
In addition to the error voltage circuit 15, an overvoltage protection circuit using the voltage dividing resistors R11 and R12, the reference voltage source 20, and the operational amplifier 19 is separately required, which causes a problem that the circuit configuration becomes complicated and the cost increases.

Although overshooting can be prevented as shown in the figure, it has no effect on undershooting, and the output voltage Eo drops due to undershooting due to slow response, and the switching of the next stage There is a problem that circuits such as regulators are temporarily stopped. The present invention has been made in view of such conventional problems. Even if the response of the output voltage control at the normal time is slowed for improving the power factor, the overshoot and the undershoot at the start are dedicated. An object of the present invention is to provide a power factor correction circuit which can be easily and surely prevented without providing a clamp circuit or the like.

[0011]

To achieve this object, the present invention is constructed as follows. First, according to the present invention, a DC / DC converter is connected in series with a full-wave rectifier circuit to control a DC output voltage at a constant voltage, and an AC input current waveform is set to a waveform close to a sine wave of an AC input voltage waveform. DC
The target is a power factor correction circuit that constitutes an active filter circuit that controls switching of a converter.

According to the present invention regarding such a power factor correction circuit, the output DC voltage of the DC / DC converter is input through an input resistor to detect an error from a predetermined reference voltage, and a feedback circuit is provided. For an error amplifier for constant voltage control that constitutes an integrating circuit with a time constant determined by the connected capacitor and input resistance, a transient waveform of the output DC voltage when the power is turned on is displayed as an oscillation waveform centered on the reference voltage at the input resistance. It is characterized in that a response improving circuit is provided for reducing the time constant of the integrating circuit and improving the responsiveness by short-circuiting the input resistance when the generated transient response voltage exceeds a predetermined positive or negative voltage.

That is, in the present invention, attention is paid to the fact that no voltage is applied to the input resistance of the error amplifier in the steady state, and the voltage is applied to the input resistance 4 only during the transient response. When the voltage due to overshoot appears,
Each time when the voltage due to the inter-shoot appears, the input resistor is equivalently short-circuited and the time constant τ of the integrating circuit is
CR is reduced, and the output voltage control response is temporarily improved to suppress overshoot and undershoot.

Therefore, there is no need for a dedicated control circuit for clamping the overshoot wrinkle of the output voltage at the time of transition,
Further, it is possible to easily realize the clamp of the output voltage at the time of transient operation with respect to both the overshoot in the plus direction and the undershoot in the minus direction. The response improvement circuit is composed of, for example, a pair of diodes reversibly connected in parallel with the input resistance of the integrator circuit, and one of the diodes is made conductive when the positive voltage generated across the input resistance exceeds the diode forward voltage. Then, the input resistance is short-circuited, and when the negative voltage generated across the input resistance exceeds the diode forward voltage, the other diode is turned on to short-circuit the input resistance.

Further, since the response improving circuit enables the response improving operation even if the voltage widths of the overshoot and the undershoot are small, the voltage dividing side first voltage dividing resistor and the low voltage side resistor are connected to the error amplifier via the input resistor. Since the output voltage is divided and input by the resistance voltage dividing circuit in which the second voltage dividing resistors are connected in series, the response improving circuit includes a pair of diodes, and one of the two is connected by the positive voltage applied to the input resistance. The cathode of the diode is connected to the error amplifier side of the input resistor, and the anode side is connected between the first bias resistor connected in series with the first voltage dividing resistor on the high voltage side of the voltage dividing resistor circuit and added to the input resistor. A first via in which the node of the other diode which conducts at the negative voltage is connected to the error amplifier side of the input resistor and the anode side is connected in series to the second voltage dividing resistor on the low voltage side of the voltage dividing resistor circuit. Connected between the resistance.

In this case, it becomes easier to turn on the voltage applied by the overshoot or undershoot of the pair of diodes by the bias amount of the first and second bias resistors, and the overshoot and the overshoot with respect to the specified output voltage determined by the reference voltage for error amplification and The width of the undershoot can be further suppressed. On the contrary, when it is desired to widen the voltage range of overshoot and undershoot due to response improvement, the response improvement circuit is equipped with a pair of diodes, and the cathode of one diode conducting at the positive voltage applied to the input resistance is connected to the input resistance. Connected to the error amplifier side and the anode side to the first bias resistor connected in series to the second voltage dividing resistor on the low voltage side of the voltage dividing resistor circuit, and conducted by the negative voltage applied to the input resistor. The anode of the other diode is connected to the error amplifier side of the input resistor, and the cathode side is connected between the first bias resistor connected in series with the high voltage side first voltage dividing resistor of the voltage dividing resistor circuit.

In this case, it becomes difficult to turn on the voltage applied by the overshoot or undershoot of the pair of diodes by the amount of the reverse bias generated by the first and second bias resistors, and it becomes difficult to turn on the specified output voltage determined by the reference voltage for error amplification. The width of overshoot and undershoot can be widened. In addition, the response improvement circuit connects the anode and cathode of a pair of diodes to the error amplifier side of the input resistance and divides the output voltage of the cathode-anode on the opposite side to set a predetermined bias voltage division voltage Connect to the voltage dividing point of the circuit. In this way, by setting an arbitrary voltage dividing point independently of the error amplifier in the response improving circuit, the response improving circuit can divide the undershoot and overshoot centering on the voltage dividing point input to the error amplifier. It is possible to offset the pressure point and suppress overshoot and undershoot non-symmetrically.

[0018]

1 is a circuit block diagram of a power factor correction circuit according to the present invention. The power factor correction circuit is realized as an active filter circuit for power factor correction, and in this embodiment, a boost chopper circuit is used as a boost type DC / DC converter in the main circuit.

That is, the main circuit is provided with a noise filter 1 having a choke coil following the AC input terminal, a noise filter 1 and a rectifying diode circuit 2 as a full-wave rectifying circuit using a diode bridge. And choke coil L1 and FET-Q as a switching element
The step-up chopper circuit of No. 1 is provided, the rectifying diode D1 and the smoothing capacitor C1 are connected to the output stage, and the DC output voltage E
I'm getting o.

The control circuit unit 3 stabilizes the output voltage by PWM control by fixed oscillation and performs power factor improvement control for making the input current closer to a sine waveform by average power control. Therefore, the control circuit 3 includes the error amplification circuit 4, the multiplier 6, the addition amplifier 7, the PWM comparator 8, the sawtooth oscillator 9, the overcurrent protection circuit 11, and the transistors Q2 and Q3.
The driver 12 is provided with.

In the present invention, the control circuit 3 is not provided with the overvoltage protection circuit as in the conventional case, but instead, the response improvement circuit 13 is newly provided at the input stage of the error amplification circuit 4. Further, the current flowing through the FET-Q1 is detected by the resistor R8, and the overcurrent protection circuit 11 prevents an excessive current at a low input voltage value from flowing through the FET-Q1. FIG. 2 is a circuit diagram of the error amplifying circuit 14 and the response improving circuit 13 of FIG. 1 according to the first embodiment. The error amplifier circuit 4 includes an error amplifier 14
The output voltage Eo is divided by a voltage dividing circuit in which resistors R1 and R2 are connected in series, and is input to the inverting input terminal via the input resistor R3. The reference voltage source 5 is connected to the non-inverting input terminal of the error amplifier 14 and sets the reference voltage Vr for keeping the output voltage Eo at a specified value. Further error amplifier 1
A capacitor C2 is connected to the feedback circuit from the output of 4 to the inverting input terminal.

In the constant voltage control of the output voltage in the power factor correction circuit, the power factor correction effect cannot be obtained if the voltage control has a response to the AC power supply frequency.
The feedback connection of the error amplifier 14 serves as an integrating circuit to slow the response. In this case, the response is capacitor C
2 and the time constant τ of the input resistance R3. A response improvement circuit 13 is newly provided in the present invention for such an error amplification circuit 4. In the first embodiment, the response improvement circuit 13 connects the diodes D2 and D3 in parallel with the input resistor R3 of the error amplifier 14 with their connection polarities reversed.

That is, the diode D2 has its cathode connected to the inverting input terminal of the error amplifier 14 of the input resistor R3, and its anode connected to the voltage dividing point side of the resistors R1 and R2. The diode D3 has its anode side connected to the inverting input terminal side of the error amplifier 14 and its cathode side connected to the voltage dividing point side of the resistors R1 and R2. Next, the operation of the first embodiment of FIG. 2 will be described. Since the output voltage Eo does not fluctuate during the steady state after the power is turned on, the divided voltage Eo1 by the voltage dividing resistors R1 and R2 is equal to the reference voltage Vr of the reference voltage source 5,
No voltage is generated across the input resistor R3.

Therefore, the diodes D2 and D3 are both off, and the error amplifier 14 operates as an integrating circuit having a time constant τ determined by the input resistor R3 and the capacitor C2, and the frequency of the commercial power source (50-60 Hz). ), The input current waveform can be controlled to a sine waveform similar to the input voltage to improve the power factor. in this case,
If the responsiveness of the output voltage control responds in the frequency band of the commercial power supply, the output voltage Eo is controlled with priority over the control of the input current waveform in a similar form to the input voltage waveform. , The input current waveform is not similar to the input voltage waveform, and it is not a power factor correction circuit but a normal DC / D
It will operate as a C converter.

Next, the operation at the time of starting when the AC power is turned on will be described. FIG. 3 is a time chart of the control characteristic of the output voltage at the time of startup in the second embodiment of FIG. The error voltage circuit 4 shown in FIG. 2 has an integrator circuit configured by an input resistor R3 and a feedback capacitor C2 so as not to respond to the power supply frequency in order to improve the power factor. When Eo fluctuates, poor response is a disaster, and large overshoot and undershoot occur in the output voltage Eo.

In order to prevent overshoot and undershoot that occur in the output voltage at the time of starting, the input resistance R
3 is provided with a response improving circuit 13 in which diodes D2 and D3 are connected in reverse polarity in parallel. This response improvement circuit 13
Uses the fact that a DC voltage is generated in the input resistor R3 due to the fluctuation of the output voltage during the transient, and the diodes D2 and D3 are
Is turned on, the input resistance R3 is short-circuited and the input resistance R4 is equivalently set to zero.
To improve the response of output voltage control. Of course, the control of making the input current waveform similar to the output voltage waveform for improving the power factor is released while the response by turning on the diode D2 or D3 is enhanced.

The specific description of FIG. 3 is as follows. The output voltage Eo rises toward the set value Er determined by the reference voltage Vr due to the start-up upon power-on, and in this case, the time constant of the error amplifier 14 is a large value that does not respond to the power supply frequency determined by the capacitor C2 and the resistor R3. Therefore, overshoot is caused by exceeding the specified value Er. In this way, when the output voltage Eo exceeds the specified value Er and causes an overshoot, the divided voltage corresponding to the overshoot from the reference voltage Vr is added to the diode D2 as the forward bias voltage, and the specified bias voltage + Vd.
Then, the diode D2 becomes conductive and shorts the resistor R3.

Therefore, the time constant τ of the integrating circuit which constitutes the error amplifier 14 becomes small because the input resistance R3 becomes zero due to the conduction of the diode D2, and the control response of the output voltage is enhanced and the diode The forward bias voltage + Vd for maintaining the conduction of D2 is maintained, and the overshoot clamp operation is performed over the clamp feedback T11.

Then, the overshooted output voltage E
When o undershoots below the specified value Er, the voltage dividing point Eo1 also drops, so that a voltage of the opposite polarity to that at the time of overshoot is generated across the input resistor R3, and this time the diode D3 is biased. Like When the bias voltage of the diode D3 becomes the specified bias voltage −Vd as shown in FIG. 3, the diode D3 becomes conductive and equivalently short-circuits the input resistor R3 to zero, and as a result, the time constant τ of the integrating circuit becomes Smaller to improve responsiveness, the reference voltage V
The output voltage Eo is clamped over the clamp period T21 at a clamp level corresponding to a level lower than the forward bias voltage -Vd by r.

When the output voltage Eo recovers again and overshoots, and the diode D2 is turned on at the forward bias voltage + Vd, the time constant of the integrating circuit is lowered over the clamp period T12 during that period, and the response voltage is increased. Control is performed. In this way, when the output voltage Eo converges to the set value determined by the reference voltage Vr in the steady state, the diodes D2 and D3 do not turn on, the time constant τ as the integrating circuit increases, and the output voltage Eo remains constant. Therefore, the power factor correction control for controlling the input current waveform to be similar to the input voltage waveform is preferentially performed.

FIG. 4 is a circuit diagram of a second embodiment of the error amplification circuit 4 and the response improvement circuit 13 of FIG. In the second embodiment, the resistors R4 and R5 are further connected to the connection part for the voltage dividing circuit in which the resistors R1 and R2 of the diodes D2 and D3 provided in the response improvement circuit 13 are connected in series. Characterize. If the resistor R1 of the voltage dividing circuit with respect to the inverting input terminal of the error amplifier 14 is the first resistor and the resistor R2 of the voltage dividing circuit is the second resistor, the first bias resistor R4 is connected in series with the first resistor R1. The anode of the diode D2 is connected to the connection point. The second bias resistor R5 is connected in series to the second voltage dividing resistor R2 on the constant voltage side with respect to the voltage dividing point of the voltage dividing circuit, and the diode D3 is connected to the connecting point.
The cathode of is connected.

Therefore, the voltage dividing resistor circuit has resistors R1 and R
4, R5 and R2 are connected in series, and the connection point between the resistors R4 and R5 is the divided voltage E of the output voltage Eo with respect to the input resistor R3.
becomes o1, and resistors R4 and R5 respond to this divided voltage Eo1.
The diode D2 is (Eo1 + ΔV)
And the diode D3 side has a voltage of (Eo1-ΔV).

Therefore, the diode D2 is always connected to the resistor R4.
Is fixedly biased in the forward direction by the voltage ΔV between both ends, and similarly, the diode D3 is also fixedly biased in the forward direction by the voltage ΔV across the resistor R5, and the overshoot of the output voltage E0 at the time of start-up. With respect to the undershoot, the diodes D2 and D3 are easily conducted by the fixed bias voltage ΔV. That is, the forward bias voltages of the diodes D2 and D3 with respect to the reference voltage Vr in FIG. 2 are + Vd and −Vd, respectively.
In the embodiment, it is ± (Vd−ΔV), and the fluctuation range of overshoot and undershoot can be suppressed small.

FIG. 5 shows a third embodiment of the error amplification circuit 4 and the response improvement circuit 13 of FIG. In the third embodiment, the voltage dividing circuit for the output voltage Eo has a first voltage dividing resistor R1, a first bias resistor R4, a second bias resistor R5, and a second voltage dividing resistor R1 as in the second embodiment shown in FIG. Although the piezoresistor R2 is connected in series, with respect to the diode D2 and the diode D3 in which the inverting input side of the error amplifier 14 of the input resistor R3 is commonly connected, the cathode of the diode D2 which conducts by overshoot is divided by the resistors R5 and R2. It is characterized in that the cathode of the diode D3 connected to the pressure point and conducting undershoot is connected to the voltage dividing point of the resistors R1 and R4.

Here, the three voltage dividing points by the series connection of the resistors R1, R4, R5 and R2 are (Eo1 + ΔV), (Eo1
-ΔV), a bias voltage is applied to the diodes D2 and D3 in the reverse direction by a voltage ΔV across the terminals determined by the resistors R4 and R5. For this reason, in the overshoot and undershoot at the time of starting when the power is turned on, the diode D2 with respect to the divided midpoint voltage Eo
When the forward voltage is Vd, it conducts when an overshoot of (Vd + ΔV) is obtained, and the time constant τ is reduced by short-circuiting the resistor R4.

In the diode D3, when the forward voltage is Vd, the reference voltage Vr becomes (Vd + ΔV).
Conducts when an undershoot occurs in the-direction centered on, and shorts the input resistor R3 to reduce the time constant τ of the integrating circuit. Therefore, in the third embodiment of FIG. 5, it is difficult to turn on the diodes D2 and D3 by the voltage ΔV across the first and second bias resistors R4 and R5 as compared with the first embodiment of FIG. I understand. by this,
It is possible to widen the width of overshoot and undershoot to apply the clamp.

FIG. 6 shows a fourth embodiment of the error voltage circuit 4 and the response improving circuit 13 of FIG. In the fourth embodiment, the response improving circuit 13 is also provided with a dedicated voltage dividing circuit for connecting the resistors R6 and R7 in series to set the divided voltage Eo2.
At the voltage dividing point of this voltage dividing circuit, the error amplifier 14 of the input resistor R3
Is characterized in that the anode and the cathode on the opposite side of the diodes D2 and D3, in which the cathode and the anode are commonly connected to the inverting input terminal side, are commonly connected.

As described above, by providing the dedicated voltage dividing circuit in the response improving circuit 13 and setting the divided voltage Eo2, the divided voltage Eo1 determined by the voltage dividing resistors R1 and R2 is made to coincide with the reference voltage Vr. Diode D for output voltage control
It is possible to offset the voltage dividing point Eo2 that is the reference level of overshoot and undershoot by D2 and D3.

FIG. 7 is a time chart of the control characteristic of the output voltage response at the time of startup of the fourth embodiment of FIG. This control characteristic requires the set value Erd based on the reference voltage level Vrd of the diodes D2 and D3 by the voltage division of the voltage dividing resistors R6 and R7 with respect to the set value Er of the output voltage Eo based on the reference voltage Vr. It is offset accordingly.

Therefore, with respect to the transient response of the output voltage Eo when the power is turned on, the overshoot clamp periods T11 and T1 in which the voltage widths of the overshoot and the undershoot are different with respect to the set value Er corresponding to the reference voltage Vr.
2, T13 and an asymmetrical clamp characteristic such as the undershoot clamp period T21 can be obtained. For example, when it is desired to sufficiently suppress the overshoot but there is not much problem with the undershoot, the clamp characteristic by conduction of the diodes D2 and D3 having the offset as shown in FIG. 7 is set. On the contrary, when it is desired to clamp the undershoot more than the overshoot, the reference bias level Vrd corresponding to the divided voltage Eo2 of the voltage dividing resistors R6 and R7 is set to the reference voltage Vr of the reference voltage source 5.
It suffices to determine the resistance value so that it is set to a higher level.

In the above embodiment, with respect to the capacitor C2 and the input resistor R3 which form the integrating circuit of the error amplifier 14, the diodes D2 and D3 are connected in parallel in parallel with the input resistor R3 with opposite polarities. Although the above example is taken as an example, in order to appropriately select the forward voltage for conducting the diodes D2 and D3, a plurality of diodes may be connected in series corresponding to the forward voltage.

By implementing each of the diodes D2 and D3 by a series connection circuit of a plurality of diodes, a reference voltage V for overshoot and undershoot is obtained.
The clamp width centered on r can be adjusted appropriately. In the embodiment of FIG. 1, a boost chopper circuit as a boost type DC / DC converter is used as an example of the main circuit. However, in addition to this, a current resonance type DC / DC converter is used for the main circuit. Of course, it is possible.

Further, in the embodiment of FIG. 1, the current of the input line and the current of the FET-Q1 are detected by the resistor R8. However, the current transformer converts the voltage signal into a voltage signal for overcurrent protection. Of course, you can.

[0044]

As described above, according to the present invention, in the transient response state of the output voltage due to power-on, the input resistance of the error amplifier constituting the integrating circuit for controlling the output voltage is caused by the overshoot. When the voltage appears and when the voltage due to the undershoot appears, the response is enhanced by shortening the time constant by short-circuiting the input resistance equivalently using the conduction of the diode, thereby increasing the overshoot and A clamp operation that suppresses undershoot is realized, and a circuit configuration can be simplified and cost can be reduced because a dedicated control circuit that suppresses overshoot is not required unlike the related art.

Further, the clamp operation for operating the clamp of the output voltage in the transient response at the time of starting the power supply in both the + direction overshoot and the-direction undershoot can be easily realized, and not only the circuit protection by the overshoot clamp can be achieved. , It is possible to reliably prevent the trouble that the circuit such as the switching regulator provided in the next stage stops due to the undershoot clamp,
A highly reliable power factor correction circuit can be obtained.

[Brief description of drawings]

FIG. 1 is a circuit block diagram of a power factor correction circuit according to the present invention.

FIG. 2 is a circuit diagram of a first embodiment of an error amplification circuit and a response improvement circuit of FIG.

FIG. 3 is a time chart of control characteristics with respect to transient response of output voltage according to the embodiment of FIG.

FIG. 4 is a circuit diagram of a second embodiment of the error amplification circuit and the response improvement circuit of FIG.

5 is a circuit diagram of a third embodiment of the error amplification circuit and the response improvement circuit of FIG.

6 is a circuit diagram of a fourth embodiment of the error amplification circuit and the response improvement circuit of FIG.

7 is a time chart of control characteristics with respect to transient response of output voltage according to the embodiment of FIG.

FIG. 8 is a circuit block diagram of a conventional power factor correction circuit.

9 is a conventional circuit diagram of the error amplification circuit and the response improvement circuit of FIG.

10 is a time chart of control characteristics with respect to transient response of output voltage according to the conventional example of FIG.

[Explanation of symbols] 1: Noise filter 2: Rectifier diode circuit (full-wave rectifier circuit) 3: Control circuit 4: Error amplification circuit (output voltage control circuit) 5: Reference voltage source 6: multiplier 7: Summing amplifier 9: Oscillator 11: Overcurrent protection circuit 12: Driver 13: Response improvement circuit 14: Error amplifier L1: Inductance Q1: FET D1: Rectifying diode C1: Smoothing capacitor D2, D3: Diode R1, R2: Dividing resistance R3: Input resistance R8: Input current detection resistor C2: Capacitor

Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H02M 3/155 H02J 3/01 H02J 3/18 H02M 1/12

Claims (3)

(57) [Claims] 1. A DC / DC converter is connected in series with a full-wave rectifier circuit to control a DC output voltage at a constant voltage and to make an AC input current waveform a waveform close to a sine wave of an AC input voltage waveform. In a power factor correction circuit comprising an active filter circuit for switching control of a DC / DC converter, an output DC voltage of the DC / DC converter is input via an input resistor to detect an error from a predetermined reference voltage and A constant voltage control error amplifier that constitutes an integration circuit of a time constant determined by a capacitor connected to a feedback circuit and the input resistance, and in the transient response state of the output DC voltage when power is turned on, When the transient response voltage generated as an oscillating waveform centered on the reference voltage exceeds a predetermined positive or negative voltage, the input resistor is short-circuited to time the integration circuit. And a response improvement circuit for improving the response decreases the provided said error amplifier, a first step-down side through the input resistor
A resistance component in which a voltage dividing resistor and a second voltage dividing resistor on the low voltage side are connected in series.
The output voltage is divided by the voltage circuit and input.
Answer The improvement circuit comprises a pair of diodes,
The cathode of one diode that conducts at a positive voltage applied to
Connected to the error amplifier side of the input resistor and
The node side is the first voltage dividing resistor on the high voltage side of the voltage dividing resistor circuit.
And a first bias resistor connected in series with
The other diode that conducts at the negative voltage applied to the input resistance.
Connect the cathode of the cathode to the error amplifier side of the input resistor.
And the anode side is the second side of the low voltage side of the voltage dividing resistor circuit.
Connected to the first bias resistor connected in series with the voltage dividing resistor
Power factor correction circuit, characterized in that the. 2. A DC / DC converter in series with a full-wave rectifier circuit.
Connected to control the DC output voltage at a constant voltage
The input current waveform is a waveform close to the sine wave of the AC input voltage waveform.
To switch the DC / DC converter to
Power factor correction circuit that constitutes an active filter circuit
At this time, the output DC voltage of the DC / DC converter is input to the input resistance.
Input via the
In addition, it is decided by the capacitor connected to the feedback circuit and the input resistance.
Increased error for constant voltage control with integral time constant integrating circuit
In the transient response state of the output DC voltage when the power is turned on,
As a vibration waveform centered on the reference voltage in the input resistance
When the generated transient response voltage exceeds the specified positive and negative voltage
Shorting the input resistance reduces the time constant of the integrating circuit
And a response improving circuit for improving responsiveness .
A resistance component in which a voltage dividing resistor and a second voltage dividing resistor on the low voltage side are connected in series.
The output voltage is divided by the voltage circuit and input.
Answer The improvement circuit comprises a pair of diodes,
The cathode of one diode that conducts at a positive voltage applied to
Connected to the error amplifier side of the input resistor and
The node side is the second voltage dividing resistor on the low voltage side of the voltage dividing resistor circuit.
And a first bias resistor connected in series with
The other diode that conducts at the negative voltage applied to the input resistance.
The node of the input terminal to the error amplifier side of the input resistor.
And the anode side is the first side of the high voltage side of the voltage dividing resistor circuit.
Connected to the first bias resistor connected in series with the voltage dividing resistor
Power factor correction circuit, characterized in that the. 3. A DC / DC converter connected in series with a full-wave rectifier circuit.
Connected to control the DC output voltage at a constant voltage
The input current waveform is a waveform close to the sine wave of the AC input voltage waveform.
To switch the DC / DC converter to
Power factor correction circuit that constitutes an active filter circuit
At this time, the output DC voltage of the DC / DC converter is input to the input resistance.
It is input via the detector to detect an error from the specified reference voltage, and it is also connected to the feedback circuit.
A time constant integration circuit that is determined by the sensor and the input resistance.
In the transient response state of the output DC voltage when the power is turned on , the error amplifier for constant voltage control
Said reference voltage to fill force resistance as centered as the vibration waveform
When the generated transient response voltage exceeds the specified positive and negative voltage
Shorting the input resistance reduces the time constant of the integrating circuit
And a response improving circuit for improving responsiveness. The response improving circuit is provided on the error amplifier side of the input resistor.
While connecting the anode and cathode of the pair of diodes
The cathode-anode on the opposite side divides the output voltage
At the voltage dividing point of the bias voltage dividing circuit that sets the bias voltage
Power factor correction circuit characterized by being connected .