JP3466846B2 - Imaging device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup device.

[0002]

2. Description of the Related Art FIG. 6 is a block diagram of a conventional image pickup apparatus.

In FIG. 6, 1 is a lens, 2 is an iris, 3 is an image pickup device such as a CCD, 4 is a timing pulse generator (hereinafter referred to as TG), 5 is a double correlation sampling and automatic gain control circuit (hereinafter referred to as CDS). / AG
C circuit), 6 is an ADC (Analog to Digital C) that converts an analog signal into a digital signal.
7) is a first signal processing circuit, 8 is a motion detection circuit, 9 is a field memory, 10 is a second signal processing circuit, and 11 is a DAC (Digital to Anal).
og Converter), 12 is a microcomputer, and 13 is an iris drive circuit. The microcomputer 12 has a CPU and a memory necessary for the operation of this CPU, and this memory has a CPU as shown in FIG.
The control procedure of is stored.

In FIG. 6, light from a subject enters the image pickup device 3 through the lens 1 and the iris 2. The incident light is photoelectrically converted in the image pickup device 3, and the video signal is converted into CDS / A at a predetermined timing driven by the TG 4.
It is output to the GC circuit 5. The CDS / AGC circuit 5 performs well-known double correlation sampling to extract the signal component of the output from the image pickup device 3 and the microcomputer 12
The signal is amplified by the amplification factor specified by and output to the ADC 6. The ADC 6 converts the input analog signal into a digital signal and outputs the digital signal to the first signal processing circuit 7. The first signal processing circuit 7 performs color signal generation, luminance signal generation, etc., outputs a motion detection luminance signal to the motion detection circuit 8, outputs AE control luminance information to the microcomputer 12, and a luminance signal to the field memory 9. And a color signal.

The motion detection circuit 8 detects the motion information of the image by using the motion detection luminance signal input from the first signal processing circuit 7 by a known technique such as a pattern matching method, and sends it to the microcomputer 12. The microcomputer 12 estimates the camera shake direction and the camera shake amount when the photographer shoots from the motion information of the image obtained from the motion detection circuit 8, and based on this estimation, the brightness signal and the color signal input to the field memory 9. Correct the camera shake by changing the read position of. Further, the microcomputer 12
Compares the brightness information for AE control obtained from the first signal processing circuit 7 with a predetermined reference level, controls the amplification factor of the CDS / AGC circuit 5 based on the comparison result, and controls the iris driving circuit 13 The iris 2 is controlled through so that the AE luminance information matches the reference level.

The second signal processing circuit 10 adds to the luminance signal and the color signal output from the field memory 9 an enlarging process and other predetermined process corresponding to the camera shake correction, and D
Output to AC11. The DAC 11 is the second signal processing circuit 1
The luminance signal and color signal obtained from 0 are converted from a digital signal into an analog signal and output to a VTR or the like.

FIG. 7 is a diagram showing an outline of a processing flow of the microcomputer 12 in FIG. Figure 7 below
Will be explained step by step.

The processing flow starts at (7-1) (7-
Proceed to 2). In (7-2), a predetermined initial setting is performed and the process proceeds to (7-3). In (7-3), it is judged whether or not the acquisition of the motion information from the motion detection circuit 8 in FIG. 6 is completed. If completed, the process proceeds to (7-4), and if not completed, the process proceeds to (7-3) above. Return.

In (7-4), the motion information is calculated to estimate the camera shake direction and camera shake amount, and the process proceeds to (7-5). (7-
In 5), calculation for changing the read position of the luminance signal and the color signal input to the field memory 9 is performed based on the camera shake direction and camera shake amount estimated in (7-4),
The field memory 9 is controlled so that the luminance signal and the color signal are read out at a predetermined timing from the read position based on the calculation result, and the process proceeds to (7-6). (7-6)
Then, it is judged whether or not the acquisition of the AE control brightness information from the first signal processing circuit 7 is completed, and if it is completed (7
Proceed to (7), and if not completed, return to (7-6) above. At (7-7), the brightness information for AE control is compared with a predetermined reference level, and the process proceeds to (7-8). (7-8)
Then, based on the comparison result of (7-7) above, CDS / AG
In addition to controlling the amplification factor of the C circuit 5, a control signal is output to the iris driving circuit 13 for controlling the iris 2 and the process returns to (7-3).

FIG. 8 is a conceptual diagram for explaining the timing of image stabilization processing and AE processing in the prior art.
In an actual circuit, a signal delay occurs in each part, but this delay is ignored in FIG. 8 for the sake of simplicity of explanation. FIG. 8 will be described below.

(8-a) is a vertical synchronizing signal (negative polarity),
(8-b) is the output signal of the CDS / AGC circuit 5, (8-
(c) is the image stabilization period of the microcomputer 12, (8
-D) is the AE processing period of the microcomputer 12,
(8-e) shows the output signals of the DAC 11, respectively. The following description will be made focusing on the period (8-b) n (a period excluding the vertical synchronization period within one field period).

The CDS / AGC output signal in the period n of (8-b) is input to the motion detection circuit 8 and the field memory 9 through the ADC 6 and the first signal processing circuit 7. After all the motion detection luminance signals corresponding to the period (8-b) n have been input, the motion detection circuit 8 performs motion detection processing and passes the motion detection information to the microcomputer 12. The microcomputer 12 has a period n of (8-c),
That is, the processes (7-3) to (7-5) of FIG. 7 are performed during the vertical synchronization period immediately after the period (8-b) n. By these processes, the signal of the period n of (8-e) is obtained.

On the other hand, from the first signal processing circuit 7, (8-
A short time after the end of the period n of b), the brightness information for AE control of the period n of (8-b) can be passed to the microcomputer 12. The microcomputer 12 (8-
In period n of d), from (7-6) to (7-8) of FIG.
Process.

[0014]

However, in the above conventional example, as shown in (8-c) of FIG. 8, the period during which the image stabilization processing of the microcomputer 12 is performed is limited to a very short vertical synchronization period. Therefore, the microcomputer 12 must have a high processing speed. Therefore, it has been a cause of cost increase. Also, FIG.
As shown in (8-d), the AE processing period is substantially the next field period, so that extra consideration must be taken into the design of the AE control.

Therefore, an object of the present invention is to provide an image pickup apparatus which solves the above problems.

[0016]

In order to achieve the above object, the invention of claim 1 is characterized in that an image pickup device, a readable / writable storage device, and a video signal from the image pickup device are processed and stored in the storage device. A first signal processing unit for writing at a rate of 1, a second signal processing unit for reading out a video signal from the storage unit at a second rate, and a function related to imaging based on a signal from the first signal processing unit. A function control means, wherein the first rate is faster than the second rate.

Further, the invention of claim 2 is characterized in that, in claim 1, the function control means includes a shake correction means for a captured image from the image sensor.

Further, the invention of claim 3 is characterized in that, in claim 1, the function control means includes an automatic exposure correction means for the image pickup device.

Furthermore, the invention of claim 4 is characterized in that, in claim 1, the function control means includes an automatic focus correction means in the image pickup device.

Further, the invention of claim 5 is characterized in that, in claim 1, the function control means includes an automatic white balance correction means for a video signal from the image pickup device.

Furthermore, the invention of claim 6 is characterized in that, in claim 1, the first rate is at least twice as high as the second rate.

Further, the invention of claim 7 is an image pickup device,
A readable / writable storage unit, a unit that reads out video signals from two lines simultaneously from the image sensor, a first signal processing unit that processes the video signals that are read out simultaneously from the two lines and writes the video signals in the storage unit, and the storage unit. It is characterized by further comprising: second signal processing means for reading a video signal from the device; and function control means for controlling a function relating to imaging based on a signal from the first signal processing means.

Further, the invention of claim 8 is characterized in that, in claim 7, the function control means includes a shake correction means for a captured image from the image sensor.

Further, the invention of claim 9 is characterized in that, in claim 7, the function control means includes an automatic exposure correction means for the image pickup device.

Furthermore, the invention of claim 10 is characterized in that in claim 7, the function control means includes an automatic focus correction means in the image pickup device.

Further, the invention of claim 11 is characterized in that in claim 7, the function control means includes an automatic white balance correction means for the video signal from the image pickup device.

[0027]

DETAILED DESCRIPTION OF THE INVENTION

(First Embodiment) FIG. 1 is a block diagram for explaining the first embodiment of the present invention. In the figure, the parts with the same numbers as those in FIG. 6 have the same functions as those in FIG. Is to have.

Reference numeral 14 denotes a memory having a capacity larger than that of the field memory 9 shown in FIG. 6, and the capacity is appropriately selected according to the frequencies fck1 and fck2 in the figure. The memory in the microcomputer 12 stores the control procedure of the CPU as shown in FIG.

The first embodiment of the present invention will be described below with reference to FIG.

In FIG. 1, light from a subject enters the image sensor 3 through the lens 1 and the iris 2. In the image sensor 3, the incident light is photoelectrically converted and the frequency fck1
The video signal is output to the CDS / AGC circuit 5 in response to a predetermined timing driven by the TG 4 which operates based on the above. In the CDS / AGC circuit 5, the frequency fck1
Image pickup device 3 which performs well-known double correlation sampling based on
The signal component of the output from is extracted, and the signal is amplified by the amplification factor specified by the microcomputer 12 and AD
Output to C6. The ADC 6 converts the input analog signal into a digital signal based on the frequency fck1 and outputs the digital signal to the first signal processing circuit 7. The first signal processing circuit 7 performs color signal generation and processing luminance signal generation based on the frequency fck1 and outputs a motion detection luminance signal to the motion detection circuit 8 and outputs AE control luminance information to the microcomputer 12. The luminance signal and the color signal are output to the memory 14.

The motion detection circuit 8 detects the motion information of the image by using a known pattern matching method or the like using the motion detection luminance signal input from the first signal processing circuit 7 and sends it to the microcomputer 12. The microcomputer 12 estimates the camera shake direction and the camera shake amount when the photographer shoots from the motion information of the image obtained from the motion detection circuit 8, and based on this estimation, the brightness signal and the color input to the memory 14. Correct the camera shake by changing the signal readout position. Further, the microcomputer 12 compares the AE control brightness information obtained from the first signal processing circuit 7 with a predetermined reference level, and controls the amplification factor of the CDS / AGC circuit 5 based on the comparison result. , And controls the iris 2 through the iris drive circuit 13 so that the AE luminance information matches the reference level.

The second signal processing circuit 10 adds to the luminance signal and the color signal output from the memory 14 based on the frequency fck2, enlargement processing corresponding to the above-described camera shake correction and other predetermined processing, and outputs it to the DAC 11. The DAC 11 converts the luminance signal and the color signal obtained from the second signal processing circuit 10 from a digital signal into an analog signal based on the frequency fck2 and outputs the analog signal to the VTR or the like.

FIG. 2 is a diagram showing an outline of a processing flow of the microcomputer 12 in the first embodiment of the present invention. Hereinafter, FIG. 2 will be described step by step.

At (2-1), the processing flow starts (2-
Proceed to 2). In (2-2), a predetermined initial setting is performed, and the process proceeds to (2-3). In (2-3), it is determined whether or not the acquisition of the motion information from the motion detection circuit 8 is completed,
If completed, proceed to (2-4), and if not completed, return to (2-3). In (2-4), motion information is calculated to estimate the camera shake direction and camera shake amount, and the process proceeds to (2-5). (2
In -5), a calculation for changing the read position of the luminance signal and the color signal input to the memory 14 is performed based on the camera shake direction and the camera shake amount estimated in (2-4), and the readout is performed based on this calculation result. The memory 14 is controlled so that the luminance signal and the color signal are read from the position at a predetermined timing, and the process proceeds to (2-6). In (2-6), it is judged whether or not the acquisition of the AE control brightness information from the first signal processing circuit 7 is completed, and if completed, the process proceeds to (2-7), and if not completed (2-6 ) Return to. In (2-7), A
The brightness information for E control is compared with a predetermined reference level, and the process proceeds to (2-8). In (2-8), the amplification factor of the CDS / AGC circuit 5 is controlled based on the comparison result in (2-7), and a control signal is output to the iris drive circuit 13 to control the iris 2 (2- Return to 3).

FIG. 3 is a conceptual diagram for explaining the timing of the image stabilization processing and the AE processing when the frequency fck1 is about twice as high as the frequency fck2 in the first embodiment of the present invention. In an actual circuit, a signal delay occurs in each part, but this delay is ignored in FIG. 3 for the sake of simplicity. Hereinafter, FIG. 3 will be described.

(3-a) is a vertical synchronizing signal (negative polarity),
(3-b) is the output signal of the CDS / AGC circuit 5, (3-b)
3C shows the image stabilization and AE processing period of the microcomputer 12, and FIG. 3D shows the output signal of the DAC 11. The following description will be given focusing on the period n of (3-b).

During the period n of (3-b), the image sensor 3 and the TG
4 and the CDS / AGC circuit 5 operate based on the frequency fck1 which is a frequency twice as high as the frequency fck2 which is the final operating frequency of the system of the first embodiment. It is a length period (the first half of one field). CDS / of period n of (3-b)
The AGC output signal is input to the motion detection circuit 8 and the memory 14 through the ADC 6 and the first signal processing circuit 7. Here, the inputs of the first signal processing circuit 7, the motion detection circuit 8 and the memory 14 operate based on the frequency fck1. The motion detection circuit 8 receives all the motion detection luminance signals corresponding to the signals of the period (3-b) n,
The motion detection process is performed and the motion detection information is passed to the microcomputer 12. The microcomputer 12 is (3-c)
2), that is, the latter half of the same field as the period n of (3-b), the processes of (2-3) to (2-5) of FIG. 2 are performed. By these processes, the signal of the period (3-d) n is obtained. On the other hand, the AE control luminance information of the period n of (3-b) can be passed from the first signal processing circuit 7 to the microcomputer 12 for a while after the period n of (3-b) ends. The microcomputer 12 can perform the processes (2-6) to (2-8) in FIG. 2 in the period (3-c) n after the image stabilization process.

(Second Embodiment) FIG. 4 shows a second embodiment of the present invention.
2 is a diagram for explaining the embodiment of the present invention, in which the same numbers as those in FIG. 1 have the same functions as those in FIG. Reference numeral 21 in FIG. 4 denotes a 2-line reading image pickup device such as a 2-line reading CCD, 22 denotes a timing pulse generator (hereinafter referred to as TG) for driving the image pickup device 21,
23 and 24 are double correlation sampling and auto gain control circuits (hereinafter referred to as CDS / AGC circuits), and 25 and 26 are ADCs (Analog to D).
digitalConverter), 27 is a third signal processing circuit.

The second embodiment will be described below with reference to FIG.

In FIG. 4, light from the subject enters the image sensor 21 through the lens 1 and the iris 2. The incident light is photoelectrically converted in the image pickup device 21, and a video signal is output to the CDS / AGC circuits 23 and 24 every two lines at a predetermined timing driven by the TG 22.
The CDS / AGC circuits 23 and 24 perform well-known double correlation sampling to extract the signal component of the output from the image pickup device 21 and amplify the signal at an amplification factor designated by the microcomputer 12 to output to the ADCs 25 and 26, respectively. In the ADCs 25 and 26, the input analog signal is converted into a digital signal and the third signal processing circuit 2
Output to 7. The third signal processing circuit 27 performs color signal generation, luminance signal generation, etc. from the signals for each two lines, outputs the motion detection luminance signal to the motion detection circuit 8, and outputs the AE control luminance information to the microcomputer 12, Memory 14
The luminance signal and the color signal are output to. The motion detection circuit 8
Using the luminance signal for motion detection input from the third signal processing circuit 27, the motion information of the image is detected by a technique such as a well-known pattern matching method and sent to the microcomputer 12. The microcomputer 12 estimates the camera shake direction and camera shake amount when the photographer shoots from the motion information of the image obtained from the motion detection circuit 8, and based on this estimation, the brightness signal and the color signal input to the memory 14 are calculated. Correct the camera shake by changing the read position. Further, the microcomputer 12 compares the AE control brightness information obtained from the third signal processing circuit 27 with a predetermined reference level, and controls the amplification factors of the CDS / AGC circuits 23 and 24 based on the comparison result. At the same time, the iris 2 is controlled through the iris drive circuit 13 so that the AE luminance information matches the reference level. The second signal processing circuit 10 subjects the luminance signal and the color signal output from the memory 14 to enlargement processing corresponding to camera shake correction and other predetermined processing, and outputs the result to the DAC 11. The DAC 11 converts the luminance signal and the color signal obtained from the second signal processing circuit 10 from a digital signal into an analog signal and outputs the analog signal to a VTR or the like.

The processing flow of the microcomputer 12 is the same as that shown in FIG.

FIG. 5 is a conceptual diagram for explaining the timing of image stabilization processing and AE processing in the second embodiment of the present invention. In an actual circuit, a signal delay occurs in each part, but this delay is ignored in FIG. 5 to simplify the explanation. FIG. 5 will be described below.

(5-a) is a vertical synchronizing signal (negative polarity),
(5-b) is the output signal of the CDS / AGC circuit 23, (5
-C) is the output signal of the CDS / AGC circuit 24, (5-
4D shows the image stabilization and AE processing period of the microcomputer 12, and (5-e) shows the output signal of the DAC 11. The following description will be given focusing on the period n of (5-b) and (5-c).

In the periods n of (5-b) and (5-c), signals of two lines are simultaneously read from the image pickup device 21,
Since the CDS / AGC circuits 23 and 24 process the signals of the respective lines, the period is half that of the conventional example (the first half of one field). (5-b) and (5
The CDS / AGC output signal in the period n of -c) is input to the third signal processing circuit 27 through the ADCs 25 and 26, respectively, and the signals of each line are appropriately processed and input to the motion detection circuit 8 and the memory 14. The motion detection circuit 8 has (5-
After all the motion detection luminance signals corresponding to the periods n of b) and (5-c) are input, the motion detection processing is performed and the motion detection information is passed to the microcomputer 12. The microcomputer 12 uses the period n of (5-d), that is, (5
The processing from (2-3) to (2-5) in FIG. 2 is performed on the latter half of the same field as the period n of −b), (5-b) and (5-c). By these processes, the signal of the period n of (5-e) is obtained. On the other hand, from the third signal processing circuit 27, after a while after the period n of (5-b) and (5-c) ends, (5-b) and (5
It is possible to pass the AE control luminance information of the period n of −c). The microcomputer 12 performs (3-
In period n of c), (2-6) to (2-8) in FIG.
Can be processed.

In the present embodiment, the camera shake correction and the AE control are described, but it is easy to apply it to the photographing functions such as AF (automatic focus correction) and AWB (automatic white balance correction) using the image information. is there.

[0046]

As described above, according to the present invention,
By obtaining information necessary for functions related to image pickup such as blur correction, AE, AF, and AWB faster than before, it is not necessary to increase the processing speed for executing the function so much, the cost is reduced, and No extra consideration was required in the design of the shooting function.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a first exemplary embodiment of the present invention.

FIG. 2 is a flowchart showing a process of a microcomputer according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a processing timing of the microcomputer of the first embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a second exemplary embodiment of the present invention.

FIG. 5 is a diagram showing a processing timing of the microcomputer of the second embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of a conventional example.

FIG. 7 is a flowchart showing a process of a conventional microcomputer.

FIG. 8 is a diagram showing processing timing of a conventional microcomputer.

[Explanation of symbols]

1 lens 2 iris 3 image sensor 4 Timing pulse generator (TG) 5 CDS / AGC circuit 6 ADC 7 First signal processing circuit 8 Motion detection circuit 10 Second signal processing circuit 11 DAC 12 Microcomputer 13 Iris drive circuit 14 memory

Claims (11)

(57) [Claims] 1. An image pickup device, a readable / writable storage device, a first signal processing device for processing a video signal from the image pickup device and writing the image signal in the storage device at a first rate, and a second storage device from the storage device. A second signal processing means for reading out a video signal at a rate of, and a function control means for controlling a function relating to imaging based on a signal from the first signal processing means, wherein the first rate is the second rate. An imaging device characterized by being faster than 2. The image pickup apparatus according to claim 1, wherein the function control unit includes a shake correction unit for a captured image from the image sensor. 3. The image pickup apparatus according to claim 1, wherein the function control unit includes an automatic exposure correction unit for the image pickup device. 4. The image pickup apparatus according to claim 1, wherein the function control unit includes an automatic focus correction unit in the image pickup element. 5. The image pickup apparatus according to claim 1, wherein the function control unit includes an automatic white balance correction unit for a video signal from the image pickup device. 6. The imaging device according to claim 1, wherein the first rate is at least twice the second rate. 7. An image pickup device, a readable / writable storage device, a device for simultaneously reading out two lines of video signals from the image pickup device, a process of processing the video signals read out simultaneously for the two lines, and writing the processed video signals in the storage device. One signal processing means, a second signal processing means for reading a video signal from the storage means, and a function control means for controlling a function relating to imaging based on a signal from the first signal processing means. Image pickup device. 8. The image pickup device according to claim 7, wherein the function control unit includes a shake correction unit for a captured image from the image sensor. 9. The image pickup apparatus according to claim 7, wherein the function control unit includes an automatic exposure correction unit for the image pickup device. 10. The image pickup apparatus according to claim 7, wherein the function control unit includes an automatic focus correction unit in the image pickup element. 11. The image pickup apparatus according to claim 7, wherein the function control unit includes an automatic white balance correction unit for a video signal from the image pickup device.