JP3436152B2 - GaN-based semiconductor devices - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a GaN-based semiconductor device.

[0002]

2. Description of the Related Art It is known that a GaN-based semiconductor can be used as, for example, a blue light emitting device. In such a light emitting device, sapphire is generally used as the substrate.

[0003]

One of the problems to be solved in this sapphire substrate is as follows. That is, since the sapphire substrate is transparent, the light of the light emitting element that is originally desired to be extracted from the upper surface of the element passes through the sapphire substrate on the lower surface of the element. Therefore, the light emitted by the light emitting element cannot be effectively used.

Sapphire substrates are also expensive. Furthermore, since the sapphire substrate is an insulator, it is necessary to form electrodes on the same surface side, and it is necessary to etch a part of the semiconductor layer, and accordingly, the bonding process also requires 2 steps.
Doubled. Further, since both the n and p electrodes are formed on the same surface side, there is a limitation in reducing the size of the element, and there is also a problem of charge-up.

Further, it is conceivable to use a Si (silicon) substrate instead of the sapphire substrate, but according to the study by the present inventors, it is very difficult to grow a GaN-based semiconductor layer on the Si substrate. there were. As one of the causes,
There is a difference in the coefficient of thermal expansion between Si and GaN-based semiconductors. The linear expansion coefficient of Si is 4.7 X ^10-6 / K, while G
The linear expansion coefficient of aN is 5.59 × 10 ⁻⁶ / K,
The former is smaller than the latter. Therefore, when the GaN-based semiconductor layer is heated during growth, the Si substrate is expanded and Ga
The element is deformed so that the N-type semiconductor layer side is compressed. At this time, tensile stress is generated in the GaN-based semiconductor layer,
As a result, cracks may occur. In addition, strain occurs in the lattice even if cracks do not occur. Therefore, G
The aN-based semiconductor element cannot exhibit its original function.

In view of the above problems, it is an object of the present invention to provide a GaN-based semiconductor device having a novel structure. Another object of the present invention is to provide a laminate having a novel structure which is an intermediate of a GaN-based semiconductor device.

[0007]

Therefore, the present inventors
The inventors have made extensive studies to find a new substrate suitable for growing an aN-based semiconductor layer. As a result, Japanese Patent Application No. 9-29
No. 3465 (Applicant's reference number 970152 / Agent's reference number P0060), the following matters were conceived and disclosed. That is, it has been considered that the substrate must satisfy at least two of the following requirements (1) to heteroepitaxially grow a GaN-based semiconductor on the substrate. Adhesion between GaN-based semiconductor and substrate is good. Coefficient of thermal expansion of GaN-based semiconductor is close to that of substrate. Low elastic modulus of substrate. Crystal structure of substrate is the same as that of GaN-based semiconductor. | Substrate lattice constant-Lattice constant of GaN-based semiconductor |
/ GaN-based semiconductor lattice constant ≦ 0.05 (that is, the difference between the substrate lattice constant and the GaN-based semiconductor layer lattice constant is ± 5% or less), of course, preferably the above requirements are satisfied. At least three of the
More preferably, at least four of the above requirements and most preferably all of the five requirements are met.

As the materials satisfying such conditions, some of the metallic materials are noted in the above-mentioned Japanese Patent Application No. 9-293465. Ti is disclosed as one of them. Further, according to the previous application, the substrate may satisfy the above requirements at least on its surface, that is, on the surface in contact with the GaN-based semiconductor layer. Therefore, the base portion of the substrate can be formed of any material and the surface portion of the substrate can be formed of a material that satisfies the above requirements. As in the case of the sapphire substrate, A between the semiconductor layer and the substrate
Al _a In _b Ga _1-a-b N such as 1N and GaN
A buffer layer composed of (0 ≦ a ≦ 1, 0 ≦ b ≦ 1, 0 ≦ a + b ≦ 1) can be interposed.

On the other hand, according to Japanese Patent Application No. 9-293463 (Applicant's reference number 970136 / Agent's reference number P0057), a buffer layer for buffering stress is provided between the Si substrate and the GaN-based semiconductor layer. A semiconductor device having an intervening structure is disclosed. As the material for forming the buffer layer for stress buffering, some attention is paid to some metallic materials in the above-mentioned Japanese Patent Application No. 9-293465, and Ti is disclosed as one of them. That is, a semiconductor element having a structure in which a Ti layer is formed on a Si substrate and a GaN-based semiconductor layer is formed thereon is disclosed.

The present invention was made based on the matters disclosed in the above two prior applications. And it is a further improvement and development. That is, the Si substrate and the Si
Made of GaN-based semiconductor formed on a metal substrate
And a second layer of Ti formed on the first layer.
And a GaN-based semiconductor layer formed on the second layer.

According to the semiconductor element having such a structure, the internal stress caused by the difference between the coefficient of thermal expansion of the Si substrate and the coefficient of thermal expansion of the GaN-based semiconductor layer is buffered by the second layer made of Ti. Therefore, it is possible to prevent the GaN-based semiconductor layer from being cracked. Further, according to the semiconductor device configured as described above, when the GaN-based semiconductor layer has a light emitting device structure, the substrate itself serves as a reflective layer. Therefore,
The light emitted from the device can be effectively used. Therefore, it is not necessary to form a separate reflection layer, which is required for a light emitting element or a light receiving element using a transparent sapphire substrate. Further, when the substrate is made of a light absorbing material such as GaAs, the work of removing the substrate becomes unnecessary.

The elements of the present invention will be described in more detail below. (Regarding Substrate) The substrate made of Si has conductivity, and as a result, electrodes can be formed on both sides of the semiconductor element, and the problem of charge-up can be easily solved by grounding. Further, the Si substrate can be obtained at low cost. Si
It is preferred to use the (111) plane of the substrate made of and to grow the first layer on it.

(Regarding the first layer) On a substrate made of Si
The first layer formed of a GaN-based semiconductor is a crystal layer.
The thickness is 500 to 100 to prevent the occurrence of
00 Å. More preferably, 1000 to 8000Å
Is. Here, a GaN-based semiconductor is a group III nitride semiconductor
The body, typically Al_XGa_YIn_1-XYN
(0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ X + Y ≦ 1)
It Further, it may contain any dopant.
Yes. Although the method for forming the first layer is not particularly limited, for example,
For example, the well-known metal organic compound vapor phase growth method (hereinafter referred to as “MOC
VD method ". ). In addition, well-known
It can also be formed by the sagittal crystal growth method (MBE method).
it can.

Al _x G between the first layer and the Si substrate
It is preferable to interpose a buffer layer made of a1 _-xN (0≤x≤1). Journal of Crystal Growth 128 (199
3), pp 391-396.

By thus forming the GaN-based first layer, it becomes easy to obtain a c-axis oriented Ti single crystal thereon. It should be noted that Ti is directly applied onto the Si substrate.
It is also possible to form layers. But in that case, Ti
Considering that a GaN-based semiconductor layer having a desired function is further grown on the layer, it is difficult to control the growth condition of the Ti layer in order to obtain preferable crystallinity.

(Regarding the Second Layer) The second layer is made of substantially single crystal Ti. Ti has a preferred crystal structure for growing GaN-based semiconductors thereon, as disclosed in the previous application. At the same time, Si substrate and GaN
It has physical properties suitable for buffering the internal stress caused by the difference in the coefficient of thermal expansion of the semiconductor layers of the system. Therefore, Ti may be replaced with a Ti alloy under the condition that such a crystal structure and physical properties are maintained.

The second layer is formed on the first layer made of a GaN-based semiconductor. The formation method is not particularly limited, but CVD such as plasma CVD, thermal CVD, or photo CVD is used.
(Chemical Vapor Deposity
on), sputtering, vapor deposition, etc. (Physical Va
A method such as “Pour Deposition” can be used.

The thickness of the second layer made of Ti is 1000 to 30.
It is preferably 000Å. More preferably 500
It is 0 to 20000Å.

(Regarding GaN-based semiconductor layer) As is well known, the light-emitting element and the light-receiving element have a structure in which the light-emitting layers are sandwiched by GaN-based semiconductor layers (cladding layers) of different conductivity types. A superlattice structure or a double hetero structure is adopted. The electronic device represented by the FET structure is G
It can also be formed of an aN-based semiconductor. in this way,
The GaN-based semiconductor layer formed on the second layer has a plurality of layers interacting with each other to achieve a desired function. G
The aN-based semiconductor layer is formed by the well-known MOCVD method or MBE.
Formed by the method. Here, the definition of the GaN-based semiconductor is the same as that of the first layer.

[0020] _{Al a In b Ga 1-a} -b N (0 ≦ a ≦ between the semiconductor layer and the Ti of the second layer of the GaN-based
It is preferable to form a second buffer layer of 1, 0 ≦ b ≦ 1, 0 ≦ a + b ≦ 1). This second buffer layer is also formed by the well-known MOCVD method or MBE method. According to the studies of the present inventors, _Al a _Ga 1-a N a second buffer layer (0 <a <1) is preferable. a
The value of is preferably 0.85 to 0.95, and more preferably a is approximately 0.9.

[0021]

EXAMPLES Next, examples of the present invention will be described. (First Embodiment) This embodiment is a light emitting diode 1,
The structure is shown in FIG.

The specifications of each layer are as follows. Layer: Composition: Dopant (film thickness) p-clad layer 9: p-GaN: Mg (0.3 μm) light-emitting layer 8: superlattice structure quantum well layer: In _0.15 Ga _0.85 N (3.5 nm) barrier layer: GaN (3.5 nm) Number of repetitions of quantum well layer and barrier layer: 1 to 10 n Clad layer 7: n-GaN: Si (4 μm) Second buffer layer 6: Al _0.9 Ga _0.1 N: Si ( 15 nm) Second layer 5: Ti single crystal (300 nm) First layer 4: GaN: Si (800 nm) First buffer layer 3: AlN: Si (100 nm) Substrate 2: Si (n type) (300 μm)

The n-clad layer 7 may have a two-layer structure composed of a low electron concentration n ⁻ layer on the light emitting layer 8 side and a high electron concentration n ⁺ layer on the second buffer layer 6 side. The light emitting layer 8 is not limited to a superlattice structure, and may be a single hetero type, a double hetero type, a homojunction type, or the like. A wide band gap Al _X doped with an acceptor such as magnesium between the light emitting layer 8 and the p-clad layer 9
_{In Y Ga 1-X-Y} N (0 <X ≦ 1,0 ≦ Y <1) layer may be interposed. This is to prevent the electrons injected into the light emitting layer 8 from diffusing into the p-clad layer 9. The p-clad layer 9 is a low hole concentration p on the light emitting layer 8 side.
^A two-layer structure including a ⁻ layer and a high hole concentration p ⁺ layer on the electrode 10 side can be formed.

In the semiconductor device of the embodiment thus constructed, the Ti layer serves as a buffer layer for stress buffering as described in Japanese Patent Application No. 9-293463, which is a prior application.
Cracks due to the difference in thermal expansion coefficient between the i substrate and the GaN-based semiconductor layer hardly enter the GaN-based semiconductor layer.

The light emitting diode 1 of the embodiment is formed as follows. (Growth of GaN Layer on Si Substrate) (11 of Si substrate 2
1) The first buffer layer 3 is grown on the surface by MOCVD. The growth temperature is between 1000 ° C and 1200 ° C. After that, the growth temperature is set between 1000 ° C. and 1150 ° C., and the GaN layer 4 is epitaxially grown again by the MOCVD method.

(Growth of Ti layer on GaN layer) The GaN layer 4 / first buffer layer 3 / Si substrate 2 is set in the chamber and 3 × 10 ⁻⁵ with a vacuum pump which is industrially widely used.
The chamber is evacuated to Torr and then filled with nitrogen gas. Repeat this work 3 times. This is to reduce oxygen in the chamber and prevent Ti from being oxidized. Therefore, another method can be adopted as long as oxygen in the chamber can be sufficiently discharged. In addition, according to the study by the present inventors, the capacity of a vacuum device attached to a vapor deposition device which is currently used industrially is limited to the degree of vacuum (usually: ~ 1).
^0-7 Torr), it was essential to repeat such nitrogen purging. Of course, other inert gas can be used instead of nitrogen gas. Next, nitrogen gas is evacuated to about 8 × 10 ⁻⁷ Torr by a diffusion pump.

After the completion of such pretreatment, the substrate is heated to a predetermined temperature (150 ° C.) by a lamp heater, and
The bulk of Ti is irradiated with an electron beam to melt it, and G
A single crystal Ti layer is deposited on the aN layer 4. The deposition rate is 10Å / s. And the film thickness is 3000Å (300
nm), the vapor deposition is terminated. In addition to the vacuum vapor deposition method, a sputtering method, an ion plating method, or the like can be used for vapor deposition of the Ti layer.

Ti layer 5 / into the chamber of the MOCVD apparatus
The GaN layer 4 / first buffer layer 3 / Si substrate 2 is set and vacuumed to 2 × 10 ⁻⁴ Torr or less. After that, the temperature inside the chamber is raised to 600 ° C. and maintained for 5 minutes,
Therefore, the surface of the Ti layer 5 is cleaned. Then 3
The second buffer layer 6 made of Al _0.9 Ga _0.1 N is grown at a growth temperature of 00 ° C., and the temperature is further raised to 1000 ° C. to form the n-clad layer 7 and the subsequent layers according to a conventional method. In this growth method, ammonia gas and an alkyl compound gas of a Group III element, such as trimethylgallium (TM
G), trimethylaluminum (TMA) and trimethylindium (TMI) are supplied onto the substrate heated to an appropriate temperature to cause a thermal decomposition reaction, thereby growing a desired crystal on the substrate. It goes without saying that doping is positively performed in order to maintain the vertical conductivity.

The translucent electrode 10 is a thin film containing gold, and p
The clad layer 9 is laminated so as to cover substantially the entire upper surface. The p-electrode 11 is also made of a material containing gold, and is formed on the transparent electrode 10 by vapor deposition. Then, the wire is bonded to the desired position. Note that Si
The substrate 2 serves as an n electrode. Further, a metal material such as Au or Al may be formed on the surface of the Si substrate 2 opposite to the semiconductor layer to form an n-electrode.

(Second Embodiment) FIG. 2 shows a semiconductor device according to a second embodiment of the present invention. The semiconductor device of this embodiment is a light emitting diode 21. The same elements as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. The specifications of each layer are as follows. Layer: Composition: dopant (film thickness) n-clad layer 29: n-GaN: Si (4 μm) light-emitting layer 8: superlattice structure quantum well layer: In _0.15 Ga _0.85 N (3.5 nm) barrier layer: GaN (3.5 nm) Number of repetitions of quantum well layer and barrier layer: 1 to 10 p Clad layer 27: p-GaN: Mg (0.3 μm) Second buffer layer 26: Al _0.9 Ga _0.1 N: Mg ( 15 nm) Second layer 5: Ti single crystal (300 nm) First layer 4: GaN: Mg (800 nm) First buffer layer 3: AlN: Mg (100 nm) Substrate 2: Si (p type) (300 μm)

As shown in FIG. 2, the second buffer layer 26
On the p-clad layer 27, the light-emitting layer 8 and the n-clad layer 2
The light emitting diode 21 is formed by growing 9 in order.
In the case of this element 21, since the n-clad layer 29 having a low resistance value is the uppermost surface, it is possible to omit the transparent electrode (see reference numeral 10 in FIG. 1) here. Reference numeral 31 in the figure is an n-electrode. The Si substrate 2 can be used as it is as a p-electrode. In addition, on the surface of the Si substrate 2 opposite to the semiconductor layer, Au,
It is also possible to form a p-electrode by forming a metal material such as Al. Also in the element of the second embodiment, the presence of the Ti layer 5 prevents the GaN-based semiconductor layers 27, 8, 29 from cracking.

The element to which the present invention is applied is not limited to the above-mentioned light emitting diode, but may be applied to an optical device such as a light receiving diode and a laser diode, as well as an electronic device having an FET structure. The present invention is also applied to a laminated body as an intermediate body of these elements.

The present invention is not limited to the above description of the embodiments and examples of the invention, and includes various modifications which can be conceived by those skilled in the art without departing from the scope of the claims.

The following items will be disclosed below. (10) The Ti according to any one of claims 1 to 6.
The film thickness of the second layer made of is 1000 to 30000Å. (11) The Ti according to any one of claims 1 to 6,
The film thickness of the second layer made of is 5000 to 20000Å. (12) according to claim 6, in any one of (10) and (11), between the second layer of the semiconductor layer of the GaN-based _{Ti, Al a In b Ga 1-} a- _b N
A buffer layer of (0 ≦ a ≦ 1, 0 ≦ b ≦ 1, 0 ≦ a + b ≦ 1) is interposed. (13) In (12), the buffer layer is Al _a
Ga _1-a N (a = 0.85 to 0.95). (14) In (12), the buffer layer is Al _a
Ga _1-a N (a is approximately 0.9). (20) In any one of (1) to (6) and (10) to (14), the second layer is made of single crystal Ti or Ti close to single crystal. (30) Substrate made of Si, first layer made of GaN-based semiconductor formed on the substrate made of Si, and second layer made of substantially Ti formed on the first layer And a GaN-based semiconductor layer formed on the second layer. (31) Substrate made of Si, first layer made of GaN-based semiconductor formed on the substrate made of Si, and second layer made of substantially Ti formed on the first layer And a GaN-based semiconductor layer formed on the second layer.

[Brief description of drawings]

FIG. 1 is a sectional view showing the structure of a light emitting diode according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing the structure of a light emitting diode according to a second embodiment of the present invention.

[Explanation of symbols]

1,21 Light emitting diode 2 Si substrate 3 First buffer layer 4 First layer made of GaN-based semiconductor 5 Second layer of Ti 6 Second buffer layer 7, 8, 9, 27, 29 GaN-based semiconductor layer

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shizuyo Nobashi No. 1 Nagahata, Ochiai, Kasuga-cho, Nishikasugai-gun, Aichi Prefecture, Toyoda Gosei Co., Ltd. (72) Hiroo Yonezu Oshimizu, Oshimizu-cho, Aichi Prefecture -914 (56) Reference JP 63-114237 (JP, A) JP 63-110751 (JP, A) JP 61-179589 (JP, A) JP 11-176758 (JP, A) ) JP-A-11-177141 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 33/00 H01L 21/205

Claims (6)

(57) [Claims] 1. A substrate made of Si, a first layer made of a GaN-based semiconductor formed on the substrate made of Si, and a second layer made of Ti formed on the first layer. A GaN-based semiconductor device comprising a layer and a GaN-based semiconductor layer formed on the second layer. 2. The thickness of the first layer is 500 to 1000.
The GaN according to claim 1, wherein the GaN is 0Å.
Semiconductor devices. 3. The GaN-based semiconductor device according to claim 1, wherein the first layer is epitaxially grown on the (111) plane of the Si substrate. 4. A substrate made of Si, a first layer made of a GaN-based semiconductor formed on the substrate made of Si, and a second layer made of Ti formed on the first layer. A laminated body comprising a layer and a GaN-based semiconductor layer formed on the second layer. 5. The thickness of the first layer is 500 to 1000.
It is 0Å, The laminated body of Claim 4 characterized by the above-mentioned. 6. The laminated body according to claim 4, wherein the first layer is epitaxially grown on the (111) plane of the Si substrate.