JP3426787B2 - Semiconductor inductor - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor inductor in which an inductance is artificially created by using a semiconductor circuit,
In particular, the present invention relates to a semiconductor inductor used as a resonance inductance of an equalizer circuit, a loudness circuit or the like in an audio product.

[0002]

2. Description of the Related Art FIG. 23 is a diagram showing an equalizer circuit using a conventional semiconductor inductor. The equalizer circuit shown in this figure includes an operational amplifier 1 in which a feedback resistor R _f is connected between an output terminal for inputting an input signal v _i to a non-inverting input terminal and an output signal v _o and an inverting input terminal, and an operational amplifier 1. The inverting input terminal has the semiconductor inductances 2, 3 and the like connected via the resonance capacitors C ₀₁ and C ₀₂ (= capacitance value), respectively.

This semiconductor inductance 2 is an IC (In
integrated circuit), a capacitor C ₁ (= capacitance value) connected in series with a capacitor C ₀₁ , a resistor R ₁ (= resistance value) connected in series with this and the other end grounded, and a capacitor C ₁ in parallel with the capacitor C ₁ It is provided with a connected resistor R ₂ (= resistance value) and a buffer amplifier for limiting a current flowing between the resistor R ₂ from the capacitor C ₁ and the resistor R ₁ .

Here, the voltage at the inverting input terminal of the operational amplifier 1 is v _1, and the current flowing through the capacitor C _O1 is i ₁ ,
The current flowing through the capacitor C _1, resistors R ₁ and i _2, resistor ₂
Let i ₃ be the current flowing in the following: v ₁ = i ₁ / jωC _O1 + i ₂ · (1 / jωC ₁ + R ₁ ) ... (1) i ₂ / jωC ₁ = −i ₃ · R ₂ … (2) i ₁ + I ₃ = i ₂ (3) ω is the angular frequency, and when solved, v ₁ = i ₁ / jωC _O1 + i ₁ · (R ₂ + jωC ₁ · R ₁ · R ₂ ) / (jωC ₁ · R ₁ +1) (4) and in the low frequency range, that is, when ω is small, v ₁ ≈i ₁ / jωC _O1 + i ₁ · (R ₂ + jωC ₁ · R ₁ · R ₂ ) ... ( 5), and if L = C ₁ · R ₁ · R ₂ (6) is set as the pseudo inductance L, v ₁ = i ₁ / jωC _O1 + i ₁ · (R ₂ + jωL) (7) Become. That is, the semiconductor inductor 2 can be represented by an equivalent circuit as shown in FIG 3.

Further, assuming that the sharpness of this series resonance circuit is Q, Q = ω ₀ L / R ₂ = (C ₁ · R ₁ / C _O1 · R ₂ ) ^1/2 (8) where ω ₀ = 1 / (L · C _O1 ) ^1/2 .

When the resonance is achieved, the amplification degree A ₁ of the operational amplifier ₁ is A ₁ = (R ₂ + R _f ) / R ₂ (9) The same applies to the case of using another semiconductor inductor 2 or the like.

[0007]

By the way, in designing the above equalizer circuit, when the pseudo inductance is determined, there is an upper limit (100 kΩ) of R ₁ , and while increasing Q, the pseudo inductance is increased. Therefore, it is necessary to increase C ₁ . In particular, in the low frequency range of several tens Hz, the capacitance C ₀₁ for resonance becomes large, and there is a problem that it is necessary to increase C _{1 in order} to increase Q. Even if a capacitor other than the capacitor C ₁ is integrated into an IC, a large capacitor is required, and there is little space merit.

Further, in the semiconductor inductor 2, when designing an equalizer circuit, since it is used in a series resonance circuit, there is a problem that the series resistance R ₂ causes Q to decrease in a low range. Further, since the resistor R ₂ constitutes a pseudo inductance as described above and is a constant that determines not only Q but also the boost amount of the equalizer circuit, there is a problem that IC design is difficult.

Therefore, in view of the above problems, it is an object of the present invention to provide a semiconductor inductor in which Q constituted by a pseudo inductance can be set high over the entire audio band and the capacity of an external capacitor can be reduced. And

[0010]

In order to solve the above-mentioned problems, the present invention provides a semiconductor inductor having the following constitution. First, as a first premise of the present invention , a semiconductor inductor that forms an inductance without using a coil in order to integrate the inductance of a coil that forms a series resonance circuit with a capacitor into a semiconductor, and integrates an input signal from the capacitor. Is provided with an integrating circuit using an operational amplifier and a resistor (R ₁₂ ) connecting the input and output of the integrating circuit.

Next, as a second premise of the present invention , in a semiconductor inductor in which an inductance is formed without using a coil in order to make the inductance of a coil which constitutes a series resonance circuit with a capacitor into a semiconductor, an input from the capacitor A buffer amplifier that converts impedance to cut off a signal, an integrating circuit that uses an operational amplifier to integrate an output signal from the buffer amplifier,
A resistor connected between the input of the buffer amplifier and the output of the integrating circuit is provided.

Further, in a semiconductor inductor in which an inductance is formed without using a coil in order to make the inductance of a coil forming a series resonance circuit with a capacitor into a semiconductor, the impedance is converted to cut off an input signal from the capacitor. A buffer amplifier, an integrating circuit that uses an operational amplifier to integrate the output signal from the buffer amplifier, an inverting amplifier circuit that inverts the output signal of the integrating circuit, and an inverted output signal of the inverting amplifier circuit as a base input And an emitter follower having a collector current that is the current of the input signal to the buffer amplifier. Furthermore , an integrating circuit using an operational amplifier for integrating the input signal from the capacitor in a semiconductor inductor that forms an inductance without using a coil to make the inductance of the coil that configures the series resonance circuit with the capacitor a semiconductor, An inverting amplifier circuit that inverts the output signal of the integrating circuit, and an emitter follower that uses a branch signal obtained by inputting the inverted output signal of the inverting amplifier circuit to the base and branching the input signal to the integrating circuit as a collector current. Set up.

Furthermore , the arrangement of the integrating circuit and the inverting amplifier circuit may be reversed. As a first aspect of the invention, a semiconductor inductor, which forms an inductance without using a coil in order to make the inductance of a coil that forms a series resonance circuit with a capacitor into a semiconductor, converts the impedance to cut off an input signal from the capacitor. A buffer amplifier, an integrating circuit using an operational amplifier for integrating an output signal from the buffer amplifier, an inverting amplifier circuit for inverting the output signal of the integrating circuit, and an inverting output signal of the inverting amplifier circuit. An emitter follower is provided which inputs to the emitter via a resistor, grounds the base, and uses the current of the input signal to the buffer amplifier as the collector current.

As a second aspect of the present invention, in order to integrate the inductance of a coil forming a series resonance circuit with a capacitor into a semiconductor, a semiconductor inductor forming an inductance without using a coil is used to integrate an input signal from the capacitor. An integrating circuit using an operational amplifier, an inverting amplifier circuit for inverting the output signal of the integrating circuit, an inverting output signal of the inverting amplifier circuit is input to an emitter through an output resistor, the base is grounded, and the buffer is provided. An emitter follower that uses the current of the input signal to the amplifier as the collector current is provided.

As a third invention, in the first invention, the input resistance of the integrating circuit 10A is switched to a resistor.
It may be a capacitor . As the fourth invention, the inverting
Input resistance of the amplifier circuit and the integration circuit may be switched capacitor for phase inversion and resistance.

[0016]

As the first premise of the present invention, by forming a semiconductor inductor equivalent circuit inductance in parallel with the parallel resistance, it can reduce the capacity of increased to and capacitors sharpness Q of the low range It is possible to reduce the size of the semiconductor inductor.

As a second premise of the present invention, the sharpness Q can be further increased by forming a semiconductor inductor of an equivalent circuit in which an inductor is connected in parallel with a resistor. Furthermore
To, by purely a semiconductor inductor equivalent circuit of the inductance only, and more ideally sharpness Q can infinitely large. Furthermore, it is possible to form a semiconductor inductor of the Remove the buffer amplifier equivalent circuit in parallel inductance resistor. Further, by reversing the arrangement of the integrating circuit and the inverting amplifier circuit, the flexibility of the configuration can be secured.

According to the first and second aspects of the invention, by replacing the emitter follower with a grounded base amplifier, the flexibility of the structure can be secured. As a third invention, in the first invention, and Sui <br/> Tchito capacitor resistor input resistance of the integration circuit 10A, further, as a fourth invention, before
By the input resistance of the serial inverting amplifier circuit and the integration circuit and switched capacitor for phase inversion-resistance, it can be an inductance variable, and it is possible to decrease the peripheral parts, to miniaturize the semiconductor inductor Therefore, the cost can be reduced.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A detailed description will be given below with reference to the drawings. Figure 1
FIG. 3 is a diagram showing a semiconductor inductance which is the first premise of the embodiment of the present invention . The semiconductor inductance shown in the figure includes an operational amplifier 10 having a non-inverting input terminal grounded, a capacitor C ₁₁ (= capacitance) connecting an output terminal of the operational amplifier 10 and an inverting input terminal, and an inverting input terminal of the operational amplifier 10. integrator circuit 10A consisting connected to a capacitor C ₀₁ for the resonance on the opposite side of the connection resistance R ₁₁ Metropolitan
And a resistor R ₁₂ connected between the input and output of the integrating circuit 10A. Here, the input voltage of the resistor R ₁₁ ,
When the currents are v ₁ , i ₁ , the voltage at the non-inverting input terminal of the operational amplifier 10 is v ₂ , and the voltage at the output terminal of the operational amplifier 10 is v ₃ , the input impedance z of the semiconductor inductance is z = v ₁ / i ₁ = v ₁ / The _{{(v 1 -v 3) /} R 2 + v 1 / R 1} = v 1 / {v 1 (1 / R 2 + 1 / R 1) -v 3 / R 2} ... (10), v ₃ = −v ₁ / jωC ₁₁ · R ₁₁ (11) Substituting the equation (11) into the equation (10), z = 1 / (1 / R ₁ + 1 / R ₂ + 1 / jω · C ₁₁ · R ₁₁ · R ₁₂ ) (12) In equation (12), if L = C ₁₁ · R ₁₁ · R ₁₂ (13), then z = 1 / (1 / R ₁ + 1 / R ₂ + 1 / jωL) (14) FIG. 2 is a diagram showing an equivalent circuit of the semiconductor inductance of FIG. As shown in the figure, the equivalent circuit of the semiconductor inductance has parallel resistances R ₁₁ and R ₁₂ (R = R ₁₁ · R ₁₂ / (R
It becomes a pseudo inductance with ₁₁ + R ₁₂ )).

The sharpness Q is Q = R / ω ₀ L = {C ₀₁ · R ₁₁ · R ₁₂ / C ₁₁ · (R ₁₁ + R ₁₂ ) ² } ^1/2 (15) FIG. 3 is a diagram for explaining the effect of the semiconductor inductor of FIG. As shown in this figure (a), since the resistance is connected in parallel with the inductance L in the present embodiment, if R is determined so that Q can be obtained to some extent in the high range, Q will increase in the low range. Therefore, the capacity of the capacitor C ₁₁ that determines the pseudo inductance can be reduced to 1/10 or less as compared with the conventional one, so that the semiconductor inductor can be downsized as compared with the conventional configuration shown in FIG. become.

FIG. 4 is a diagram showing a semiconductor inductor which is the second premise of the embodiment of the present invention . The semiconductor device shown in this figure
The inductor is a modification of the semiconductor inductor of FIG. As shown in the figure, in order to increase the sharpness Q, a buffer amplifier 11 for converting impedance is provided on the input side of the integrating circuit 10A in order to reduce the current flowing into the resistor R ₁₁ . In this case, the input impedance z of the semiconductor inductor is as follows.

Z = 1 / (1 / R ₂ + 1 / jω · C ₁₁ · R ₁₁ · R ₁₂ ) (16) Here, if L = C ₁₁ · R ₁₁ · R ₁₂ (17), then z = 1 / (1 / R ₂ + 1 / jωL) (18) FIG. 5 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG. The sharpness Q in the equivalent circuit shown in this figure is as follows.

Q = R / ω ₀ L = (C ₀₁ · R ₁₂ / C ₁₁ · R ₁₁ ) ^1/2 (19) In this way, the resistor is connected in parallel with the inductance in the same manner as described above. A semiconductor inductor can be realized and Q can be increased. FIG. 6 is a diagram showing a semiconductor inductor according to the first embodiment of the present invention. The first example
It is a modification of the semiconductor inductor of FIG. As shown in the figure, an inverting amplifier circuit 12A including an input resistor R ₃₁ , a feedback resistor R ₄₁ , and an operational amplifier 12 is provided in the subsequent stage of the operational amplifier 10 to invert this output. The output of the inverting amplifier circuit 12A is provided with a transistor Tr connected to the base thereof, the collector of the transistor Tr is connected to the power source + V _CC via the current source I _C, and the emitter of the transistor Tr is connected to the resistor. It is connected to the power supply −V _CC via R ₂₁ , and the input to the buffer amplifier 11 and the transistor Tr
An emitter follower 13A connected to the collector of is provided. In the third embodiment, more Q than in the second embodiment.
In order to increase the output, the output is an emitter follower, and the current source I
Input feedback by _C. Although this circuit is shown as a circuit using dual power supplies,
A single power supply can be used if a bias of 2V _CC is applied. Similarly to the above, the input impedance z is obtained as follows. The input and output voltages of the operational amplifier 11 are v ₁ and v ₂ , and the output voltages of the operational amplifiers 10 and 12 are v ₃ and v _4.
And As in the case of FIG. 4 , v ₃ = −v ₁ / jωC ₁₁ · R ₁₁ (20) Therefore, assuming that R ₃₁ = R ₄₁ , the output v _{4 of the} operational amplifier 12 is v ₄ = −v ₃ = v ₁ / jωC ₁₁ · R ₁₁ (21)

Further, since the emitter voltage of the transistor Tr of the emitter follower 12A is also equal to v4, the emitter current i _c of the transistor Tr is i _c = v ₄ / R ₂₁ = v ₁ / jωC ₁₁ using the equation (21).・ R ₁₁・ R ₂₁ (22) Further, from i ₁ = i _c (23), z = v ₁ / i ₁ = v ₁ / i _c = v ₁ / v ₁ / jωC ₁₁ · R ₁₁ · R ₂₁ = jωC ₁₁ · R ₁₁ · R ₂₁ (24)

When L = C ₁₁ · R ₁₁ · R ₂₁ (25) is set, z = jωL (26) is obtained from the equation (21). FIG. 7 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG. The equivalent circuit shown in this figure has almost pure inductance, and the sharpness Q is theoretically infinite.
However, actually, in the high frequency range, the operational amplifiers 10 and 1
Phase loss occurs in each of the transistors 1 and 12 and the transistor Tr, causing a loss, but in the audible band, the pseudo inductance L is substantially close to ideal.

FIG. 8 is a diagram showing a semiconductor inductor according to the second embodiment of the present invention. As shown in the figure, the second embodiment, in order to simplify the circuit of the first embodiment, the first
The buffer amplifier 10 is deleted from the embodiment. Similarly to the above, when the input impedance z is obtained, z = 1 / (1 / R ₁₁ + 1 / jωC ₁₁ · R ₁₁ · R ₂₁ ) (27) Here, if L = jωC ₁₁ · R ₁₁ · R ₂₁ (28), then z = 1 / (1 / R ₁₁ + 1 / ωL) (29)

FIG. 9 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG. From equation (29), as shown in this figure,
The inductance L and the resistance form an equivalent circuit in parallel. Then, the sharpness Q is Q = (C ₀₁ · R ₁₂ / C ₁₁ · R ₁₁ ) ^1/2 (30).

FIG. 10 is a diagram showing a semiconductor inductor according to the third embodiment of the present invention. As shown in the figure, the third
This embodiment is an example in which the inverting amplifier circuit 12A of the second embodiment is arranged before the integrating circuit 10A. As for the operation of the circuit, an equivalent circuit similar to that of the first embodiment can be obtained only by first inverting it. FIG. 11 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG. In the figure, sharpness Q _{is, Q = (C 01 · R} 31 2 / C 11 · R 11 · R 21) becomes ^1/2 (31).

FIG. 12 is a diagram showing a semiconductor inductor according to the fourth embodiment of the present invention. As shown in the figure, the fourth
This embodiment is an example in which the collector ground feedback of the emitter follower 13A of the first embodiment is replaced with the grounded base transistor Tr. In this case, the phase does not change,
The inverting amplifier circuit can also be deleted. I _C and I _E in the figure
Is a current source for biasing the transistor Tr.

When the input impedance z is obtained, in this figure, v ₂ = -v ₁ / jωC ₁₁ · R ₁₁ (32) The emitter current i ₂ of the transistor Tr is i ₂ = v ₂ / R ₂₁ = −v ₁ / jωC ₁₁ · R ₁₁ · R ₂₁ (33) The collector current i _c of the transistor Tr has a current amplification factor of 1
Then, i _c = i ₂ = −v ₁ / jωC ₁₁ · R ₁₁ · R ₂₁ = −i ₁ (34) Therefore, from equation (34), z = v ₁ / i ₁ = jωC ₁₁ · R ₁₁・ R ₂₁ (35)

FIG. 13 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG. As shown in this figure, the equivalent circuit has an ideal inductance. FIG. 14 is a diagram showing a semiconductor inductor according to the fifth embodiment of the present invention. As shown in the figure, the fifth embodiment is an example in which removed the buffer amplifier 11 of the input of the fourth embodiment, when obtaining the input impedance z similarly, z = v ₁ / i ₁ = V ₁ / (v ₁ / R ₁₁ + v ₁ / jωC ₁₁ · R ₁₁ · R ₂₁ ) = 1 / (1 / R ₁₁ + 1 / jωC ₁₁ · R ₁₁ · R ₂₁ ) ... (36) where , L = jωC ₁₁ · R ₁₁ · R ₂₁ (37), then z = 1 / (1 / R ₁₁ + 1 / L) (38)

FIG. 15 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG. In the figure, the sharpness Q is Q = (C ₀₁ · R ₁₁ / C ₁₁ · R ₂₁ ) ^1/2 (39). FIG. 16 is a diagram showing a semiconductor inductor according to the sixth embodiment of the present invention. As shown in the figure, the sixth embodiment, the switched capacitor 2 for resistance to the input resistance R ₁₁ per integration circuit 10A of the semiconductor inductor of FIG. 1
The switched capacitor integrating circuit 10A replaced by 0 is shown. The switched capacitor 20 for resistance has a capacitor C ₂₂ (= capacitance) whose one end is grounded, and the opposite terminal of the capacitor C ₂₂ to the output terminal of the buffer amplifier 11 and the integrating circuit 10.
The switch Sw is alternately connected to the non-inverting input terminal of the operational amplifier 10 of A at a constant cycle. Scan <br/> switch-capacitor 20 for the resistor can be represented by an equivalent resistor, and the frequency of the cycle of switching the f _s, When the resistor _{R 11, R 11 = 1 /} f s · C ₂₂ (40) Therefore, the sixth embodiment is based on the semiconductor device of FIG.
It has the same operation and characteristics as the inductor . However, in this case, a clock oscillator for switching is required,
Since the inductance L is L = C ₁₁ · R ₁₂ / f _s · C ₂₂ (41), the inductance can be varied by f _s . A technology for making a switched capacitor into an IC including a capacitor has also been established, and it becomes possible to make an inductance into an IC, and it is possible to reduce peripheral parts (especially a capacitor), which is effective in downsizing and cost reduction. Since this semiconductor inductor has variable inductance, it can be applied to various filters.

FIG. 17 is a diagram showing a semiconductor inductor according to the seventh embodiment of the present invention. As shown in the figure, 7
In the embodiment of FIG.
An example in which is replaced with a switched capacitor integrating circuit 10A is shown. Therefore, the seventh embodiment is based on the semiconductor device of FIG.
It has the same operation and characteristics as the ductor, and the inductance can be varied by f _s .

FIG. 18 is a diagram showing a semiconductor inductor according to the eighth embodiment of the present invention. As shown in the figure, 8
This embodiment shows an example in which the integrating circuit 10A of the first embodiment is replaced with a switched capacitor integrating circuit 10A. Therefore, the eighth embodiment has the same operation and characteristics as the first embodiment, and the inductance can be changed by f _s .

FIG. 19 is a diagram showing a semiconductor inductor according to the ninth embodiment of the present invention. As shown in the figure, 9
In this embodiment, the integrating circuit 10A of the second embodiment is replaced with a switched capacitor integrating circuit 10A. Therefore, the ninth embodiment has the same operation and characteristics as the second embodiment, and the inductance can be changed by f _s .

[0036] FIG. 20 is a diagram showing a semiconductor inductor according to a first 0 embodiment of the present invention. As shown in the figure, an embodiment of the first 0 shows an example obtained by replacing the integration circuit 10A of the third embodiment in the switched capacitor integrator circuit 10A.
Thus, embodiments of the first 0 has the same operation and characteristics of the third embodiment, can be an inductance variable by f _s.

[0037] FIG. 21 is a diagram showing a semiconductor inductor according to a first 1 of the embodiment of the present invention. As shown in the figure, the first 1 of the embodiment, a phase inversion-resistance obtained by combining the switched capacitor 20 resistor of the inverting amplifier circuit 12A and the switched capacitor integrator circuit 10A for inputting reversal of the seventh embodiment An example of a switched-capacitor circuit 14A for use with is shown. Switched-capacitor circuit 14 for phase inversion and resistance
A consists of switches Sw1 and Sw2 and the capacitor C _22, when the input v ₁ of the clock phi, the polarity of the capacitor C ₂₂ during reverse phase clock bar is charged to C ₂₂ phi is configured to be reversed. Therefore, the inverting amplifier circuit 12A can be omitted.

[0038] FIG. 22 is a diagram showing a semiconductor inductor according to the first and second embodiments of the present invention. As shown in the figure, an embodiment of the first 2 shows an example in which a buffer amplifier 11 in front of <br/> switched capacitor circuit 14A for phase inversion and the resistance of the first 1 embodiment. By increasing Q, it is possible to eliminate the need for the inverting amplifier circuit 12A as described above.

[0039]

According to the above invention, since the semiconductor inductor of the equivalent circuit in which the inductance is connected in parallel with the parallel resistance is formed, the sharpness Q in the low range can be increased and the capacitance of the capacitor can be reduced. It is possible to reduce the size of the inductor. Since it is possible to form a semiconductor inductor having an equivalent circuit in which a resistance and an inductance are connected in parallel, it is possible to further increase the sharpness Q. Since it is possible to form a semiconductor inductor having a purely equivalent inductance circuit, it is possible to ideally increase the sharpness Q to infinity. Also, the flexibility of the configuration can be secured. Input resistance of the integration circuit of the semiconductor inductor, the inverting amplifier circuit or the like as a switched capacitor, it is possible to make inductance variable, and it is possible to decrease the peripheral components, it is possible to miniaturize the semiconductor inductor cost Can be down.

[Brief description of drawings]

FIG. 1 is a diagram showing a semiconductor inductance which is a first premise of an embodiment of the present invention.

FIG. 2 is a diagram showing an equivalent circuit of the semiconductor inductance of FIG.

FIG. 3 is a diagram illustrating an effect of the semiconductor inductor of FIG.

FIG. 4 is a diagram showing a semiconductor inductor which is a second premise of the embodiment of the present invention.

5 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG.

FIG. 6 is a diagram showing a semiconductor inductor according to the first embodiment of the present invention.

FIG. 7 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG.

FIG. 8 is a diagram showing a semiconductor inductor according to a second embodiment of the present invention.

9 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG.

FIG. 10 is a diagram showing a semiconductor inductor according to a third embodiment of the present invention.

11 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG.

FIG. 12 is a diagram showing a semiconductor inductor according to a fourth embodiment of the present invention.

13 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG.

FIG. 14 is a diagram showing a semiconductor inductor according to a fifth exemplary embodiment of the present invention.

FIG. 15 is a diagram showing an equivalent circuit of the semiconductor inductor of FIG.

FIG. 16 is a diagram showing a semiconductor inductor according to a sixth embodiment of the present invention.

FIG. 17 is a diagram showing a semiconductor inductor according to a seventh embodiment of the present invention.

FIG. 18 is a diagram showing a semiconductor inductor according to an eighth example of the present invention.

FIG. 19 is a diagram showing a semiconductor inductor according to a ninth embodiment of the present invention.

20 is a diagram showing a semiconductor inductor according to a first 0 embodiment of the present invention.

21 is a diagram showing a semiconductor inductor according to a first 1 of the embodiment of the present invention.

22 is a diagram showing a semiconductor inductor according to the first and second embodiments of the present invention.

FIG. 23 is a diagram showing an equalizer circuit using a conventional semiconductor inductor.

[Explanation of symbols]

10A ... integrator 11 ... buffer amplifier 12A ... inverting amplifier circuit 13A ... emitter follower 14A ... switched capacitor 20 ... switched capacitor R ₁₂ ... resistance

─────────────────────────────────────────────────── --- Continuation of the front page (56) Reference JP-A-53-114643 (JP, A) JP-A-59-175209 (JP, A) JP-A-60-177716 (JP, A) JP-A-62-1 10914 (JP, A) JP 53-18362 (JP, A) JP 51-108745 (JP, A) JP 54-96341 (JP, A) Actual development 55-112924 (JP, U) Actual Kohei 7-14916 (JP, Y2) (58) Fields investigated (Int.Cl. ⁷ , DB name) H03H 11/48 H03H 11/46

Claims (5)

(57) [Claims] 1. A semiconductor inductor, which forms an inductance without using a coil to convert the inductance of a coil that forms a series resonance circuit with a capacitor into a semiconductor, wherein impedance is converted to cut off an input signal from the capacitor. A buffer amplifier (11), an integrating circuit (10A) using an operational amplifier for integrating the output signal from the buffer amplifier (11), and an inverting amplifier circuit (12A) for inverting the output signal of the integrating circuit (10A). and), the inverted output signal of the inverting amplifier circuit (12A), the output resistance
A semiconductor inductor comprising: an emitter follower (13A) which inputs to an emitter via a resistor , grounds a base, and uses a current of an input signal to the buffer amplifier (11) as a collector current. 2. A semiconductor inductor that forms an inductance without using a coil to make the inductance of a coil that forms a series resonance circuit with a capacitor a semiconductor, and uses an operational amplifier to integrate an input signal from the capacitor. an integration circuit (10A), an inverting amplifier circuit for inverting the output signal of the integrating circuit (10A) (12A), an inverted output signal of the inverting amplifier circuit (12A), the output resistance
A semiconductor inductor comprising: an emitter follower (13A) which inputs to an emitter via a resistor , grounds a base, and uses a current of an input signal to the integrating circuit (10A) as a collector current. 3. The input resistance of the integrating circuit (10A) is
Characterized in that it is an switched capacitor (20) ,
The semiconductor inductor according to claim 1 . 4. A semiconductor inductor, which forms an inductance without using a coil to convert the inductance of a coil that forms a series resonance circuit with a capacitor into a semiconductor, wherein impedance is converted to cut off an input signal from the capacitor. A buffer amplifier (11), an integrating circuit (10A) using an operational amplifier for integrating the output signal from the buffer amplifier (11), and an inverting amplifier circuit (12A) for inverting the output signal of the integrating circuit (10A). ) Based on the inverted output signal of the inverting amplifier circuit (12A)
And an input to an emitter follower to the collector current of current input signal to the buffer amplifier (11) (13A), said inverting amplifier circuit (12A) and said integrating circuit (10
The input resistance (R ₁₁ ) of A) is switched capacitor (14)
A semiconductor inductor characterized in that 5. A semiconductor inductor in which an inductance is formed without using a coil to make the inductance of a coil that forms a series resonance circuit with a capacitor a semiconductor, and an inverting amplifier circuit that inverts an input signal from the capacitor.
(12A) and the inverted output signal of the inverting amplifier circuit (12A) are integrated.
For this purpose, an integrating circuit (10A) using an operational amplifier and an output signal of the integrating circuit (10A) are input to the base before
A branch obtained by branching the input signal to the inverting amplifier circuit (12A).
Emitter follower with signal as collector current (13A)
With the door, said inverting amplifier circuit (12A) and said integrating circuit (10
The input resistance (R ₁₁ ) of A) is switched capacitor (14)
A semiconductor inductor characterized in that