JP3421234B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using indium phosphide (InP) as a substrate and a manufacturing method thereof, which is manufactured by forming a thin film of a III-V group compound semiconductor by a crystal growth technique.

[0002]

2. Description of the Related Art Generally, a high mobility transistor (HEMT) or a field effect transistor made of a III-V group compound semiconductor grows a crystal of the III-V group compound semiconductor on a substrate of the III-V group compound semiconductor. It is produced by Recently, in order to operate at high speed, InP is used for the substrate, and indium aluminum arsenide (InAlAs) and indium gallium arsenide (InGa) are further formed on the substrate.
A device in which a laminated structure of As) and InP is grown has been proposed. Hereinafter, the HEMT using InP for the substrate will be described as an example. As shown in FIG. 5, in the HEMT,
A buffer layer 502 made of InAlAs is formed on a substrate 501 made of InP, and a channel layer 503 made of InGaAs is formed thereon.

InAlA is formed on the channel layer 503.
n-InAlAs via the spacer layer 504 of s
And a carrier supply layer 505 made of
A barrier layer 506 made of nAlAs is formed.
A gate electrode 508 formed by Schottky junction is arranged on the barrier layer 506. In addition, the source electrode 5 is separated from the gate electrode 508 by a predetermined distance.
10 and the drain electrode 511 are formed in ohmic contact with the contact layer 507 made of n-InGaAs interposed therebetween.

In this HEMT, electrons supplied from the carrier supply layer 505 form a two-dimensional electron gas at the interface of the channel layer 503 on the spacer layer 504 side. The flow of electrons moving in the two-dimensional electron gas between the region under the source electrode 510 and the region under the drain electrode 511 is controlled by the voltage applied to the gate electrode 508. Since the electrons, which are carriers, move in the two-dimensional electron gas, they are prevented from being scattered by the donor impurities and can move at high speed.

The crystal growth of the compound semiconductor required for manufacturing these devices is usually performed by the metal organic chemical vapor deposition (MOVP) method.
E) or molecular beam epitaxial growth method (MBE) is used. Among them, the MOVPE method is generally used when it is necessary to grow a crystalline material containing P. For example, in forming the buffer layer 502 described above, I
On a substrate 501 made of nP, In
Crystals of AlAs will be grown by MOVPE, for example. In the crystal growth of InAlAs on InP, for example, an In raw material such as trimethylindium (TMI), an Al raw material such as trimethylaluminum (TMA), and arsine (As
It is made by supplying As raw material such as H ₃ ).

[0006] However, when the substrate made of InP is heated, P constituting the substrate has a characteristic of being easily evaporated, so that P comes out from the substrate. Therefore, phosphine (P
It is necessary to supply P raw material such as H ₃ ). Here, in order to start the crystal growth of InAlAs, an indium (In) raw material, an aluminum (Al) raw material, and arsenic (A).
s) If the phosphorus (P) raw material remains at the stage of supplying the raw material, the interface between InAlAs and InP of the substrate cannot be sharply formed. For this reason, the supply of the P raw material is once interrupted for the predetermined time A, and then the As is supplied for the predetermined time B.
The In source and the Al source are supplied only after supplying the source gas, and the InAlAs crystal growth is started after the P source is not present on the substrate.

[0007]

[Problems to be Solved by the Invention] However, InP
Since P has a property of easily evaporating, P is desorbed from the InP substrate and an In layer portion is formed on the surface when the supply interruption time of the p raw material is set to be long. When the As source gas is next supplied in this state, amorphous (or polycrystalline) InA is added to the In layer on the surface of the InP substrate.
s is generated. And InAs on this InP substrate
Are agglomerated three-dimensionally into islands due to their characteristics. That is, in the initial stage of the InAlAs crystal growth process, InP
A large number of minute projections made of InAs are formed on the substrate. InAlAs or InGaA on this surface
When s is grown, InAs projections that have been aggregated in an island shape serve as a source of defects, and surface defects occur in the grown layer.

In the HEMT shown in FIG. 5 described above,
The surface defect will occur on the substrate 501. The surface defect affects the uppermost contact layer 507, and the carrier moves in the channel layer 50.
In the case of 3, the defect is present. in this way,
A transistor having a defect in a region where carriers move cannot obtain desired characteristics. In order to suppress the generation of amorphous (or polycrystalline) InAs, which causes defects, the method of shortening the time for A and B described above is considered to be effective, but in the MOVPE method, the growth temperature is reduced. Is 600 ° C or higher, so even if A = B = 0,
At the initial stage of growth of InAlAs, desorption of P from InP occurs and InAs is formed, so that it is currently difficult to eliminate surface defects.

The present invention has been proposed to solve these problems, and suppresses the occurrence of defects that cause characteristic deterioration in a semiconductor device such as a HEMT made of a compound semiconductor using a substrate made of InP. The purpose is to

[0010]

A semiconductor device of the present invention includes a substrate made of indium phosphide (InP) and indium aluminum arsenide or indium disposed on the substrate.
And at least includes a semiconductor device and a crystal layer made of indium gallium arsenide, on the substrate, comprising at least indium (In) and phosphorus (P), the rate of desorption of P an In
Indium aluminum phosphide (InAlP) or indium gallium phosphide (I) which is a compound semiconductor slower than P
The protective layer is made of nGaP) and has a thickness less than the critical thickness at which misfit dislocations occur due to lattice mismatch, for example, more than 0.3 nm and 10 nm or less. Therefore, in this semiconductor device, indium is suppressed in a state in which P is prevented from coming out from the substrate surface.
From aluminum or indium gallium arsenide
Crystal layer is formed consisting. Also, a substrate made of InP, a buffer layer made of InP formed on the substrate, and indium aluminum arsenide arranged thereon .
Or a least includes a semiconductor device and a crystal layer made of indium gallium arsenide, in the buffer layer includes at least In and P, desorption rate of P is InP
InAlP or InGa which is a slower compound semiconductor
P, which is less than the critical film thickness at which misfit dislocations occur due to lattice mismatch, for example, thicker than 0.3 nm 10
The protective layer having a thickness of nm or less was formed. Accordingly, the semiconductor device is in a state in which it is suppressed P comes out from the buffer layer surface, indium A
Made of aluminum or indium gallium arsenide
Crystal layer is formed. Further, according to the method of manufacturing a semiconductor device of the present invention, a protective layer made of InAlP or InGaP, which is a compound semiconductor containing at least In and P and having a desorption rate of P slower than InP, is formed on a substrate made of InP. after Misufuitto dislocations formed below the critical thickness that occurs, the film thickness is, for example greater than 0.3 nm 10 nm or less by matching, indium aluminum arsenide
A crystal layer made of elemental or indium gallium arsenide was formed. Therefore, according to this method of manufacturing a semiconductor device, indium aluminum arsenide or indium
When forming a crystal layer made of umgallium arsenide ,
It is possible to prevent P from escaping from the surface of the substrate. And
According to the method of manufacturing a semiconductor device of the present invention, a buffer layer is formed on a substrate, and then at least In and P are formed on the buffer layer.
And a protective layer made of InAlP or InGaP, which is a compound semiconductor having a slower desorption rate of P than InP, is less than the critical thickness at which misfit dislocations occur due to lattice mismatch, for example, more than 0.3 nm and 10 nm or less. After forming the film thickness, indium aluminum arsenic
Was made to form a crystal layer of indium gallium arsenide . Therefore, according to this method of manufacturing a semiconductor device, indium aluminum arsenide or indium arsenide is used.
When the crystal layer made of arsenic is formed, P is prevented from escaping from the surface of the buffer layer.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION First, an outline of the present invention will be described. The present invention has a thickness of not more than a critical film thickness (a film thickness at which misfit dislocations are generated due to lattice mismatch) on an InP substrate or an InP grown crystal. , P desorption rate is In
The compound semiconductor of group III and P, which is slower than P, is grown as a protective layer to reduce the surface defects generated due to the formation of InAs.

As described above, the generation of surface defects is caused by the generation of InAs on the surface of the substrate, which is caused by the evaporation of P from InP which is the substrate for crystal growth. In addition, the desorption rate at this time depends on the bonding force between the group III atom and the group V atom forming the compound semiconductor. on the other hand,
Al or Ga, which has a stronger bond with P than InP
It is known that the desorption rate of P from AlP and GaP having N is small (N. Kobayashi et al., Jpn.J.Appl.Ph).
ys., 30 (1991) L1699). Therefore, aluminum phosphide (AlP), gallium phosphide (GaP), or indium aluminum phosphide (InAlP), indium gallium phosphide (InGaP), indium aluminum gallium, which is a mixed crystal of these, is formed on InP, which is a substrate for crystal growth. When a material such as phosphorus (InAlGaP) is grown as the protective layer, it is possible to reduce the desorption rate of P on the growth surface.

For example, when growing an InAlAs crystal on InP, a source gas of group III In and Al is used. Therefore, it is necessary to grow an InAlP or AlP crystal as a protective layer. This is preferable because the sequence becomes simple and the consumption of new raw material is not required. Further, when considering the lattice constant of the InP substrate, InAlP has a larger critical film thickness than AlP. Therefore, the use of InAlP makes it easier to control the formation of the protective layer. For the same reason, InGaA on InP
When growing s, the method of inserting an InGaP crystal as a protective layer is simple and has good controllability. However, it is possible to reduce defects even when the above-mentioned material such as GaP, AlP, InAlGaP or the like is formed as the protective layer.

Embodiments of the present invention will be described below with reference to the drawings. First Embodiment FIG. 1 is a sectional view showing a structure of a semiconductor device according to a first embodiment of the present invention. The structure will be described. In the first embodiment, the substrate 101 made of InP is used.
A protective layer 101a made of InAlP is newly provided on the top, and a buffer layer 102 made of InAlAs is formed thereon. After that, the channel layer 103 made of InGaAs is first formed on the buffer layer 102 in the same manner as the above-described conventional configuration.

InAlA is formed on the channel layer 103.
carrier supply layer 105 made of n-InAlAs doped with Si via a spacer layer 104 made of s
Is formed on the barrier layer 1 made of InAlAs
06 is formed. Then, the gate electrode 108 is formed on the barrier layer 106 by Schottky junction. Further, a source electrode 110 and a drain electrode 111 are ohmic-bonded to each other via a contact layer 107 made of n-InGaAs doped with Si at a predetermined distance from the gate electrode 108.

FIG. 2 shows a source gas supply sequence when crystallizing the buffer layer 102 on the substrate 101 shown in FIG. 1 through the protective layer 101a.
(A) shows the supply state of P source gas (PH ₃ ),
(B) shows the supply state of As raw material gas (AsH ₃ ). Further, (c) shows the supply state of the In source gas (TMI), and (d) shows the supply state of the Al source gas (TMA). Then, the thickness of the inserted protective layer 101a made of InAlP crystal is I as well as P source gas.
It can be adjusted by changing the time T for supplying the n source gas and the Al source gas. As described above, according to the first embodiment, the buffer layer 10 is provided by providing the protective layer 101a.
Since No. 2 is formed, it is possible to suppress the generation of protrusions of InAs aggregated in an island shape on the base on which the buffer layer 102 is formed. As a result, according to the first embodiment, generation of surface defects due to the InAs protrusions is suppressed.

In the case of compound semiconductor crystal growth by MOVPE method, trimethylindium (TMI) and triethylindium (TE) are used as the group III source gas.
I), trimethyl aluminum (TMA), triethyl aluminum (TEA), trimethyl gallium (TM)
G), an organometallic compound of triethylgallium (TEG) is used. On the other hand, as group V source gas, arsine (AsH ₃ ), phosphine (PH ₃ ) hydride,
Organometallic compounds such as tert-butylarsine (TBA) and tert-butylphosphine (TBP) may be used in some cases.

Second Embodiment Next, as a second embodiment of the present invention, an InP buffer layer of the same material is grown on an InP substrate, and then the high electron mobility transistor structure (shown in FIG. 1 is used. Two
The following describes the case where layers (7 to 7) are formed. In the case of the second embodiment, first, the temperature of the InP substrate is raised to 600 ° C. while supplying the P source gas, and then the temperature of FIG.
As shown in (a) and (c), In together with P source gas
A source gas is supplied to grow an InP buffer layer having a film thickness of 100 nm. Next, as shown in FIG. 3C, after the supply of the In source gas is temporarily stopped from the time point t1 to the time point t2, as shown in FIGS. 3A, 3C and 3D. Then, from time t2 to time t3, P source gas and I
The n source gas and the Al source gas are supplied for a short time to form the protective layer. The thickness of the protective layer made of the InAlP crystal to be inserted changes the time T between the time point t2 and the time point t3 when the In source gas and the Al source gas are supplied together with the P source gas, as in the first embodiment. It can be adjusted.

Thereafter, as shown in FIGS. 3 (a) and 3 (b), the supply of the P source gas is stopped and the supply of the As source gas is started at the time t3 to grow the buffer layer made of InAlAs. To do. At this time, since the protective layer is formed also in the second embodiment, InAlA
The generation of InAs protrusions that are aggregated in an island shape is suppressed on the base on which the buffer layer made of s is formed. As a result, also in the second embodiment, the occurrence of surface defects due to the InAs protrusions is suppressed, and by forming each layer as in the first embodiment described above, the first embodiment described above is formed. A HEMT similar to the above is obtained.

The thickness of the protective layer will be described below. FIG. 4 shows changes in the surface defect density when the thickness of the protective layer (InAlP) to be inserted is changed. To evaluate the surface defect density, a defect of 1 μm or more was evaluated using a Normalsky microscope. In FIG. 4, white circles represent the case of the first embodiment, and show the case where the protective layer is formed on the substrate made of InP and the buffer layer made of InAlAs is formed thereon. The white square is the case of the second embodiment, in which the buffer layer made of InP is formed on the substrate made of InP, and then the protective layer is formed thereon.
The case where a buffer layer made of InAlAs is formed thereon is shown.

From FIG. 4, in both cases, 8 × 10 ⁴ is obtained when the protective layer InAlP is not inserted.
The surface defect, which had a density of cm ^-2 , is a monolayer of InAl.
By inserting a protective layer made of P, it is suddenly more than 2 digits,
Moreover, it can be seen that it has been reduced to 10 ³ cm ^-2 or less, which is practically no problem. Furthermore, it was confirmed that the surface defect density was reduced to about 10 cm ⁻² by inserting the protective layer of four molecular layers.

As described above, the InP substrate or I
When growing an InAlAs crystal on an nP grown crystal, I
Insertion of the nAlP crystal (protective layer) has the effect of reducing surface defects. However, the lattice constant (about 0.565 nm) of the InAlP crystal inserted here is significantly different from the lattice constant (about 0.587 nm) of the InP crystal. For this reason,
When the thickness of the protective layer is increased, misfit dislocations occur due to lattice mismatch relaxation. A dislocation pattern called crosshatch is generated on the surface where the dislocation occurs, and even if an InAlAs crystal is grown on such a growth surface, it is not easy to erase the dislocation pattern. Therefore, I
The film thickness of InAlP inserted at the nAlAs / InP interface is preferably set to be equal to or less than the thickness (critical film thickness) at which misfit dislocations occur.

In order to estimate the critical film thickness, "Ma
tthews ”formula (eg, JW Matthews et a1., J.
Crystal.Growth, 27 (1974) 118) is generally used. When the critical film thickness of the InAlP crystal having the above-mentioned lattice constant is calculated using this formula, it becomes about 10 nm. Therefore, the layer thickness of InAlP is 0.3 nm (1 layer)
It is possible to design in the range from 10 nm to 10 nm.

In the above, InAl is formed on the InP substrate.
Although the case of growing an As crystal is shown, the present invention can be applied to the case of growing an InGaAs crystal on an InP substrate. In addition to InAlP, the crystal to be inserted is Al
P, GaP and InAlGaP are conceivable. Further, when the buffer layer made of the same material as the substrate is formed on the substrate as in the second embodiment, after growing the InP buffer layer,
The case where InAlP is grown after the time (PH ₃ purge) for supplying only PH ₃ after InP growth is shown, but the same effect can be expected without the PH ₃ purge.

In the above description, MOVPE is used for crystal growth.
By using the method, TMI, TMA, AsH ₃ , P
The case where H ₃ is used is shown, but other TEI, T
It can also be applied to growth using EA, TMG, TEG, TBP and TBAs. Also, for crystal growth, MOVP
The MBE method may be used instead of the E method. Recently, even in the MBE method, it has become possible to grow a crystal of a P-based material by using a P cracking cell. In this MBE method, metal raw materials of In, Al, Ga, P, As are heated and
Crystals are grown by evaporating and irradiating it on the substrate. Therefore, even in the crystal growth by the MBE method,
As in the first and second embodiments, by forming the protective layer, defects of the device to be formed can be suppressed.

[0026]

As described above, according to the present invention, I
A substrate made of nP contains at least In and P, and P
Is a compound semiconductor with a slower desorption rate than InP.
After forming a protective layer of 1P or InGaP to a film thickness that is less than a critical film thickness at which misfit dislocations occur due to lattice mismatch, for example, more than 0.3 nm and 10 nm or less, indium aluminum arsenide or indium
A crystal layer made of mugallium arsenide was formed.
Therefore, since InP is covered with the protective layer without being exposed, indium aluminum arsenide
Moreover, when the crystal layer made of indium gallium arsenide is crystal-grown, the escape of P is suppressed. As a result, indium aluminum arsenic or indium
When a crystal layer made of arsenic is grown, P
It becomes possible to suppress surface defects caused by desorption. Therefore, the present invention is made of a compound semiconductor using a substrate made of InP, for example, HEM.
In a semiconductor device such as T, it has an effect of suppressing the occurrence of surface defects that cause characteristic deterioration.

[Brief description of drawings]

FIG. 1 is a sectional view showing a configuration of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a timing chart showing a source gas supply sequence when crystal growth of the buffer layer 102 is performed via the protective layer 101a in the first embodiment.

FIG. 3 is a timing chart showing a source gas supply sequence when crystal growth of the buffer layer 102 is performed via the protective layer 101a in the second embodiment.

FIG. 4 is a correlation diagram showing changes in surface defect density when the thickness of the protective layer is changed.

FIG. 5 is a cross-sectional view showing a structure of a general HEMT.

[Explanation of symbols]

101 ... Substrate, 101a ... Protective layer, 102 ... Buffer,
103 ... Channel layer, 104 ... Spacer layer, 105 ... Carrier supply layer, 106 ... Barrier layer, 107 ... Contact layer, 108 ... Gate electrode, 110 ... Source electrode, 111
… Drain electrode.

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-9-321387 (JP, A) JP-A-7-249759 (JP, A) JP-A-8-298317 (JP, A) JP-A-5- 160161 (JP, A) JP-A-9-36494 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/203, 21/205

Claims (6)

(57) [Claims] 1. A semiconductor device comprising at least a substrate made of indium phosphide and a crystal layer made of indium aluminum arsenide or indium gallium arsenide arranged on the substrate. A protective layer made of indium aluminum phosphide or indium gallium phosphide, which has a slower speed than indium phosphide, and having a thickness less than the critical thickness at which misfit dislocations occur due to lattice mismatch is formed on the substrate surface. Characteristic semiconductor device. 2. A semiconductor device including at least a substrate made of indium phosphide, a buffer layer made of indium phosphide formed on the substrate, and a crystal layer made of indium aluminum arsenide or indium gallium arsenide arranged thereon. A film of at least a critical thickness at which indium aluminum phosphorus or indium gallium phosphorus, which is a compound semiconductor containing at least indium and phosphorus and whose desorption rate of phosphorus is slower than indium phosphorus, causes misfit dislocations due to lattice mismatch. A semiconductor device, wherein a thick protective layer is formed on the buffer layer. 3. A method of manufacturing a semiconductor device comprising a substrate made of indium phosphide and a crystal layer made of indium aluminum arsenide or indium gallium arsenide arranged on the substrate. In addition, a protective layer made of indium aluminum phosphorus or indium gallium phosphorus, which is a compound semiconductor containing at least indium and phosphorus and in which the desorption rate of phosphorus is slower than indium phosphorus, has a thickness less than the critical thickness at which misfit dislocations occur due to lattice mismatch. After forming to a film thickness, the indium aluminum
A method of manufacturing a semiconductor device, which comprises forming a crystal layer made of arsenic or indium gallium arsenide . 4. A semiconductor composed of a substrate made of indium phosphide, a buffer layer made of indium phosphide formed on the substrate, and a crystal layer made of indium aluminum arsenide or indium gallium arsenide arranged thereon. A method of manufacturing a device, comprising forming the buffer layer on the substrate, and subsequently forming a compound semiconductor containing indium aluminum phosphorus, which contains at least indium and phosphorus, and has a desorption rate of phosphorus slower than indium phosphorus, or a protective layer made of indium gallium phosphide, after Misufuitto dislocations by lattice mismatch was formed to a thickness below the critical thickness that occurs, the i
Indium aluminum arsenide or indium gallium
A method of manufacturing a semiconductor device, comprising forming a crystal layer made of arsenic . 5. The semiconductor device according to claim 1, wherein the protective layer has a thickness of more than 0.3 nm and 10 nm or less. 6. A method according to claim 3 or 4, wherein the thickness of the protective layer, a method of manufacturing a semiconductor device, characterized in that it is thicker 10nm or less than 0.3 nm.