JP3383190B2 - Gradation variable circuit and image processing apparatus using gradation variable circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gradation variable circuit and a gradation variable circuit used when outputting a personal computer (hereinafter abbreviated as personal computer) image, a television image or the like to a display means such as a liquid crystal display. The present invention relates to an image processing device using.

[0002]

2. Description of the Related Art A liquid crystal display having a narrower gradation width that can be displayed by one pixel than a CRT or the like, and a method used when multi-gradation display is performed on the screen is roughly divided into Frame Rate Control. There are two methods (hereinafter referred to as FRC) and dither. The FRC is a method of displaying a halftone of two levels by switching the display gradation of each pixel for each frame. On the other hand, dithering is a technique in which a plurality of pixels are set as one unit and the display gradation of each pixel is operated to increase the number of gradations displayed as one unit. As a known example in which gradations are temporally and spatially changed by combining these FRC and dither, there is, for example, Japanese Patent Laid-Open No. 3-20780.

The configuration of the gradation variable circuit of the image processing apparatus used in the conventional image display apparatus will be described with reference to FIG. In FIG. 4, the gradation variable circuit 10 includes a video signal input terminal 2
0, a timing generation circuit 11, a dither pattern generation circuit 12, and a video signal output terminal 40.

The video signal input from the video signal input terminal 20 is output to the video signal output terminal 40 after the display gradation is increased by the gradation variable circuit 10.

The operation of the gradation variable circuit 10 will be briefly described below. Timing generation circuit 11 of gradation variable circuit 10
Generates timing signals (H, V, F) in the horizontal direction, the vertical direction, and the frame period with respect to the input video signal and supplies the timing signals (H, V, F) to the dither pattern generation circuit 12. The dither pattern generation circuit 12 measures the average gradation using the above timing signals, for example, for one group of pixel data of (2 dots in the horizontal direction × 2 lines in the vertical direction) for the input video signal. Further, a dither pattern for the grouped pixel data is generated.

Here, an example of the dither pattern created by the dither pattern generating circuit 12 will be described with reference to FIG. In Figure 5, (2 dots in horizontal direction x 2 lines in vertical direction)
Among the 4 pixel data of, the brightness output is "0" for the white cells.
, And the black squares represent pixels with a luminance output of "1". In order to simplify the explanation, the input video signal is assumed to have two gradations of which the luminance output is “0” or “4”.
At that time, the average gradation of the above pixel group is {0, 1,
It becomes any one of 5 gradations of 2, 3, 4}. The dither pattern generation circuit 12 generates a dither pattern by grouping 4 pixel data (2 dots in the horizontal direction × 2 lines in the vertical direction) into one group. That is, the brightness output of all four pixels is "0".
When the brightness output of only one pixel is "1", the average gradation is "1", and when the brightness output of two pixels is 1, the average gradation is "2". When the luminance output of three pixels is "1", the average gradation is "3", and when all four pixels output the luminance output of "1", the average gradation is "4".
Therefore, the gradation expression corresponding to the above-mentioned 5 gradations is performed.

Further, among the above four pixels, the luminance output is "
By uniformly rotating the arrangement of the pixels of 0 "and the pixels of which the luminance output is" 1 "at the frame cycle, it is possible to realize uniform gradation expression as a pixel group. That is, when the average gradation is" 1 ". , In frame 0, the upper left pixel is "
1 "luminance is output and the other pixels are luminance output" 0 ",
In frame 1, the upper right pixel outputs a brightness of "1" and the other pixels output a brightness of "0". In frame 2, the lower left pixel outputs a brightness of "1" and the other pixels output a brightness of "0". In frame 3, the lower right pixel outputs the brightness of “1” and the other pixels output the brightness of “0”, so that a uniform gradation can be expressed.

In this way, the input video signal is
It is possible to convert and output a video signal capable of displaying more gradations than can be expressed at the time of input.

[0009]

The above-described image display device of the conventional example is effective when displaying a personal computer image or the like which frequently uses a graphic still image, but is mainly composed of a moving image such as a television image. There was an inconvenience when displaying the image. That is, as described above, one pixel is composed of a plurality of frames, and the output of the pixel is turned ON / OFF, that is, the brightness output is set to "1" or "0", and the brightness output is periodically changed for each frame. The method of performing gradation control by controlling so as to cause an adverse effect such as a contour portion being misaligned in a moving image.

In view of the above problems, the present invention provides a still image / moving image of an input video signal in an image processing apparatus which generates a dither pattern for a digitally sampled video signal input from the outside and outputs it as pixel data. It is possible to change the generation mode of the dither pattern in accordance with the above, and to eliminate the adverse effect that the contour portion of the moving image looks misaligned.

[0011]

In order to solve the above problems, the present invention relates to a digitally sampled video signal input from the outside by combining a plurality of pixels into one unit. In a gradation variable circuit that generates a dither pattern in which the output level of each pixel is variable and outputs it as pixel data, a video signal digitally sampled by the gradation variable circuit and the video signal
An identification signal for identifying one of the moving images is input, and the dither pattern is generated by changing every arbitrary frame according to the identification signal.

In order to solve the above-mentioned problems, the present invention provides an image processing apparatus in which a plurality of video signals which are still images and video signals which are moving images are input, and any one of the plurality of input video signals is input. And a dither in which the output level of each pixel in the one unit is changed as pixel data of the display video signal as a unit by arbitrarily combining a plurality of pixels of the video signal selected by the selection unit. A gradation varying means for generating and outputting a pattern, and a controlling means for generating a control signal and supplying the control signal to the selecting means and the gradation varying means are provided, and the gradation varying means uses the control signal to select the selecting means. When the video signal which is a still image is selected, the dither pattern which is changed for each frame is output, and when the control means selects the video signal which is a moving image, it is changed for each frame. And it outputs a sealed dither pattern.

Further, in order to solve the above-mentioned problems, the present invention is, in an image processing apparatus to which a plurality of video signals are input, a selection means for selecting any of the plurality of input video signals, and the selection means. The discriminating means for discriminating whether the selected video signal is a still image or a moving image and the pixel of the video signal selected by the selecting means are arbitrarily combined to form one unit, which is used as pixel data of the display video signal. Gradation changing means for generating and outputting a dither pattern in which the output level of each pixel in one unit is changed, and control means for controlling selection to the selecting means are provided, and the gradation changing means is the identifying means. When the identification signal indicating a still image is output, the dither pattern changed for each frame is output, and when the identification signal indicates a moving image, the change for each frame is stopped. Shi And to output a dither pattern.

According to the image processing apparatus of the present invention, the dither pattern used for changing the gradation can be created by changing it for each arbitrary frame. Therefore, each of a still image and a moving image can be displayed as an optimum image on a display unit such as a liquid crystal display that requires multi-gradation display.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a gradation variable circuit according to the first embodiment of the present invention. The gradation variable circuit 10 according to the first embodiment includes a video signal input terminal 20, a still image / moving image identification signal input terminal 30, a timing generation circuit 11, a dither pattern generation circuit 12, and a display video signal output. And a terminal 40.

A digitally sampled video signal is input to the video signal input terminal 20. The still image / video identification signal (M) is input to the still image / video identification signal input terminal 30.
Is entered. The still image / moving image identification signal (M) corresponds to, for example, a still image mode / moving image mode switching signal issued from a remote control device operated by the user himself.

The timing generation circuit 11 is a circuit that generates timing for performing FRC and dither based on a video signal, and has timing signals (horizontal direction, vertical direction, frame period) for the input video signal. H,
V, F) is generated and supplied to the dither pattern generation circuit 12.

The dither pattern generation circuit 12 uses the timing signals (H, V, F) and the identification signal (M) to
The video signal is processed to generate a dither pattern and output to the display video signal output terminal 40.

The digitally sampled video signal introduced from the video signal input terminal 20 is input to the timing generation circuit 11 for performing FRC and dither, and the dither pattern generation circuit 12. The identification signal (M) guided from the still image / moving image identification signal input terminal 30 is input to the dither pattern generation circuit 12.

The operation of generating the dither pattern will be described below separately for whether the video signal is a still image or a moving image. When the identification signal (M) specifies the still image mode, the dither pattern generation circuit 12 rotates the generated dither pattern at a frame cycle. For example, as a specific method for performing the rotation operation of the dither pattern as shown in FIG. 5, the timing signal (H, V, F) is used.
By using the pulse signal, a pulse signal that makes a cycle of four frame cycles is generated for each pixel data of (horizontal 2 dots × vertical 2 lines), and the “Hi” level of this pulse signal is set to the pixel luminance data “1”. It can be easily realized by making it correspond. Alternatively, a ROM in which one cycle of four frame cycles is stored is provided in advance, and the combination of the luminance data of each pixel is controlled by using the timing signal (H, V, F) as a read address of the ROM. Then, the rotation operation of the dither pattern can be performed.

On the other hand, when the identification signal (M) specifies the moving image mode, the dither pattern generation circuit 12 stops the rotation of the generated dither pattern. As a specific method of stopping the rotation, for example, the timing signal (F) of the frame period is forcibly fixed to "Low" or "H" in the dither pattern generation circuit 12.
It is only necessary to fix i ".
It is also possible to provide a ROM in which a frame is stored and stop the dither pattern rotation by using the identification signal (M) as a read address so that the fixed pattern is read.

In this way, by inputting together the identification signal for identifying whether the video signal is a still image or a moving image and the video signal, a video signal mainly composed of a still image such as a personal computer image is input. For example, it is possible to uniformize the dither pattern generation during multi-gradation display, and for a video signal such as a television video signal, which is mainly a moving image, an adverse effect of rotating the dither pattern at a frame cycle. It is possible to prevent the problem that the contour portion that has become misaligned appears.

The configuration of the image processing apparatus using the gradation variable circuit according to the second embodiment of the present invention will be described with reference to FIG. 2, which is a block diagram showing the configuration of the image processing apparatus using the gradation variable circuit. Will be explained. This image processing apparatus includes a personal computer video signal input terminal 50 and a television video signal input terminal 6
0, a selector 70, a microcomputer 80, a timing generation circuit 11, a dither pattern generation circuit 12, a video signal input terminal 20, a still image / moving image identification signal input terminal 30, and a display video signal output terminal similar to those shown in FIG. And a gradation variable circuit 10 having 40. Selector 70
Is controlled by the control signal (S) output from the microcomputer 80.
One of the video signals input from the personal computer video signal input terminal 50 or the television video signal input terminal 60 is selected and output to the gradation variable circuit 10.

The gradation variable circuit 10 includes a timing generation circuit 11 for performing FRC and dither on the guided video signal.
And a dither pattern generation circuit 12 are provided. The operation of the timing generation circuit 11 is the same as that described in the first embodiment, and the dither pattern generation circuit 12
A dither pattern is generated using the timing signals (H, V, F) and the control signal (S) output from the microcomputer 80.

The operation for generating the dither pattern will be described below. When the microcomputer 80 outputs the control signal (S) to the selector 70 so as to select the personal computer video signal, the dither pattern generation circuit 12 rotates the generated dither pattern at a frame cycle. For example, as a specific method of performing the rotation operation of the dither pattern as shown in FIG. 5, using the timing signals (H, V, F), (horizontal 2 dots × vertical 2)
This can be easily realized by generating a pulse signal that makes a cycle of four frame cycles for each pixel data of (line) and making the "Hi" level of this pulse signal correspond to the luminance data "1" of the pixel. Alternatively, a ROM in which one cycle of data is stored every four frame periods is provided in advance, and the timing signal (H, V, F) is used as a read address of the ROM to control the combination of the brightness data of each pixel. be able to.

On the other hand, when the microcomputer 80 controls the selector 70 to select the television video signal, the dither pattern generating circuit 12 stops the rotation of the generated dither pattern. As a specific method of stopping the rotation, for example, the timing signal (F) of the frame period is set to the dither pattern generation circuit 1.
It is only necessary to forcibly fix "Low" or "Hi" within 2. Alternatively, a ROM in which the same data is stored for 4 frames may be provided and the fixed pattern may be read by using the control signal (S) as a read address.

This makes it possible to uniformly generate dither patterns when displaying multiple gradations on a personal computer video signal which is mainly a still image, and a video which is mainly a moving image such as a television video signal. With respect to the signal, it is possible to prevent the problem that the contour portion appears to be misaligned, which has been an adverse effect of rotating the dither pattern at the frame cycle.

The configuration of the image processing apparatus according to the third embodiment will be described with reference to FIG. 3, which is a block diagram showing the configuration of the image processing apparatus according to the present invention. This image processing apparatus includes a personal computer video signal input terminal 50, a television video signal input terminal 60, a selector 70, and a microcomputer 80.
A still image / moving image discrimination circuit 90, a timing generation circuit 11 and a dither pattern generation circuit 1 similar to those shown in FIG.
2, a gradation variable circuit 10 having a video signal input terminal 20, a still image / moving picture identification signal input terminal 30, and a display video signal output terminal 40.

The image processing apparatus of the third embodiment shown in FIG. 3 differs from the image processing apparatus of the embodiment shown in FIG. 2 in that the video signal guided by the selector 70 is a still image. Still image / moving image identifying circuit 90 for identifying whether it is a moving image
Is provided.

As a specific method of still image / moving image discrimination performed by the still image / moving image discrimination circuit 90 for an input video signal,
For example, there is a method in which a difference from a video signal delayed by one frame is obtained and identification is performed by summing the difference amounts for all the pixels on the screen. Alternatively, there is a method in which the number of pixels whose difference from the video signal delayed by one frame exceeds a predetermined value is counted and identification is performed by the ratio to the total number of pixels.

The operations of the timing generation circuit 11 and the dither pattern generation circuit 12 are the same as those described in the first embodiment. Briefly, the dither pattern generation circuit 12 generates a dither pattern in the frame cycle when the identification signal (M) output by the still image / moving image identification circuit 90 is in the still image mode. Rotate. On the other hand, when the identification signal (M) is in the moving image mode, the rotation of the dither pattern generated by the dither pattern generation circuit 12 is stopped.

According to the above-described third embodiment, not only a graphic still image but also a television signal is converted into a personal computer image signal to display a moving image scene, or a television in which a still image and a moving image are mixed. Optimal multi-gradation display is possible in any situation when displaying a John video signal.

[0033]

According to the embodiments of the present invention, a still image and a moving image are distinguished from each other for a plurality of input video signals, and a dither pattern effective for multi-gradation display is created by changing every arbitrary frame. Therefore, there is an effect that an optimum image display can be performed on a display unit such as a liquid crystal display that requires multi-gradation display.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a gradation variable circuit according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of an image processing apparatus according to a second embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of an image processing apparatus according to a third embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a conventional gradation variable circuit.

FIG. 5 is a diagram showing an example of a dither pattern generated by a conventional gradation variable circuit.

[Explanation of symbols]

10 gradation variable circuit 11 Timing generation circuit 12 dither pattern generator 20 Video signal input terminal 30 Still image / video identification signal input terminal 40 Display video signal output terminal 50 PC video signal input terminal 60 Television video signal input terminal 70 Selector 80 microcomputer 90 Still image / video identification circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takaaki Matono 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi, Ltd. Video Information Media Division (72) Inventor Takeshi Sakai 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Address Hitachi, Ltd. Video Information Media Division (72) Inventor Koichi Sudo Address: 292 Yoshida-cho, Totsuka-ku, Yokohama City, Kanagawa Prefecture Hitachi Image Information System Co., Ltd. (56) Reference JP-A-7-334131 (JP, A) JP-A-3-20780 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G09G 3/00-3/38 G09G 5/00-5/42

Claims (3)

(57) [Claims] 1. A digitally sampled video signal pixel is arbitrarily combined to form one unit, and as a pixel data of a display video signal, a dither pattern in which the output level of each pixel in the unit is varied is generated and output. In the gradation variable circuit, an identification signal for identifying whether the video signal is a still image or a moving image is input to the gradation variable circuit, and when the identification signal indicates a still image, it changes for each frame. A gradation variable circuit which outputs a dither pattern, and outputs a dither pattern in which a change for each frame is stopped when the identification signal indicates a moving image. 2. An image processing apparatus in which a plurality of video signals which are still images and video signals which are moving images are input, and a selection unit which selects one of the plurality of input video signals,
A plurality of pixels of the video signal selected by the selecting means are arbitrarily combined to form one unit, and as the pixel data of the display video signal, a dither pattern in which the output level of each pixel in the one unit is varied is generated and output. Gradation varying means and control means for generating a control signal and supplying it to the selecting means and the gradation varying means are provided, and the gradation varying means is a video signal in which the selecting means is a still image according to the control signal. When the control means selects the video signal which is a moving image, the dither pattern which is changed for each frame is output when the control means selects the video signal which is a moving image. An image processing device characterized by: 3. In an image processing apparatus to which a plurality of video signals are input, selection means for selecting one of the plurality of input video signals, and whether the video signal selected by the selection means is a still image or a moving image. It is possible to arbitrarily combine the discriminating means for discriminating whether or not the pixel of the video signal selected by the selecting means into one unit, and change the output level of each pixel in the one unit as pixel data of the display video signal. Gradation control means for generating and outputting a dither pattern and control means for controlling selection to the selection means are provided, and the gradation control means receives an identification signal as an identification result of the identification means, When the identification signal indicates a still image, a dither pattern that changes for each frame is output, and when the identification signal indicates a moving image, a dither pattern that stops changing for each frame is output. Image processing device.