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JP3348535B2 - Semiconductor rectifier - Google Patents

Semiconductor rectifier

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Publication number
JP3348535B2
JP3348535B2 JP19915094A JP19915094A JP3348535B2 JP 3348535 B2 JP3348535 B2 JP 3348535B2 JP 19915094 A JP19915094 A JP 19915094A JP 19915094 A JP19915094 A JP 19915094A JP 3348535 B2 JP3348535 B2 JP 3348535B2
Authority
JP
Japan
Prior art keywords
conductivity type
type semiconductor
layer
semiconductor region
metal film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP19915094A
Other languages
Japanese (ja)
Other versions
JPH0864844A (en
Inventor
敬二 桜井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP19915094A priority Critical patent/JP3348535B2/en
Publication of JPH0864844A publication Critical patent/JPH0864844A/en
Application granted granted Critical
Publication of JP3348535B2 publication Critical patent/JP3348535B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】この発明は順方向特性を改善した
半導体整流素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor rectifier having improved forward characteristics.

【0002】[0002]

【従来の技術】従来の半導体整流素子の構造は、pn接
合を使用したものとショットキー接合を使用したものと
に大別される。順電圧降下(VF )の小さい順方向特性
の良好な整流素子(ダイオード)はショットキー接合を
利用したショットキーダイオードが主流である。ショッ
トキーダイオードの順方向特性はバリアメタルと呼ばれ
るショットキー接合を形成する金属膜を変えることによ
り変わり、VF を小さくできる。
2. Description of the Related Art The structure of a conventional semiconductor rectifier is roughly divided into a structure using a pn junction and a structure using a Schottky junction. Forward voltage drop good rectifying device small forward characteristics (V F) (diode) is the mainstream Schottky diode using a Schottky junction. Forward characteristics of the Schottky diode is varied by changing the metal film that forms a Schottky junction called barrier metal, it is possible to reduce the V F.

【0003】[0003]

【発明が解決しようとする課題】しかし、VF を小さく
すると、逆方向耐圧が低下し、逆もれ電流が多くなるた
め、効率の良い整流作用が得にくくなる。また、良好な
逆方向耐圧が得られるpnダイオードはえん層電圧があ
るため、ショットキーダイオードよりVF が大きい。
[SUMMARY OF THE INVENTION] However, reducing the V F, reduces the reverse breakdown voltage, since the reverse leakage current is increased, a good rectification efficiency is hardly obtained. Further, since pn diode excellent reverse breakdown voltage is obtained which is end layer voltage, V F is larger than the Schottky diode.

【0004】この発明は、このような問題点を解決し、
ショットキーダイオードよりVF が小さく、且つ、逆方
向耐圧がショットキーダイオードと同等な半導体整流素
子を提供することにある。
[0004] The present invention solves such a problem,
Smaller V F from the Schottky diode, and, in a reverse breakdown voltage to provide equivalent semiconductor rectifying element and a Schottky diode.

【0005】[0005]

【課題を解決するための手段】この発明は前記の目的を
達成するために、第1導電形半導体層の一主面上に高濃
度第1導電形半導体層を形成し、他主面に一定の間隔で
凹部が形成されるものにおいて、凹部の側面の表面層に
第2導電形半導体領域を選択的に形成し、第2導電形半
導体領域の表面の一部と凹部の底面にショットキー接合
となる第1金属膜を形成し、さらに第1導電形半導体
層、第2導電形半導体領域および第1金属膜のそれぞれ
の表面にオーミック接触する第2金属膜を形成し、前記
凹部の形成により残った凸部の幅をW、第2導電形半導
体領域の深さをX、第1導電形半導体層と第2導電形半
導体領域により形成されるpn接合のn側空乏層の幅を
Wbとすると、
According to the present invention, a high-concentration first conductivity type semiconductor layer is formed on one main surface of a first conductivity type semiconductor layer, and is fixed on the other main surface. Wherein the second conductivity type semiconductor region is selectively formed in the surface layer on the side surface of the recess, and a Schottky junction is formed between a part of the surface of the second conductivity type semiconductor region and the bottom surface of the recess. Forming a first metal film to be formed, and forming a second metal film in ohmic contact with a surface of each of the first conductivity type semiconductor layer, the second conductivity type semiconductor region, and the first metal film ;
The width of the convex portion left by the formation of the concave portion is W, the second conductivity type semiconductor
The depth of the body region is X, the first conductivity type semiconductor layer and the second conductivity type
The width of the n-side depletion layer of the pn junction formed by the conductor region
If Wb,

【0006】[0006]

【数3】 (W/2)−X≦Wb ──────────(1) の関係が成り立つように凹部および第2導電形半導体領
域を形成することが有効である。
## EQU3 ## (W / 2) -X ≦ Wb ────────── (1) recess and a second conductivity type semiconductor territory so that the relationship is established for
It is effective to form a zone.

【0007】また、第2導電形半導体領域を凹部の側面
および底面の表面層に選択的に形成すると効果的であ
る。さらに、凹部の最上部間隔W1と底部間隔W2が
The second conductivity type semiconductor region is formed on the side surface of the concave portion.
It is effective to selectively form
You. Furthermore, the top space W1 and the bottom space W2 of the recess are

【0008】[0008]

【数4】 W1<W2 ──────────── (2) の関係が成り立つように凹部を形成するとよい。また、
第1金属膜がAl、Pt、Mo、CrおよびTiのいず
れか一つを選択するとよい。
## EQU00004 ## It is preferable to form the concave portion such that the relationship of W1 <W2──────────── (2) is satisfied. Also,
It is preferable that the first metal film selects one of Al, Pt, Mo, Cr and Ti.

【0009】[0009]

【作用】この構造は、凹部の形成により残った凸部の幅
をW、第2導電形半導体領域の深さをX、第1導電形半
導体層と第2導電形半導体領域で形成される無電圧時の
pn接合のn側空乏層の幅をWbとした場合、(1)式
の関係が成り立つようにW、Xを決めているため、無電
圧状態で凹部の側面に形成されたpn接合の左右からの
空乏層は接触している。この状態でpn接合が順バイア
スするように電圧を印加すると、まず接触している空乏
層の障壁が低下して電流が流れ出す。電流が大きくなる
と、順電圧降下が大きくなり、ショットキー接合の障壁
(ショットキーバリア)を越え、ショットキーダイオー
ド部も電流が流れるようになる。さらに、電流が大きく
なると、pn接合部にも電流が流れ、第1導電形半導体
層の凹部側の全表面が活性状態になる。そのため、VF
はpnダイオードよりも、また、ショットキーダイオー
ドよりも低くなる。一方、逆方向耐圧は上述のように、
無電圧状態で凹部の側面に形成されたpn接合の左右か
らの空乏層は接触しているため、pn接合が逆バイアス
するように電圧を印加すると接触している空乏層の障壁
が高くなり、電流が流れるのを阻止する。この逆方向耐
圧は完全なpn接合でないため、pnダイオードよりは
低いがショットキーダイオードよりは高い。しかし、凹
部の底部がショットキー接合のため、素子の逆方向耐圧
はショットキーダイオードと同じになる。
According to this structure, the width of the convex portion remaining after the formation of the concave portion is W, the depth of the second conductive type semiconductor region is X, and the first conductive type semiconductor layer and the second conductive type semiconductor region are formed. Assuming that the width of the n-side depletion layer of the pn junction at the time of voltage is Wb, W and X are determined so that the relationship of equation (1) is satisfied. The depletion layers from the left and right are in contact. In this state, when a voltage is applied so that the pn junction is forward-biased, first, the barrier of the depletion layer in contact is lowered, and current starts to flow. As the current increases, the forward voltage drop increases, crosses the barrier of the Schottky junction (Schottky barrier), and the current also flows through the Schottky diode portion. Further, when the current increases, the current also flows through the pn junction, and the entire surface of the first conductivity type semiconductor layer on the concave side is activated. Therefore, V F
Is lower than a pn diode and a Schottky diode. On the other hand, the reverse breakdown voltage is
Since the depletion layers from the left and right sides of the pn junction formed on the side surface of the concave portion are in contact with each other in a non-voltage state, when a voltage is applied so that the pn junction is reverse-biased, the barrier of the depletion layer in contact increases. Prevents current from flowing. Since this reverse breakdown voltage is not a perfect pn junction, it is lower than a pn diode but higher than a Schottky diode. However, since the bottom of the recess is a Schottky junction, the reverse breakdown voltage of the element is the same as that of a Schottky diode.

【0010】また、凹部の最上部間隔が底部間隔より狭
くすることで、通電時の第1導電形半導体層の表面積を
増やしVF を低下させる。さらに、第1金属膜をAl、
Pt、Mo、Cr又はTiを用いることでVF を任意に
選ぶことができる。
Further, by the top gap of the recess is narrower than the bottom gap, reducing the V F increase the surface area of the first conductivity type semiconductor layer during energization. Further, the first metal film is made of Al,
Pt, Mo, it is possible to choose V F arbitrarily by using Cr or Ti.

【0011】[0011]

【実施例】図1はこの発明の一実施例の要部断面図を示
す。ここでは、第1導電形をn形、第2導電形をp形で
説明する。n+シリコン基板1上にn- エピタキシャル
層2を形成したウエハに凹部7が所定の間隔(凸部6の
幅Wに相当)で形成され、凹部7の側面9および底部8
の一部にp+領域3が形成され、さらに、凹部7の底部
全面と側面の一部にショットキー接合を形成する第1金
属膜4が付着しており、凸部6の天井部と凹部7の側面
9および第1金属膜4のそれぞれの表面にオーミック接
触する第2金属膜5が形成されている。ここで、p+
域3の深さXは1ないし3μm、無電圧状態での空乏層
の幅Wbは5ないし10μmであるため、凸部6の幅W
は(1)式に従って12ないし26μmと決めた。ま
た、凹部の最上部間隔W1底部間隔W2より2ないし
5μmいと、VFが数%から10%程度低下する。ま
た、ショットキー接合部のVFを最も低くできる第1金
属はTiであり、耐圧的に有利なのはPtである。
FIG. 1 is a sectional view showing a main part of an embodiment of the present invention. Here, the first conductivity type is described as n-type, and the second conductivity type is described as p-type. Concave portions 7 are formed at predetermined intervals (corresponding to width W of convex portions 6) on a wafer having n epitaxial layer 2 formed on n + silicon substrate 1, and side surfaces 9 and bottom portions 8 of concave portions 7 are formed.
A first metal film 4 for forming a Schottky junction is adhered to the entire bottom surface and a part of the side surface of the concave portion 7, and the p + region 3 is formed on the ceiling portion of the convex portion 6. The second metal film 5 that is in ohmic contact with the side surface 9 of the first metal film 4 and the surface of the first metal film 4 is formed. Here, the depth X of the p + region 3 is 1 to 3 μm, and the width Wb of the depletion layer in a no-voltage state is 5 to 10 μm.
Was determined to be 12 to 26 μm according to the equation (1). Further, to the top spacing W1 of 2 to from the bottom spacing W2 of the recess 5μm narrow the Most, V F drops about 10% from a few%. The first metal can best low V F of the Schottky junction is Ti, the so-voltage manner advantageous is Pt.

【0012】図2に図1の構造の素子とショットキーダ
イオードおよびpnダイオードの特性を同一チップサイ
ズおよびチップ厚みで比較した図を示す。試作した素子
のチップサイズは3mm□程度でチップ厚みは300μ
m程度である。同図(a)は順方向特性、同図(b)は
逆方向特性を示し、目盛りは任意スケールである。順方
向特性はこの発明の構造の素子が最も良く、逆方向特性
はショットキーダイオードと同等の特性を示す。
FIG. 2 shows a comparison of the characteristics of the element having the structure shown in FIG. 1, and the characteristics of the Schottky diode and the pn diode with the same chip size and chip thickness. The chip size of the prototype device is about 3mm □ and the chip thickness is 300μ.
m. FIG. 7A shows the forward characteristic, and FIG. 7B shows the reverse characteristic, and the scale is an arbitrary scale. The device having the structure of the present invention has the best forward characteristics, and the reverse characteristics are equivalent to those of a Schottky diode.

【0013】[0013]

【発明の効果】この発明によれば、第1導電形半導体層
の表面に凹凸を設け、凹部の側面に第2導電形領域を設
け、このpn接合の空乏層が無電圧状態で繋がるよう
に、凸部の幅を決め、凹部の底部にショットキー接合を
設けることで、順方向特性はショットキーダイオードよ
り優れ、逆方向特性はショットキーダイオードと同等で
ある半導体整流素子を得ることができた。
According to the present invention, unevenness is provided on the surface of the first conductivity type semiconductor layer, and the second conductivity type region is provided on the side surface of the recess, so that the depletion layer of the pn junction is connected without voltage. By determining the width of the convex portion and providing a Schottky junction at the bottom of the concave portion, a semiconductor rectifying device having a forward characteristic superior to a Schottky diode and a reverse characteristic equivalent to a Schottky diode could be obtained. .

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の一実施例の要部断面図FIG. 1 is a sectional view of a main part of an embodiment of the present invention.

【図2】この発明の素子とショットキーダイオードおよ
びpnダイオードの特性比較を示す図で、同図(a)は
順方向特性、同図(b)は逆方向特性を示す図
FIGS. 2A and 2B are graphs showing a comparison of characteristics between the element of the present invention, a Schottky diode, and a pn diode. FIG. 2A shows a forward characteristic, and FIG. 2B shows a reverse characteristic.

【符号の説明】[Explanation of symbols]

1 n+ シリコン基板 2 n- エピタキシャル層 3 p+ 領域 4 第1金属膜 5 第2金属膜 6 凸部 7 凹部 8 凹部の底面 9 凹部の側面 W 凸部の幅 X p+ 領域の深さ Wb pn接合の空乏層の幅 W1 凹部の最上部間隔 W2 凹部の底面間隔Reference Signs List 1 n + silicon substrate 2 n - epitaxial layer 3 p + region 4 first metal film 5 second metal film 6 convex portion 7 concave portion 8 bottom surface of concave portion 9 side surface of concave portion W width of convex portion Xp + depth of region Wb Width of depletion layer of pn junction W1 Uppermost interval of concave portion W2 Bottom interval of concave portion

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 29/861 H01L 29/47 H01L 29/872 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 29/861 H01L 29/47 H01L 29/872

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】第1導電形半導体層の一主面上に高濃度第
1導電形半導体層が形成され、他主面に一定の間隔で凹
部が形成されるものにおいて、凹部の側面の表面層に第
2導電形半導体領域が選択的に形成され、第2導電形半
導体領域の表面の一部と凹部の底面にショットキー接合
となる第1金属膜が形成され、さらに第1導電形半導体
層、第2導電形半導体領域および第1金属膜のそれぞれ
の表面にオーミック接触する第2金属膜形成し、 前記凹部の形成により残った凸部の幅をW、第2導電形
半導体領域の深さをX、第1導電形半導体層と第2導電
形半導体領域により形成される無電圧時のpn接合のn
側空乏層の幅をWbとすると 【数1】 (W/2)−X≦Wb の関係が成り立つように凹部および第2導電形半導体領
域を形成す ることを特徴とする半導体整流素子。
2. A semiconductor device according to claim 1, wherein a high-concentration first conductivity type semiconductor layer is formed on one main surface of the first conductivity type semiconductor layer and recesses are formed at regular intervals on the other main surface. A second conductivity type semiconductor region is selectively formed in the layer; a first metal film serving as a Schottky junction is formed on a part of the surface of the second conductivity type semiconductor region and on the bottom surface of the concave portion; layer, the second metal layer in ohmic contact with the respective surfaces of the second conductivity type semiconductor region and the first metal film is formed, the width of the remaining projecting portions by forming the recess W, the second conductivity type
The depth of the semiconductor region is X, the first conductivity type semiconductor layer and the second conductivity type
Of pn junction at the time of no voltage formed by semiconductor region
When the width of the side depletion layer and Wb ## EQU1 ## (W / 2) -X ≦ Wb recess and the second conductivity type semiconductor territory so that the relationship is established for
The semiconductor rectifier element characterized that you form a band.
【請求項2】第2導電形半導体領域が凹部の側面および
底面の表面層に選択的に形成されることを特徴とする請
求項1記載の半導体整流素子。
2. The semiconductor rectifier according to claim 1, wherein the second conductivity type semiconductor region is selectively formed on a surface layer on the side and bottom surfaces of the recess.
【請求項3】凹部の最上部間隔W1と底部間隔W2が 【数2】W1<W2 の関係が成り立つように凹部を形成することを特徴とす
る請求項記載の半導体整流素子。
3. The semiconductor rectifying device according to claim 1 , wherein the concave portion is formed such that the uppermost interval W1 and the lower interval W2 of the concave portion satisfy the following relationship: W1 <W2.
【請求項4】第1金属膜がAl、Pt、Mo、Crおよ
びTiのいずれか一つであることを特徴とする請求項1
記載の半導体整流素子。
4. The method according to claim 1, wherein the first metal film is any one of Al, Pt, Mo, Cr and Ti.
The semiconductor rectifier according to any one of the preceding claims.
JP19915094A 1994-08-24 1994-08-24 Semiconductor rectifier Expired - Fee Related JP3348535B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19915094A JP3348535B2 (en) 1994-08-24 1994-08-24 Semiconductor rectifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19915094A JP3348535B2 (en) 1994-08-24 1994-08-24 Semiconductor rectifier

Publications (2)

Publication Number Publication Date
JPH0864844A JPH0864844A (en) 1996-03-08
JP3348535B2 true JP3348535B2 (en) 2002-11-20

Family

ID=16402988

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19915094A Expired - Fee Related JP3348535B2 (en) 1994-08-24 1994-08-24 Semiconductor rectifier

Country Status (1)

Country Link
JP (1) JP3348535B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2911205B1 (en) * 2012-10-19 2020-12-09 Nissan Motor Co., Ltd Semiconductor device and method for manufacturing same

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE9700141D0 (en) * 1997-01-20 1997-01-20 Abb Research Ltd A schottky diode of SiC and a method of production thereof
JP6163922B2 (en) * 2013-07-10 2017-07-19 日産自動車株式会社 Semiconductor device and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2911205B1 (en) * 2012-10-19 2020-12-09 Nissan Motor Co., Ltd Semiconductor device and method for manufacturing same

Also Published As

Publication number Publication date
JPH0864844A (en) 1996-03-08

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