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JP3325732B2 - Voltage controlled piezoelectric oscillator - Google Patents

Voltage controlled piezoelectric oscillator

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Publication number
JP3325732B2
JP3325732B2 JP30809194A JP30809194A JP3325732B2 JP 3325732 B2 JP3325732 B2 JP 3325732B2 JP 30809194 A JP30809194 A JP 30809194A JP 30809194 A JP30809194 A JP 30809194A JP 3325732 B2 JP3325732 B2 JP 3325732B2
Authority
JP
Japan
Prior art keywords
piezoelectric oscillator
voltage controlled
gate
voltage
controlled piezoelectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP30809194A
Other languages
Japanese (ja)
Other versions
JPH08148937A (en
Inventor
好文 関根
Original Assignee
キンセキ株式会社
好文 関根
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by キンセキ株式会社, 好文 関根 filed Critical キンセキ株式会社
Priority to JP30809194A priority Critical patent/JP3325732B2/en
Publication of JPH08148937A publication Critical patent/JPH08148937A/en
Application granted granted Critical
Publication of JP3325732B2 publication Critical patent/JP3325732B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】ICチップの小型化に適した電圧
制御圧電発振器に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage controlled piezoelectric oscillator suitable for downsizing an IC chip.

【0002】[0002]

【従来の技術】図5に従来技術の一般的な電圧制御圧電
発振器の回路図を示す。一般的なコルピッツの発振回路
の圧電振動子の接地側に可変容量ダイオードD1のカソ
ード側を接地に、アノード側を圧電振動子Xの端子に接
続し、この接続点に抵抗を介して周波数を制御する電圧
を供給する。この電圧制御端子VCの電圧を可変する
と、可変容量ダイオードD1に印加される電圧の変化に
対応して容量が変化して、電圧制御圧電発振器の周波数
が変化する。
2. Description of the Related Art FIG. 5 shows a circuit diagram of a general voltage controlled piezoelectric oscillator according to the prior art. Connect the cathode side of the variable capacitance diode D1 to the ground side and the anode side to the terminal of the piezoelectric vibrator X on the ground side of the piezoelectric vibrator of a general Colpitts oscillation circuit, and control the frequency via a resistor at this connection point Supply voltage. When the voltage at the voltage control terminal VC is varied, the capacitance changes in response to the change in the voltage applied to the variable capacitance diode D1, and the frequency of the voltage controlled piezoelectric oscillator changes.

【0003】[0003]

【発明が解決しようとする課題】従来技術では、電圧制
御圧電発振器の周波数可変範囲を広げようとすると、可
変容量ダイオードD1の容量の可変幅を大きくしなけれ
ばならない。大容量の可変容量ダイオードD1を用いた
電圧制御圧電発振器の発振回路をIC化する場合には、
容量の大きな可変容量ダイオードD1はICチップ内で
広い面積を必要としてICチップが大きくなるという課
題があった。
In the prior art, in order to widen the variable frequency range of the voltage controlled piezoelectric oscillator, the variable width of the variable capacitance diode D1 must be increased. When an oscillation circuit of a voltage controlled piezoelectric oscillator using a large-capacity variable capacitance diode D1 is formed into an IC,
There is a problem that the variable capacitance diode D1 having a large capacity requires a large area in the IC chip and the IC chip becomes large.

【0004】[0004]

【課題を解決するための手段】ミラー効果を利用して小
さい容量で大容量の効果を得ることで、ICのチップを
小型にできて課題を解決した。
By using the Miller effect to obtain a large-capacity effect with a small capacitance, the IC chip can be miniaturized and the problem has been solved.

【0005】[0005]

【背景】近年電子機器が小型化されて来るのに伴い、発
振器も小型化をせまられている。従って発振回路がIC
化されるケースが増大している。まして電圧制御圧電発
振器の周波数可変幅を大きくしようとすると、可変容量
ダイオードD1の容量を大きくする必要があり、そのた
めには、ICチップの面積が広く必要になる。これは、
小型化の方向に逆行する。そこで、増幅度Aの増幅器の
入力と出力間に入れたコンデンサC1を回路の入力側か
ら見た容量Cinは、Cin=(1+A)・C1とな
る。即ち小さい容量で大容量の効果をもたらすミラー効
果を採用した。ミラー効果自体は新しいものではない
が、本発明はミラー効果を利用してICチップの小型化
を図ったばかりでなく、ミラー効果に使用している増幅
器の増幅度を電圧制御することで、容量を大きく変化さ
せている。
2. Description of the Related Art As electronic devices have been miniaturized in recent years, oscillators have also been miniaturized. Therefore, the oscillation circuit is IC
Cases are increasing. In order to increase the frequency variable width of the voltage-controlled piezoelectric oscillator, it is necessary to increase the capacitance of the variable capacitance diode D1, which requires a large IC chip area. this is,
It goes against the direction of miniaturization. Therefore, the capacitance Cin of the capacitor C1 inserted between the input and the output of the amplifier having the amplification factor A as viewed from the input side of the circuit is Cin = (1 + A) · C1. In other words, a mirror effect that provides a large capacity effect with a small capacity is employed. Although the Miller effect itself is not new, the present invention not only uses the Miller effect to reduce the size of the IC chip, but also controls the amplification degree of the amplifier used for the Miller effect by voltage to reduce the capacitance. It has been greatly changed.

【0006】[0006]

【実施例】図3に本発明の(ミラー効果を利用した)実
施例の回路図を示す。本例ではMOSFET(FET
1)を用い、入力端子Y、Y’間の容量Cinは、回路
の増幅度AとコンデンサC1とによりCin=(1+
A)・C1となり、さらに増幅度AはFET1のゲート
電圧Vinを制御することで可変できるので、Cinは
FET1のゲート電圧を制御することで可変できる。
FIG. 3 shows a circuit diagram of an embodiment (using the mirror effect) of the present invention. In this example, the MOSFET (FET
1), the capacitance Cin between the input terminals Y and Y 'is determined by the circuit amplification factor A and the capacitor C1 as Cin = (1+
A) · C1 and the amplification factor A can be varied by controlling the gate voltage Vin of the FET1, so that Cin can be varied by controlling the gate voltage of the FET1.

【0007】(実施例1)図1に本発明の実施例を示
す。本実施例ではトランジスタのコルピッツ回路を用い
ている。圧電振動子Xの一方端は発振部のトランジスタ
Q1のベースに接続され、他端は、MOSFET(FE
T1)のゲートに接続されている。FET1のゲートに
抵抗RGを介して制御電圧VCが印加される。制御電圧
VCにおいてFET1の増幅度が変化させられる。圧電
振動子Xと直列に容量が接続されるが、ミラー効果によ
ってコンデンサC1のよりも見かけ上大きな容量が入っ
ているのと同じであり、4MHzの基本波の圧電振動子
を用いて、図4に示すようにコンデンサC1に10pF
を用いた時に周波数変化量が300×10-6以上を確保
することができた。さらにFET1の特性に配慮するこ
とにより、もっと大きな周波数変化をさせることができ
る。
(Embodiment 1) FIG. 1 shows an embodiment of the present invention. In this embodiment, a Colpitts circuit of transistors is used. One end of the piezoelectric vibrator X is connected to the base of the transistor Q1 of the oscillation section, and the other end is connected to a MOSFET (FE).
T1) is connected to the gate. The control voltage VC is applied to the gate of the FET 1 via the resistor RG. At the control voltage VC, the amplification of the FET 1 is changed. The capacitance is connected in series with the piezoelectric vibrator X, but the capacitance is apparently larger than that of the capacitor C1 due to the Miller effect. As shown in FIG.
When using the method, a frequency variation of 300 × 10 −6 or more could be secured. Further, by considering the characteristics of the FET 1, a larger frequency change can be achieved.

【0008】(実施例2)図2にCMOS回路の発振器
を用いた例を示す。CMOSQ2入力部にFET1を接
続し、ゲート電圧を変化させることにより周波数を変化
させている。なお電圧制御圧電発振器に使用する圧電振
動子は、水晶振動子、セラミック振動子等が使用され
る。
(Embodiment 2) FIG. 2 shows an example using a CMOS circuit oscillator. FET1 is connected to the input of the CMOS Q2, and the frequency is changed by changing the gate voltage. As the piezoelectric vibrator used for the voltage controlled piezoelectric oscillator, a crystal vibrator, a ceramic vibrator, or the like is used.

【0009】[0009]

【発明の効果】本発明により電圧制御圧電発振器の発振
回路をIC化した場合に、大容量の可変容量ダイオード
を使用しないので、チップの大きさを小さくできる効果
があり小型化が可能になり、その上コストも安価にでき
た。
According to the present invention, when the oscillation circuit of the voltage-controlled piezoelectric oscillator is integrated into an IC, a large-capacity variable-capacitance diode is not used, so that the chip size can be reduced and the size can be reduced. In addition, the cost was reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】図1は、本発明の実施例を示すトランジスタに
よる電圧制御圧電発振器の回路図である。
FIG. 1 is a circuit diagram of a transistor-based voltage controlled piezoelectric oscillator according to an embodiment of the present invention.

【図2】図2は、本発明の実施例を示すCMOSによる
電圧制御圧電発振器の回路図である。
FIG. 2 is a circuit diagram of a CMOS voltage controlled piezoelectric oscillator showing an embodiment of the present invention.

【図3】図3は,本発明の実施例を示すミラー効果の回
路図である。
FIG. 3 is a circuit diagram of a Miller effect showing an embodiment of the present invention.

【図4】図4は、本発明の実施例における制御電圧に対
する周波数変化を示すグラフである。
FIG. 4 is a graph showing a frequency change with respect to a control voltage in the example of the present invention.

【図5】図5は,従来技術を示す回路図である。FIG. 5 is a circuit diagram showing a conventional technique.

【符号の説明】[Explanation of symbols]

Q1 トランジスタ Q2 CMOSIC X 圧電振動子 FET1 MOSFET C1 コンデンサ Rf 帰還抵抗 RG 抵抗 D1 可変容量ダイオード Q1 Transistor Q2 CMOSIC X Piezoelectric vibrator FET1 MOSFET C1 Capacitor Rf Feedback resistance RG Resistance D1 Variable capacitance diode

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 トランジスタを用いたコルピッツ型発振
回路を用いた電圧制御圧電発振器において、 該トランジスタのベースに接続された圧電振動子の他の
端子をMOSFETのゲートに接続し、該MOSFET
のゲートとドレイン間にコンデンサを接続し、該MOS
FETのゲートに制御電圧を印加することを特徴とする
電圧制御圧電発振器。
1. A voltage controlled piezoelectric oscillator using a Colpitts type oscillation circuit using a transistor, wherein another terminal of a piezoelectric vibrator connected to a base of the transistor is connected to a gate of a MOSFET, and
A capacitor is connected between the gate and drain of
A voltage controlled piezoelectric oscillator characterized in that a control voltage is applied to a gate of an FET.
【請求項2】 CMOSICインバータの入力と出力間
に帰還抵抗と圧電振動子を並列に接続した発振回路を用
いた電圧制御圧電発振器において、 該CMOSICインバータの入力端子にコンデンサを介
してMOSFETのゲートを接続し、該MOSFETの
ゲートとドレイン間にコンデンサを接続し、該MOSF
ETのゲートに制御電圧を印加することを特徴とする電
圧制御圧電発振器。
2. A voltage controlled piezoelectric oscillator using an oscillation circuit in which a feedback resistor and a piezoelectric vibrator are connected in parallel between an input and an output of a CMOSIC inverter, wherein a gate of a MOSFET is connected to an input terminal of the CMOSIC inverter via a capacitor. And a capacitor is connected between the gate and drain of the MOSFET.
A voltage controlled piezoelectric oscillator characterized in that a control voltage is applied to a gate of an ET.
JP30809194A 1994-11-17 1994-11-17 Voltage controlled piezoelectric oscillator Expired - Fee Related JP3325732B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30809194A JP3325732B2 (en) 1994-11-17 1994-11-17 Voltage controlled piezoelectric oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30809194A JP3325732B2 (en) 1994-11-17 1994-11-17 Voltage controlled piezoelectric oscillator

Publications (2)

Publication Number Publication Date
JPH08148937A JPH08148937A (en) 1996-06-07
JP3325732B2 true JP3325732B2 (en) 2002-09-17

Family

ID=17976764

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30809194A Expired - Fee Related JP3325732B2 (en) 1994-11-17 1994-11-17 Voltage controlled piezoelectric oscillator

Country Status (1)

Country Link
JP (1) JP3325732B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002185253A (en) * 2000-12-13 2002-06-28 Seiko Epson Corp Oscillator circuit
JP4649275B2 (en) * 2005-06-21 2011-03-09 日本電波工業株式会社 Voltage controlled crystal oscillator

Also Published As

Publication number Publication date
JPH08148937A (en) 1996-06-07

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