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JP3314666B2 - Nitride semiconductor device - Google Patents

Nitride semiconductor device

Info

Publication number
JP3314666B2
JP3314666B2 JP15180097A JP15180097A JP3314666B2 JP 3314666 B2 JP3314666 B2 JP 3314666B2 JP 15180097 A JP15180097 A JP 15180097A JP 15180097 A JP15180097 A JP 15180097A JP 3314666 B2 JP3314666 B2 JP 3314666B2
Authority
JP
Japan
Prior art keywords
nitride semiconductor
layer
semiconductor layer
type impurity
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP15180097A
Other languages
Japanese (ja)
Other versions
JPH1168155A (en
Inventor
孝志 向井
傑 窪田
修二 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nichia Corp
Original Assignee
Nichia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nichia Corp filed Critical Nichia Corp
Priority to JP15180097A priority Critical patent/JP3314666B2/en
Publication of JPH1168155A publication Critical patent/JPH1168155A/en
Application granted granted Critical
Publication of JP3314666B2 publication Critical patent/JP3314666B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Landscapes

  • Semiconductor Lasers (AREA)
  • Led Devices (AREA)
  • Photovoltaic Devices (AREA)
  • Light Receiving Elements (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は例えばLED、LD等の
発光素子、太陽電池、光センサー等の受光素子等に用い
られる窒化物半導体(InXAlYGa1-X-YN、0≦X、
0≦Y、X+Y≦1)よりなる素子と、その素子を構成す
る窒化物半導体の成長方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nitride semiconductor (In X Al Y Ga 1 -XYN , 0 ≦ X,
The present invention relates to a device comprising 0 ≦ Y, X + Y ≦ 1) and a method for growing a nitride semiconductor constituting the device.

【0002】[0002]

【従来の技術】窒化物半導体は高輝度青色LED、純緑
色LEDの材料として、本出願人により、フルカラーL
EDディスプレイ、交通信号等で実用化されたばかりで
ある。これらの各種デバイスに使用されるLEDは、n
型窒化物半導体層とp型窒化物半導体層との間に、単一
量子井戸構造(SQW:Single-Quantum- Well)のIn
GaNよりなる活性層が挟まれたダブルへテロ構造を有
している。青色、緑色等の波長はInGaN活性層のI
n組成比を増減することで決定されている。青色LED
は20mAにおいて発光波長450nm、半値幅20n
m、光度2cd、光出力5mW、外部量子効率9.1%
である。一方、緑色LEDは同じく20mAにおいて、
発光波長525nm、半値幅30nm、光度6cd、光
出力3mW、外部量子効率6.3%である。
2. Description of the Related Art A nitride semiconductor is used as a material for a high-brightness blue LED and a pure green LED by the present applicant.
It has just been put to practical use in ED displays and traffic signals. The LEDs used in these various devices are n
Between a p-type nitride semiconductor layer and a p-type nitride semiconductor layer, a single-quantum-well (SQW)
It has a double hetero structure in which an active layer made of GaN is sandwiched. Wavelengths such as blue and green are determined by the IGaN of the InGaN active layer.
It is determined by increasing or decreasing the n composition ratio. Blue LED
Is an emission wavelength of 450 nm and a half width of 20 n at 20 mA.
m, luminous intensity 2 cd, optical output 5 mW, external quantum efficiency 9.1%
It is. On the other hand, the green LED is also at 20 mA,
The emission wavelength is 525 nm, the half width is 30 nm, the luminous intensity is 6 cd, the optical output is 3 mW, and the external quantum efficiency is 6.3%.

【0003】また本出願人は、最近この材料を用いてパ
ルス電流下、室温での410nmのレーザ発振を世界で
初めて発表した{例えば、Jpn.J.Appl.Phys.35(1996)L7
4、Jpn.J.Appl.Phys.35(1996)L217等}。このレーザ素子
は、InGaNを用いた多重量子井戸構造の活性層を有
するダブルへテロ構造を有し、パルス幅2μs、パルス
周期2msの条件で、閾値電流610mA、閾値電流密
度8.7kA/cm2、410nmの発振を示す。改良し
たレーザ素子もまた、Appl.Phys.Lett.69(1996)1477に
おいて発表した。このレーザ素子は、p型窒化物半導体
層の一部にリッジストライプが形成された構造を有して
おり、パルス幅1μs、パルス周期1ms、デューティ
ー比0.1%で、閾値電流187mA、閾値電流密度3
kA/cm 2、410nmの発振を示す。さらに本出願人
は室温での連続発振にも初めて成功し、発表した。{例
えば、日経エレクトロニクス 1996年12月2日号 技術速
報、Appl.Phys.Lett.69(1996)3034、Appl.Phys.Lett.69
(1996)4056 等}、このレーザ素子は20℃において、閾
値電流密度3.6kA/cm2、閾値電圧5.5V、1.
5mW出力において、27時間の連続発振を示す。
[0003] The present applicant has recently used this material to
World's first laser oscillation at room temperature under lus current
First published {for example, Jpn.J.Appl.Phys.35 (1996) L7
4, Jpn.J.Appl.Phys.35 (1996) L217}. This laser element
Has an active layer with a multiple quantum well structure using InGaN.
Pulse width 2μs, pulse width
Under the condition of a cycle of 2 ms, the threshold current is 610 mA and the threshold current density is
8.7 kA / cmTwo, 410 nm oscillation. Improved
Laser element is also described in Appl.Phys.Lett. 69 (1996) 1477.
We announced. This laser device is a p-type nitride semiconductor
With a structure in which a ridge stripe is formed in part of the layer
Pulse width 1μs, pulse period 1ms, duty
-With a ratio of 0.1%, a threshold current of 187 mA and a threshold current density of 3
kA / cm Two, 410 nm oscillation. Further, the applicant
Announced for the first time continuous oscillation at room temperature. {Example
For example, Nikkei Electronics December 2, 1996 issue
, Appl.Phys.Lett.69 (1996) 3034, Appl.Phys.Lett.69
(1996) 4056 et al.], This laser device has a threshold
Value current density 3.6 kA / cmTwo, Threshold voltage 5.5V, 1.
At 5 mW output, it shows continuous oscillation for 27 hours.

【0004】[0004]

【発明が解決しようとする課題】このように窒化物半導
体を用いた発光デバイスはLEDとして既に実用化され
ているが、未だ不十分な点もあり、さらなる発光出力の
向上が望まれている。またLDは実用化を目指して現在
鋭意研究中であり、出力の向上はもちろんのこと、長寿
命化が望まれている。これらLED、LDのような発光
デバイスの発光出力を向上させることができれば、類似
した構造を有する太陽電池、光センサー等の受光デバイ
スの受光効率も同時に向上させることができる。従っ
て、本発明はこのような事情を鑑みて成されたものであ
って、その目的とするところは、新規な窒化物半導体素
子の構造を提供することにより、主としてLED、LD
の出力を向上させることにある。
As described above, the light emitting device using the nitride semiconductor has already been put to practical use as an LED, but there are still insufficient points, and further improvement in the light emitting output is desired. In addition, LDs are currently under intensive research with a view to practical use, and it is desired not only to improve the output but also to extend the life. If the light emission output of a light emitting device such as an LED or LD can be improved, the light receiving efficiency of a light receiving device such as a solar cell or an optical sensor having a similar structure can be improved at the same time. Accordingly, the present invention has been made in view of such circumstances, and an object of the present invention is to provide a novel structure of a nitride semiconductor device, and mainly provide an LED, an LD,
The purpose is to improve the output.

【0005】[0005]

【課題を解決するための手段】本発明の窒化物半導体素
子は、活性層上部にp型不純物を含む第1の窒化物半導
体層が形成され、その第1の窒化物半導体層上部に、そ
の第1の窒化物半導体層から離れるに従ってp型不純物
濃度が次第に少なくなっている第2の窒化物半導体層を
備え、その第2の窒化物半導体層上部に、第2の窒化物
半導体層の平均p型不純物濃度よりも多い量のp型不純
物を含む第3の窒化物半導体層を有することを特徴とす
る。なお本発明において、活性層と第1の窒化物半導体
層とは接して形成されていなくても良く、また第1の窒
化物半導体層と、第2の窒化物半導体層とは接して形成
されていなくても良く、さらに第2の窒化物半導体層と
第3の窒化物半導体層とは接して形成されていなくても
良い。
According to the nitride semiconductor device of the present invention, a first nitride semiconductor layer containing a p-type impurity is formed on an active layer, and the first nitride semiconductor layer is formed on the first nitride semiconductor layer. A second nitride semiconductor layer whose p-type impurity concentration gradually decreases as the distance from the first nitride semiconductor layer increases, and an average of the second nitride semiconductor layer is formed on the second nitride semiconductor layer. A third nitride semiconductor layer including a p-type impurity in an amount larger than the p-type impurity concentration is provided. In the present invention, the active layer and the first nitride semiconductor layer do not have to be formed in contact with each other, and the first nitride semiconductor layer and the second nitride semiconductor layer are formed in contact with each other. The second nitride semiconductor layer and the third nitride semiconductor layer need not be formed in contact with each other.

【0006】さらに本発明の窒化物半導体素子は、前記
第2の窒化物半導体層が複数の窒化物半導体層が積層さ
れた多層膜よりなり、その多層膜のp型不純物が段階的
に少なくなっていることを特徴とする。
Further, in the nitride semiconductor device according to the present invention, the second nitride semiconductor layer is formed of a multilayer film in which a plurality of nitride semiconductor layers are stacked, and the p-type impurity of the multilayer film is reduced stepwise. It is characterized by having.

【0007】さらに本発明の窒化物半導体素子は、前記
第1の窒化物半導体層は互いに組成の異なる2種類の窒
化物半導体層が積層されてなる超格子層であることを特
徴とする。さらに本発明の窒化物半導体素子は、第1の
窒化物半導体層はAl Ga 1−X N(0≦X≦1)よ
りなり、前記第3の窒化物半導体層はAl Ga 1−X
N(0≦X≦0.3)よりなることを特徴とする。さら
に本発明の窒化物半導体素子は、前記第2の窒化物半導
体層は第3の窒化物半導体層と同一の組成よりなること
を特徴とする。さらに本発明の窒化物半導体素子は、前
記第1の窒化物半導体層のp型不純物濃度は1×10
18 /cm 以上、1×10 21 /cm 以下であるこ
とを特徴とする。さらに本発明の窒化物半導体素子は、
前記第3の窒化物半導体層のp型不純物濃度は1×10
18 /cm 以上、1×10 21 /cm 以下であるこ
とを特徴とする。さらに本発明の窒化物半導体素子は、
前記活性層は少なくともInを含む窒化物半導体層を含
む単一量子井戸構造、または多重量子井戸構造であるこ
とを特徴とする。
Further, the nitride semiconductor device according to the present invention is characterized in that the first nitride semiconductor layer is a superlattice layer formed by laminating two types of nitride semiconductor layers having different compositions from each other. Further, the nitride semiconductor device of the present invention has a first aspect.
Nitride semiconductor layer is Al X Ga 1-X N ( 0 ≦ X ≦ 1)
And the third nitride semiconductor layer is formed of Al x Ga 1-x
N (0 ≦ X ≦ 0.3). Further
The nitride semiconductor device according to the present invention is characterized in that the second nitride semiconductor
The body layer has the same composition as the third nitride semiconductor layer
It is characterized by. Further, the nitride semiconductor device of the present invention
The p-type impurity concentration of the first nitride semiconductor layer is 1 × 10
18 / cm 3 or more and 1 × 10 21 / cm 3 or less
And features. Further, the nitride semiconductor device of the present invention
The p-type impurity concentration of the third nitride semiconductor layer is 1 × 10
18 / cm 3 or more and 1 × 10 21 / cm 3 or less
And features. Further, the nitride semiconductor device of the present invention
The active layer has a single quantum well structure including a nitride semiconductor layer containing at least In or a multiple quantum well structure.

【0008】[0008]

【発明の実施の形態】図1は本発明の一実施例に係る窒
化物半導体素子の構造を示す模式的な断面図であり、具
体的にはLED素子の構造を示している。素子構造とし
ては、サファイアよりなる基板1の上に、GaNよりな
るバッファ層2、SiドープGaNよりなるn側コンタ
クト層3(兼n側クラッド層)、膜厚30オングストロ
ームの単一量子井戸構造のInGaNよりなる活性層
4、MgドープAlGaNよりなる第1のp側窒化物半
導体層5、Mgが傾斜ドープされたGaNよりなる第2
のp側窒化物半導体層6、Mg平均濃度が第2のp側窒
化物半導体層6よりも多くドープされたGaNよりなる
第3のp側窒化物半導体層7が積層されてなっている。
第3のp側窒化物半導体層7のほぼ全面には、透光性の
金属薄膜よりなるp電極8が形成され、その全面電極8
の隅部にはボンディング用のパッド電極9が形成されて
いる。一方p側窒化物半導体層側からエッチングして露
出されたn側コンタクト層3の表面にはn電極10が形
成されている。
FIG. 1 is a schematic sectional view showing the structure of a nitride semiconductor device according to one embodiment of the present invention, and specifically shows the structure of an LED device. The element structure is such that a buffer layer 2 made of GaN, an n-side contact layer 3 (also serving as an n-side cladding layer) made of GaN doped with Si, and a single quantum well structure having a thickness of 30 Å are formed on a substrate 1 made of sapphire. An active layer 4 made of InGaN, a first p-side nitride semiconductor layer 5 made of Mg-doped AlGaN, and a second p-side nitride semiconductor layer 5 made of GaN doped with Mg in an inclined manner.
And a third p-side nitride semiconductor layer 7 made of GaN doped with a higher average Mg concentration than the second p-side nitride semiconductor layer 6.
On almost the entire surface of the third p-side nitride semiconductor layer 7, a p-electrode 8 made of a light-transmitting metal thin film is formed.
A pad electrode 9 for bonding is formed at the corner of the. On the other hand, an n-electrode 10 is formed on the surface of the n-side contact layer 3 exposed by etching from the p-side nitride semiconductor layer side.

【0009】また、図2にこのLED素子をSIMS
(二次イオン質量分析装置)により分析したデータを示
す。Mgは濃度を示し、Inは二次イオン強度でもって
示している。つまりInピークは活性層の位置を示し、
Mgは活性層よりもp層側に分布していることを示して
いる。この図では最上層からCsイオンでLED素子を
スパッタして、出てくる元素を分析し、横軸に深さ、縦
軸にMg濃度と、In強度をとって示している。このよ
うに、本発明の素子では、Mg濃度が活性層から離れる
に従って次第に小さくなるように調整された窒化物半導
体層を有している。
FIG. 2 shows this LED element as a SIMS
The data analyzed by (secondary ion mass spectrometer) are shown. Mg indicates the concentration, and In indicates the secondary ionic strength. That is, the In peak indicates the position of the active layer,
This indicates that Mg is distributed more on the p layer side than the active layer. In this figure, the LED element is sputtered with Cs ions from the uppermost layer, and the elements that come out are analyzed. The horizontal axis shows the depth, and the vertical axis shows the Mg concentration and In intensity. Thus, the device of the present invention has the nitride semiconductor layer adjusted so that the Mg concentration gradually decreases as the distance from the active layer increases.

【0010】本発明の素子ではp型不純物を含む第1の
窒化物半導体層5の上に、p型不純物が傾斜ドープされ
た第2のp側窒化物半導体層6を有している。この第2
のp側窒化物半導体層はこのようにp側不純物が傾斜ド
ープされることによって、発光素子出力を向上させるこ
とができる。即ち、コンタクト層として作用するp型不
純物が高濃度にドープされた第3のp側窒化物半導体
と、その第3のp側窒化物半導体層よりも活性層に接近
した位置に、p型不純物が傾斜ドープされた第2のp側
窒化物半導体、さらに第2の窒化物半導体よりも活性層
に接近した位置にp型不純物が高濃度にドープされた第
1のp側窒化物半導体とを備えることにより、コンタク
ト層側から注入されるキャリアを、活性層に貯まりやす
くできるために、素子全体の出力を向上させることがで
きる。
[0010] The device of the present invention has a second p-side nitride semiconductor layer 6 to which a p-type impurity is graded doped, on the first nitride semiconductor layer 5 containing a p-type impurity. This second
In the p-side nitride semiconductor layer, the output of the light-emitting element can be improved by the graded doping of the p-side impurity. That is, a third p-side nitride semiconductor doped with a p-type impurity which acts as a contact layer at a high concentration, and a p-type impurity located at a position closer to the active layer than the third p-side nitride semiconductor layer. And a first p-side nitride semiconductor doped with a higher concentration of p-type impurities at a position closer to the active layer than the second nitride semiconductor. With the provision, carriers injected from the contact layer side can be easily stored in the active layer, so that the output of the entire device can be improved.

【0011】活性層4は少なくともInを含む窒化物半
導体層を含む単一量子井戸構造、若しくは多重量子井戸
構造とする。井戸層は膜厚100オングストローム以
下、さらに好ましくは70オングストローム以下のIn
XGa1-XN(0<X≦1)で構成することが望ましく、
また障壁層は井戸層よりもバンドギャップエネルギーが
大きいInYGa1-YN(0≦Y<)、若しくはAlX'
1-X'N(0<X'≦1)を200オングストローム以
下、さらに好ましくは150オングストローム以下の膜
厚で構成することが望ましい。
The active layer 4 has a single quantum well structure including a nitride semiconductor layer containing at least In or a multiple quantum well structure. The well layer has a thickness of 100 angstrom or less, more preferably 70 angstrom or less.
It is desirable to constitute in X Ga 1-X N (0 <X ≦ 1),
The barrier layer has a band gap energy higher than that of the well layer, ie, In Y Ga 1 -Y N (0 ≦ Y <) or Al X ′ G.
It is desirable that a 1-X ′ N (0 <X ′ ≦ 1) be formed to a thickness of 200 Å or less, more preferably 150 Å or less.

【0012】第1のp側窒化物半導体層5はp型不純物
を含む窒化物半導体層で構成されていれば良く、特に活
性層に接していてもいなくても良い。半導体としては活
性層よりもバンドギャップエネルギーの大きい窒化物半
導体を選択し、例えば前記のようにAlXGa1-XN(0
≦X≦1)を好ましく成長させる。一方ドープするp型
不純物濃度は1×1018/cm3以上、1×1021/cm3
下、さらに好ましくは5×1018/cm3以上、5×10
20/cm3に調整する。p型不純物としては例えばMg、
Zn、Cd、Ca、Be、Sr等のII族元素を好ましく
ドープする。さらにこの第1の窒化物半導体層を互いに
組成の異なる2種類の窒化物半導体層が積層されてなる
超格子層とすることもできる。超格子層とする場合、超
格子層を構成する窒化物半導体層の膜厚は100オング
ストローム以下、さらに好ましくは70オングストロー
ム以下、最も好ましくは50オングストローム以下の膜
厚に調整する。超格子層とすると、窒化物半導体層の結
晶性が良くなり、出力がさらに向上する。超格子層とす
る場合、p型不純物は両方の層にドープしても良いし、
いずれか一方の層にドープしても良い。
The first p-side nitride semiconductor layer 5 may be formed of a nitride semiconductor layer containing a p-type impurity, and may or may not be particularly in contact with the active layer. As the semiconductor, a nitride semiconductor having a band gap energy larger than that of the active layer is selected. For example, as described above, Al x Ga 1 -xN (0
≦ X ≦ 1) is preferably grown. On the other hand, the concentration of the p-type impurity to be doped is not less than 1 × 10 18 / cm 3 and not more than 1 × 10 21 / cm 3 , more preferably not less than 5 × 10 18 / cm 3 and 5 × 10 5 / cm 3.
Adjusted to 20 / cm 3. As a p-type impurity, for example, Mg,
Group II elements such as Zn, Cd, Ca, Be, and Sr are preferably doped. Further, the first nitride semiconductor layer may be a superlattice layer in which two types of nitride semiconductor layers having different compositions are stacked. When a superlattice layer is used, the thickness of the nitride semiconductor layer constituting the superlattice layer is adjusted to 100 Å or less, more preferably 70 Å or less, and most preferably 50 Å or less. With a superlattice layer, the crystallinity of the nitride semiconductor layer is improved, and the output is further improved. In the case of a superlattice layer, a p-type impurity may be doped into both layers,
Any one of the layers may be doped.

【0013】第2の窒化物半導体層6は第1の窒化物半
導体層5に接して形成されていることが望ましいが、特
に接して形成されていなくても良い。例えば第1と第2
の窒化物半導体層との間に数百オングストローム以下の
膜厚のアンドープの窒化物半導体層を成長させることも
できる。また、不純物は第3の窒化物半導体層6に接近
して連続的に少なくなるように調整することが望ましい
が、段階的にp型不純物のドープ量を少なくして第2の
窒化物半導体層を成長させることもできる。窒化物半導
体層の組成は特に問うものではないが、好ましくは第3
の窒化物半導体層と同一組成とする。第2の窒化物半導
体層の膜厚は2μm以下、さらに好ましくは1μm以
下、最も好ましくは0.5μm以下に調整する。また第
2の窒化物半導体層を窒化物半導体の多層膜(超格子を
含む)構造として、その多層膜を構成する窒化物半導体
層のp型不純物濃度を段階的に少なくなるようにしても
良い。
The second nitride semiconductor layer 6 is desirably formed in contact with the first nitride semiconductor layer 5, but need not be particularly formed in contact therewith. For example, first and second
An undoped nitride semiconductor layer having a thickness of several hundred angstroms or less can be grown between the nitride semiconductor layer and the nitride semiconductor layer. It is preferable that the impurity is adjusted so as to be continuously reduced in the vicinity of the third nitride semiconductor layer 6. Can also be grown. Although the composition of the nitride semiconductor layer is not particularly limited,
Has the same composition as that of the nitride semiconductor layer. The thickness of the second nitride semiconductor layer is adjusted to 2 μm or less, more preferably 1 μm or less, and most preferably 0.5 μm or less. Further, the second nitride semiconductor layer may have a multilayer structure (including a superlattice) of a nitride semiconductor, and the p-type impurity concentration of the nitride semiconductor layer forming the multilayer film may be gradually reduced. .

【0014】第3の窒化物半導体層7は、p電極を形成
するコンタクト層とすることが望ましく、好ましくはX
値が0.3以下のAlXGa1-XN(0≦X≦0.3)と
するとp電極と好ましいオーミックが得られる。第3の
窒化物半導体層7のp型不純物濃度は、第1の窒化物半
導体層5と同じく、1×1018/cm3以上、1×1021
/cm3以下、さらに好ましくは5×1018/cm3以上、5
×1020/cm3に調整することが望ましい。また第3の
窒化物半導体層の膜厚は第2の窒化物半導体層よりも薄
く調整することが望ましい。即ち、コンタクト層として
作用する第3のp型窒化物半導体層の膜厚を薄くして、
高濃度にp型不純物をドープすることによりコンタクト
抵抗が下がるので、Vf(順方向電圧)が低下しやすい
傾向にある。
The third nitride semiconductor layer 7 is desirably a contact layer for forming a p-electrode.
If the value is set to Al x Ga 1 -xN (0 ≦ X ≦ 0.3) having a value of 0.3 or less, a favorable ohmic is obtained with the p electrode. The p-type impurity concentration of the third nitride semiconductor layer 7 is 1 × 10 18 / cm 3 or more and 1 × 10 21 , similarly to the first nitride semiconductor layer 5.
/ Cm 3 or less, more preferably 5 × 10 18 / cm 3 or more,
It is desirable to adjust to × 10 20 / cm 3 . It is preferable that the thickness of the third nitride semiconductor layer be adjusted to be smaller than that of the second nitride semiconductor layer. That is, the thickness of the third p-type nitride semiconductor layer acting as a contact layer is reduced,
Since the contact resistance is reduced by doping the p-type impurity with a high concentration, Vf (forward voltage) tends to decrease.

【0015】[0015]

【実施例】以下、MOCVD法を用いて本発明の窒化物
半導体素子の製造方法について説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a nitride semiconductor device according to the present invention using the MOCVD method will be described below.

【0016】[実施例1]サファイア(0001)面を
主面とする基板を用意し、原料ガスにTMG(トリメチ
ルガリウム)、アンモニアを用いて500℃でGaNよ
りなるバッファ層を200オングストロームの膜厚で成
長させる。
Example 1 A substrate having a sapphire (0001) surface as a main surface was prepared, and a buffer layer made of GaN was formed at 200 ° C. at 500 ° C. using TMG (trimethylgallium) and ammonia as a source gas. Grow with.

【0017】次に温度を1050℃に上昇させ、TM
G、アンモニア、不純物ガスにモノシランガスを用い
て、Siを1×1019/cm3ドープしたn型GaN層を
5μmの膜厚で成長させる。
Next, the temperature is raised to 1050 ° C. and TM
An n-type GaN layer doped with 1 × 10 19 / cm 3 of Si is grown to a thickness of 5 μm using G, ammonia, and a monosilane gas as an impurity gas.

【0018】次に温度を800℃にして、TMI(トリ
メチルインジウム)、TMG、アンモニアを用い、活性
層として、アンドープIn0.4Ga0.6Nよりなる井戸層
を25オングストロームの膜厚で成長させる。
Next, at a temperature of 800 ° C., a well layer made of undoped In 0.4 Ga 0.6 N is grown to a thickness of 25 Å as an active layer using TMI (trimethyl indium), TMG and ammonia.

【0019】次に温度を1050℃にして、TMG、ア
ンモニア、不純物ガスとしてCp2Mg(シクロペンタ
ジエニルマグネシウム)を用い、Mgを1×1020/cm
3ドープしたp型Al0.3Ga0.7Nよりなる第1の窒化
物半導体層を200オングストロームの膜厚で成長させ
る。この第1の窒化物半導体層はキャリアを閉じ込める
層として作用する。
Then, the temperature was raised to 1050 ° C., TMG, ammonia, and Cp 2 Mg (cyclopentadienyl magnesium) as an impurity gas, and Mg was added to 1 × 10 20 / cm 3.
A first nitride semiconductor layer made of 3- doped p-type Al 0.3 Ga 0.7 N is grown to a thickness of 200 Å. This first nitride semiconductor layer functions as a layer for confining carriers.

【0020】第1の窒化物半導体層成長後、原料ガスを
止め、続いて再度TMG、アンモニア、Cp2Mgを流
し、1050℃で、p型不純物が傾斜ドープされたGa
Nよりなる第2の窒化物半導体層を0.18μmの膜厚
で成長させる。但しCp2MgはMFC(マスフローコ
ントローラ)により、成長中徐々に流量が少なくなるよ
うに調整し、第2の窒化物半導体が成長し終わる頃に
は、Cp2Mgの流量が0となるようにする。
After the growth of the first nitride semiconductor layer, the raw material gas is stopped, and then TMG, ammonia and Cp2Mg are flowed again.
A second nitride semiconductor layer made of N is grown to a thickness of 0.18 μm. However, the flow rate of Cp2Mg is adjusted by an MFC (mass flow controller) so that the flow rate gradually decreases during the growth, so that the flow rate of Cp2Mg becomes zero by the time the second nitride semiconductor is completely grown.

【0021】第2の窒化物半導体層成長後、TMG、ア
ンモニア、Cp2Mgを用い、Mgを1×1020/cm3
ープした第3の窒化物半導体層を300オングストロー
ムの膜厚で成長させる。
After the growth of the second nitride semiconductor layer, a third nitride semiconductor layer doped with Mg at 1 × 10 20 / cm 3 is grown to a thickness of 300 Å using TMG, ammonia and Cp 2 Mg.

【0022】以上のようにして窒化物半導体を成長させ
たウェーハを反応容器内において、窒素雰囲気中700
℃でアニーリングを行い、p型不純物をドープした層を
さらに低抵抗化させる。アニーリング後、ウェーハを反
応容器から取り出し、RIE装置により最上層の第3の
窒化物半導体層側からエッチングを行い、n電極を形成
すべきn側コンタクト層の表面を露出させる。最上層の
第3の窒化物半導体層のほぼ全面にNi/Auよりなる
全面電極を200オングストロームの膜厚で形成し、そ
の全面電極の一部に1μmの膜厚でAuよりなるパッド
電極を形成する。一方、露出させたn側コンタクト層の
表面には、WとAuよりなるn電極を形成する。
The wafer on which the nitride semiconductor has been grown as described above is placed in a reaction vessel in a nitrogen atmosphere at 700.degree.
Annealing is performed at a temperature of ° C. to further reduce the resistance of the layer doped with the p-type impurity. After annealing, the wafer is taken out of the reaction container, and the wafer is etched from the third nitride semiconductor layer side of the uppermost layer by the RIE apparatus to expose the surface of the n-side contact layer on which the n-electrode is to be formed. A full-surface electrode made of Ni / Au is formed with a thickness of 200 Å on almost the entire surface of the third nitride semiconductor layer as the uppermost layer, and a pad electrode made of Au is formed with a thickness of 1 μm on a part of the whole electrode. I do. On the other hand, an n-electrode made of W and Au is formed on the exposed surface of the n-side contact layer.

【0023】以上のようにして電極を形成したウェーハ
を350μm角のチップに分離し、発光させたところ2
0mAにおいて、Vf3.2V、発光波長525nm、
光出力3.5mW、外部量子効率7.3%となり、傾斜
ドープしていない従来の緑色LEDに比較して、およそ
1.2倍に向上した。
The wafer on which the electrodes were formed as described above was separated into chips of 350 μm square, and light was emitted.
At 0 mA, Vf 3.2 V, emission wavelength 525 nm,
The light output was 3.5 mW and the external quantum efficiency was 7.3%, which was about 1.2 times higher than that of a conventional green LED without gradient doping.

【0024】[実施例2]実施例1において、第1の窒
化物半導体層成長後、原料ガスを止め、続いて再度TM
G、アンモニア、Cp2Mgを流し、1050℃で、p
型不純物を1×1019/cm3ドープしたGaN層を50
0オングストローム成長させ、次にCp2Mgの流量を
変えて、Mgを5×1018/cm3ドープしたGaN層を
500オングストローム成長させ、次にMgを1×10
18/cm3ドープしたGaN層を500オングストローム
成長させ、最後にMgをドープしていないGaN層を5
00オングストローム成長させて、総膜厚0.2μmの
第2の窒化物半導体層を成長させる。その他は実施例1
と同様にしたところ、実施例1のものとほぼ同等の特性
を有するLED素子が作製できた。
[Embodiment 2] In Embodiment 1, after the first nitride semiconductor layer is grown, the source gas is stopped, and then TM
G, ammonia and Cp2Mg were flowed at 1050 ° C.
GaN layer doped with 1 × 10 19 / cm 3
0 Å growth, then changing the flow rate of Cp2Mg, growing a GaN layer doped with 5 × 10 18 / cm 3 of Mg to 500 Å, and then growing 1 × 10
A GaN layer doped with 18 / cm 3 is grown to 500 Å, and a GaN layer not doped with Mg is finally
The second nitride semiconductor layer having a total film thickness of 0.2 μm is grown by growing the thickness by 00 Å. Others are Example 1.
As a result, an LED element having substantially the same characteristics as those of Example 1 was produced.

【0025】[実施例3]図3は本発明に係る一レーザ
素子の構造を示す模式的な断面図であり、以下、この図
を元に本発明の第3実施例について説明する。
[Embodiment 3] FIG. 3 is a schematic sectional view showing the structure of one laser device according to the present invention. Hereinafter, a third embodiment of the present invention will be described with reference to FIG.

【0026】サファイア(0001)面を主面とする基
板の上にGaNよりなるバッファ層を介してGaNより
なる単結晶を120μmの膜厚で成長させたGaN基板
100を用意する。このGaN基板100をサファイア
の上に成長させた状態で、反応容器内にセットし、温度
を1050℃まで上げ、実施例1と同様にして、GaN
基板100上にSiを1×1018/cm3ドープしたGa
Nよりなるn側バッファ層11を4μmの膜厚で成長さ
せる。このn側バッファ層は高温で成長させるバッファ
層であり、例えば実施例1のように、サファイア、Si
C、スピネルのように窒化物半導体と異なる材料よりな
る基板の上に、900℃以下の低温において、GaN、
AlN等を、0.5μm以下の膜厚で直接成長させるバ
ッファ層2とは区別される。
A GaN substrate 100 is prepared by growing a single crystal of GaN with a thickness of 120 μm on a substrate having a sapphire (0001) plane as a main surface via a buffer layer of GaN. With this GaN substrate 100 grown on sapphire, it was set in a reaction vessel, and the temperature was increased to 1050 ° C.
Ga doped with 1 × 10 18 / cm 3 of Si on a substrate 100
An n-side buffer layer 11 of N is grown to a thickness of 4 μm. This n-side buffer layer is a buffer layer grown at a high temperature, for example, sapphire, Si
C, on a substrate made of a material different from a nitride semiconductor such as spinel,
It is distinguished from the buffer layer 2 in which AlN or the like is directly grown to a thickness of 0.5 μm or less.

【0027】(n側クラッド層12=歪み超格子層)続
いて、1050℃でTMA、TMG、アンモニア、シラ
ンガスを用い、Siを1×1019/cm3ドープしたn型
Al0.3Ga0.7Nよりなる第1の層を40オングストロ
ームの膜厚で成長させ、続いてシランガス、TMAを止
め、アンドープのGaNよりなる第2の層を40オング
ストロームの膜厚で成長させる。そして第1層+第2層
+第1層+第2層+・・・というように歪み超格子層を
構成し、それぞれ100層ずつ交互に積層し、総膜厚
0.8μmの歪み超格子よりなるn側クラッド層12を
成長させる。
(N-side cladding layer 12 = strained superlattice layer) Subsequently, n-type Al 0.3 Ga 0.7 N doped with Si at 1 × 10 19 / cm 3 using TMA, TMG, ammonia and silane gas at 1050 ° C. The first layer is grown to a thickness of 40 angstroms, the silane gas and TMA are stopped, and the second layer of undoped GaN is grown to a thickness of 40 angstroms. Then, a strained superlattice layer is composed of a first layer + a second layer + a first layer + a second layer +... 100 layers are alternately stacked, each having a total thickness of 0.8 μm. The n-side cladding layer 12 is grown.

【0028】(n側光ガイド層13)続いて、シランガ
スを止め、1050℃でアンドープGaNよりなるn側
光ガイド層13を0.1μmの膜厚で成長させる。この
n側光ガイド層は、活性層の光ガイド層として作用し、
GaN、InGaNを成長させることが望ましく、通常
100オングストローム〜5μm、さらに好ましくは2
00オングストローム〜1μmの膜厚で成長させること
が望ましい。またこの層をアンドープの歪み超格子層と
することもできる。歪み超格子層とする場合にはバンド
ギャップエネルギーは活性層より大きく、n側クラッド
層よりも小さくする。
(N-side light guide layer 13) Subsequently, the silane gas is stopped and the n-side light guide layer 13 made of undoped GaN is grown at 1050 ° C. to a thickness of 0.1 μm. This n-side light guide layer acts as a light guide layer of the active layer,
It is desirable to grow GaN or InGaN, usually 100 Å to 5 μm, more preferably 2 Å.
It is desirable to grow with a film thickness of 00 Å to 1 μm. This layer can also be an undoped strained superlattice layer. In the case of a strained superlattice layer, the band gap energy is larger than that of the active layer and smaller than that of the n-side cladding layer.

【0029】(活性層14)次に、原料ガスにTMG、
TMI、アンモニアを用いて活性層14を成長させる。
活性層14は温度を800℃に保持して、アンドープI
0.2Ga0.8Nよりなる井戸層を25オングストローム
の膜厚で成長させる。次にTMIのモル比を変化させる
のみで同一温度で、アンドープIn0.01Ga0.95Nより
なる障壁層を50オングストロームの膜厚で成長させ
る。この操作を2回繰り返し、最後に井戸層を積層した
総膜厚175オングストロームの多重量子井戸構造(M
QW)の活性層を成長させる。活性層は本実施例のよう
にアンドープでもよいし、またn型不純物及び/又はp
型不純物をドープしても良い。不純物は井戸層、障壁層
両方にドープしても良く、いずれか一方にドープしても
よい。
(Active Layer 14) Next, TMG is used as a raw material gas.
The active layer 14 is grown using TMI and ammonia.
The active layer 14 maintains the temperature at 800 ° C.
A well layer made of n 0.2 Ga 0.8 N is grown to a thickness of 25 Å. Next, a barrier layer made of undoped In 0.01 Ga 0.95 N is grown to a thickness of 50 angstroms at the same temperature only by changing the molar ratio of TMI. This operation was repeated twice, and finally, a multiple quantum well structure (M
A QW) active layer is grown. The active layer may be undoped as in this embodiment, or may be an n-type impurity and / or a p-type impurity.
Type impurities may be doped. The impurity may be doped into both the well layer and the barrier layer, or may be doped into either one.

【0030】(p側キャップ層15=第1の窒化物半導
体層)次に、温度を1050℃に上げ、TMG、TM
A、アンモニア、Cp2Mg(シクロペンタジエニルマ
グネシウム)を用い、p側光ガイド層16よりもバンド
ギャップエネルギーが大きい、Mgを1×1020/cm3
ドープしたp型Al0.3Ga0.7Nよりなるp側キャップ
層17を300オングストロームの膜厚で成長させる。
p側キャップ層は0.5μm以下、さらにに好ましくは
0.1μm以下の膜厚で成長させると、p側キャップ層
がキャリアを活性層内に閉じ込めるためのバリアとして
作用するので、出力が向上する。このp型キャップ層1
5の膜厚の下限は特に限定しないが、10オングストロ
ーム以上の膜厚で形成することが望ましい。
(P-side cap layer 15 = first nitride semiconductor layer) Next, the temperature was increased to 1050 ° C., and TMG, TM
Using A, ammonia, and Cp2Mg (cyclopentadienylmagnesium), and having a band gap energy larger than that of the p-side light guide layer 16, Mg is 1 × 10 20 / cm 3.
A p-side cap layer 17 made of doped p-type Al 0.3 Ga 0.7 N is grown to a thickness of 300 Å.
When the p-side cap layer is grown to a thickness of 0.5 μm or less, more preferably 0.1 μm or less, the output is improved because the p-side cap layer acts as a barrier for confining carriers in the active layer. . This p-type cap layer 1
Although the lower limit of the film thickness of No. 5 is not particularly limited, it is desirable to form the film with a film thickness of 10 Å or more.

【0031】(p側光ガイド層16=第2の窒化物半導
体層)p側キャップ層15成長後、再度TMG、Cp2
Mg、アンモニアを用い、実施例1と同様にして、10
50℃で、バンドギャップエネルギーがp側キャップ層
15よりも小さい、p型不純物が傾斜ドープされたGa
Nよりなるp側光ガイド層16を0.1μmの膜厚で成
長させる。この層は、活性層の光ガイド層として作用す
る。
(P-side light guide layer 16 = second nitride semiconductor layer) After the growth of the p-side cap layer 15, TMG, Cp2
Using Mg and ammonia, as in Example 1, 10
Ga having a band gap energy smaller than that of the p-side cap layer 15 at 50 ° C.
A p-side light guide layer 16 made of N is grown to a thickness of 0.1 μm. This layer acts as a light guide layer for the active layer.

【0032】(p側クラッド層17)続いて、1050
℃でMgを1×1020/cm3ドープしたp型Al0.3Ga
0.8Nよりなる第3の層を40オングストロームの膜厚
で成長させ、続いてTMAのみを止め、アンドープGa
Nよりなる第4の層を40オングストロームの膜厚で成
長させる。そしてこの操作をそれぞれ100回繰り返
し、総膜厚0.8μmの歪み超格子層よりなるp側クラ
ッド層17を形成する。
(P-side cladding layer 17)
P-type Al 0.3 Ga doped with Mg at 1 × 10 20 / cm 3
A third layer of 0.8 N is grown to a thickness of 40 Å, followed by stopping only TMA and undoping Ga.
A fourth layer of N is grown to a thickness of 40 Å. This operation is repeated 100 times to form a p-side cladding layer 17 composed of a strained superlattice layer having a total film thickness of 0.8 μm.

【0033】(p側コンタクト層18=第3の窒化物半
導体層)最後に、1050℃で、p側クラッド層17の
上に、Mgを2×1020/cm3ドープしたp型GaNよ
りなるp側コンタクト層18を150オングストローム
の膜厚で成長させる。p側コンタクト層18はp型のI
XAlYGa1-X-YN(0≦X、0≦Y、X+Y≦1)で構
成することができ、好ましくはMgをドープしたGaN
とすれば、p電極21と最も好ましいオーミック接触が
得られる。またp型AlYGa1-YNを含む歪み超格子構
造のp側クラッド層17に接して、バンドギャップエネ
ルギーの小さい窒化物半導体をp側コンタクト層とし
て、その膜厚を500オングストローム以下と薄くして
いるために、実質的にp側コンタクト層18のキャリア
濃度が高くなりp電極と好ましいオーミックが得られ
て、素子の閾値電流、電圧が低下する。
(P-side contact layer 18 = third nitride semiconductor layer) Finally, at 1050 ° C., p-type GaN doped with 2 × 10 20 / cm 3 of Mg is formed on the p-side cladding layer 17. The p-side contact layer 18 is grown to a thickness of 150 angstroms. The p-side contact layer 18 is a p-type
n X Al Y Ga 1 -XYN (0 ≦ X, 0 ≦ Y, X + Y ≦ 1), preferably GaN doped with Mg
Then, the most preferable ohmic contact with the p electrode 21 can be obtained. Further, a nitride semiconductor having a small band gap energy is used as a p-side contact layer in contact with the p-side cladding layer 17 having a strained superlattice structure containing p-type Al Y Ga 1-Y N, and the film thickness is as thin as 500 Å or less. As a result, the carrier concentration of the p-side contact layer 18 substantially increases, a favorable ohmic contact with the p-electrode is obtained, and the threshold current and voltage of the device decrease.

【0034】以上のようにして窒化物半導体を成長させ
たウェーハを反応容器内において、窒素雰囲気中700
℃でアニーリングを行い、p型不純物をドープした層を
さらに低抵抗化させる。
The wafer on which the nitride semiconductor has been grown as described above is placed in a reaction vessel in a nitrogen atmosphere at 700.degree.
Annealing is performed at a temperature of ° C. to further reduce the resistance of the layer doped with the p-type impurity.

【0035】アニーリング後、ウェーハを反応容器から
取り出し、図3に示すように、RIE装置により最上層
のp側コンタクト層18と、p側クラッド層17とをエ
ッチングして、4μmのストライプ幅を有するリッジ形
状とする。このように、活性層よりも上部にある層をス
トライプ状のリッジ形状とすることにより、活性層の発
光がストライプリッジの下に集中するようになって閾値
が低下する。特に歪み超格子層よりなるp側クラッド層
17以上の層をリッジ形状とすることが好ましい。
After annealing, the wafer is taken out of the reaction vessel, and as shown in FIG. 3, the uppermost p-side contact layer 18 and the p-side cladding layer 17 are etched by an RIE apparatus to have a stripe width of 4 μm. Ridge shape. As described above, by forming the layer above the active layer into a stripe-shaped ridge, light emission of the active layer is concentrated below the stripe ridge, and the threshold value is reduced. In particular, it is preferable that a layer of the p-side cladding layer 17 or more composed of the strained superlattice layer has a ridge shape.

【0036】リッジ形成後、p側コンタクト層18のリ
ッジ最表面にNi/Auよりなるp電極21をストライ
プ状に形成し、p電極21以外の最表面の窒化物半導体
層のにSiO2よりなる絶縁膜25を形成し、この絶縁
膜25を介してp電極21と電気的に接続したpパッド
電極22を形成する。
After the formation of the ridge, a p-electrode 21 of Ni / Au is formed in a stripe shape on the outermost surface of the ridge of the p-side contact layer 18, and the outermost nitride semiconductor layer other than the p-electrode 21 is formed of SiO 2. An insulating film 25 is formed, and a p pad electrode 22 electrically connected to the p electrode 21 via the insulating film 25 is formed.

【0037】以上のようにして、p電極を形成したウェ
ーハを研磨装置に移送し、サファイア基板を研磨により
除去し、GaN基板10の表面を露出させる。露出した
GaN基板表面のほぼ全面にTi/Alよりなるn電極
23を形成する。
As described above, the wafer on which the p-electrode is formed is transferred to the polishing apparatus, the sapphire substrate is removed by polishing, and the surface of the GaN substrate 10 is exposed. An n-electrode 23 made of Ti / Al is formed on almost the entire exposed GaN substrate surface.

【0038】電極形成後GaN基板のM面(窒化物半導
体を六方晶系で近似した場合に六角柱の側面に相当する
面)で劈開し、その劈開面にSiO2とTiO2よりなる
誘電体多層膜を形成し、最後にp電極に平行な方向で、
バーを切断してレーザ素子とする。
After the electrodes are formed, the GaN substrate is cleaved on the M plane (a plane corresponding to the side surface of a hexagonal prism when the nitride semiconductor is approximated by a hexagonal system), and the cleavage plane is formed of a dielectric material composed of SiO 2 and TiO 2. A multilayer film is formed, and finally, in a direction parallel to the p-electrode,
The bar is cut to form a laser element.

【0039】このレーザチップをフェースアップ(基板
とヒートシンクとが対向した状態)でヒートシンクに設
置し、それぞれの電極をワイヤーボンディングして、室
温でレーザ発振を試みたところ、室温において、閾値電
流密度2.0kA/cm2、閾値電圧4.0Vで、発振波
長405nmの連続発振が確認され、1000時間以上
の寿命を示した。
This laser chip was placed on a heat sink face-up (in a state where the substrate and the heat sink faced each other), and each electrode was wire-bonded to perform laser oscillation at room temperature. At 0.0 kA / cm 2 and a threshold voltage of 4.0 V, continuous oscillation at an oscillation wavelength of 405 nm was confirmed, and a life of 1000 hours or more was shown.

【0040】[0040]

【発明の効果】このように、本発明の窒化物半導体素子
では、活性層の上にあるp型不純物を多くドープした窒
化物半導体層と、p型不純物を多くドープした窒化物半
導体層との間に、p型不純物を傾斜ドープした層を介在
させることにより、出力が大幅に向上させることができ
る。また本発明の素子はLED、LDのような発光デバ
イスだけではなく、他の受光デバイスのような窒化物半
導体を用いた多くの電子デバイスに用いることができ
る。
As described above, in the nitride semiconductor device of the present invention, the nitride semiconductor layer on the active layer, which is heavily doped with p-type impurities, and the nitride semiconductor layer which is heavily doped with p-type impurities, By interposing a layer in which a p-type impurity is graded, an output can be greatly improved. The element of the present invention can be used not only for light-emitting devices such as LEDs and LDs but also for many electronic devices using nitride semiconductors such as other light-receiving devices.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の一実施例に係る一LED素子の構造
を示す模式断面図。
FIG. 1 is a schematic cross-sectional view showing the structure of one LED element according to one embodiment of the present invention.

【図2】 図1のLED素子のp型不純物濃度を示す分
布図。
FIG. 2 is a distribution diagram showing a p-type impurity concentration of the LED element of FIG. 1;

【図3】 本発明の他の実施例に係るLD素子の構造を
示す模式断面図。
FIG. 3 is a schematic sectional view showing the structure of an LD device according to another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1・・・基板 2・・・バッファ層 3・・・n側コンタクト層 4・・・活性層 5・・・第1のp側窒化物半導体層 6・・・第2のp側窒化物半導体層 7・・・第3のp側窒化物半導体層 8・・・p電極 9・・・パッド電極 10・・・n電極 DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Buffer layer 3 ... n-side contact layer 4 ... Active layer 5 ... 1st p-side nitride semiconductor layer 6 ... 2nd p-side nitride semiconductor Layer 7: Third p-side nitride semiconductor layer 8: P electrode 9: Pad electrode 10: N electrode

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平10−233530(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 33/00 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-10-233530 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 33/00

Claims (8)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 活性層上部にp型不純物を含む第1の窒
化物半導体層が形成され、その第1の窒化物半導体層上
部に、その第1の窒化物半導体層から離れるに従ってp
型不純物濃度が次第に少なくなっている第2の窒化物半
導体層を備え、その第2の窒化物半導体層上部に、第2
の窒化物半導体層の平均p型不純物濃度よりも多量のp
型不純物を含む第3の窒化物半導体層を有することを特
徴とする窒化物半導体素子。
1. A first nitride semiconductor layer containing a p-type impurity is formed on an active layer, and the first nitride semiconductor layer containing p-type impurities is formed on the first nitride semiconductor layer as the distance from the first nitride semiconductor layer increases.
A second nitride semiconductor layer having a gradually reduced impurity concentration, and a second nitride semiconductor layer formed on the second nitride semiconductor layer.
Larger than the average p-type impurity concentration of the nitride semiconductor layer of
A nitride semiconductor device comprising a third nitride semiconductor layer containing a type impurity.
【請求項2】 前記第2の窒化物半導体層が複数の窒化
物半導体層が積層された多層膜よりなり、その多層膜の
p型不純物が段階的に少なくなっていることを特徴とす
る請求項1に記載の窒化物半導体素子。
2. The semiconductor device according to claim 1, wherein the second nitride semiconductor layer comprises a multilayer film in which a plurality of nitride semiconductor layers are stacked, and the multilayer film has a stepwise decrease in p-type impurities. Item 3. The nitride semiconductor device according to item 1.
【請求項3】 前記第1の窒化物半導体層は互いに組成
の異なる2種類の窒化物半導体層が積層されてなる超格
子層であることを特徴とする請求項1または請求項2に
記載の窒化物半導体素子。
3. The method according to claim 1, wherein the first nitride semiconductor layer is a superlattice layer formed by laminating two types of nitride semiconductor layers having different compositions from each other. Nitride semiconductor device.
【請求項4】 前記第1の窒化物半導体層はAl4. The method according to claim 1, wherein the first nitride semiconductor layer is made of Al. X GaGa
1−X1-X N(0≦X≦1)よりなり、前記第3の窒化物半N (0 ≦ X ≦ 1), and the third nitride half
導体層はAlThe conductor layer is Al X GaGa 1−X1-X N(0≦X≦0.3)よりなN (0 ≦ X ≦ 0.3)
ることを特徴とする請求項1乃至請求項3のいずれか14. The method according to claim 1, wherein
項に記載の窒化物半導体素子。Item 6. The nitride semiconductor device according to item 1.
【請求項5】 前記第2の窒化物半導体層は第3の窒化5. The semiconductor device according to claim 1, wherein the second nitride semiconductor layer is a third nitride semiconductor layer.
物半導体層と同一の組成よりなることを特徴とする請求Characterized by having the same composition as the semiconductor layer
項1乃至請求項4のいずれか1項に記載の窒化物半導体The nitride semiconductor according to any one of claims 1 to 4,
素子。element.
【請求項6】 前記第1の窒化物半導体層のp型不純物6. A p-type impurity in the first nitride semiconductor layer
濃度は1×10The concentration is 1 × 10 1818 /cm/ Cm 3 以上、1×10Above 1 × 10 2121 /cm/ Cm
3 以下であることを特徴とする請求項1乃至請求項5の6. The method according to claim 1, wherein:
いずれか1項に記載の窒化物半導体素子。The nitride semiconductor device according to claim 1.
【請求項7】 前記第3の窒化物半導体層のp型不純物
濃度は1×1018/cm以上、1×1021/cm
以下であることを特徴とする請求項1乃至請求項6の
いずれか1項に記載の窒化物半導体素子。
7. The p-type impurity concentration of the third nitride semiconductor layer is 1 × 10 18 / cm 3 or more and 1 × 10 21 / cm.
7. The nitride semiconductor device according to claim 1, wherein the number is 3 or less. 8.
【請求項8】 前記活性層は少なくともInを含む窒化
物半導体層を含む単一量子井戸構造、または多重量子井
戸構造であることを特徴とする請求項1乃至請求項7の
いずれかに記載の窒化物半導体素子。
8. The device according to claim 1, wherein the active layer has a single quantum well structure including a nitride semiconductor layer containing at least In or a multiple quantum well structure. Nitride semiconductor device.
JP15180097A 1997-06-09 1997-06-10 Nitride semiconductor device Expired - Fee Related JP3314666B2 (en)

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