JP3314183B2 - Heterojunction bipolar transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an element structure of a heterojunction bipolar transistor, and more particularly to a highly reliable heterojunction bipolar transistor which prevents deterioration of characteristics induced by non-light-emitting electron-hole recombination.

[0002]

2. Description of the Related Art In recent years, with the aim of putting an AlGaAs-based heterojunction bipolar transistor into practical use, research has been actively conducted on its characteristic deterioration mechanism and prevention measures. FIG.
FIG. 1 is a cross-sectional view showing the configuration of this type of AlGaAs heterojunction bipolar transistor. In FIG.
Denotes a semi-insulating GaAs substrate, 1 denotes an n-type GaAs collector buffer layer, 2 denotes a GaAs collector layer, and 3 denotes a p-type GaAs.
The base layer 4 is an n-type Al _0.3 Ga _0.7 As emitter layer,
Is an n-type InGaAs emitter cap layer, 6 is an emitter electrode, 7 is a base electrode, 8 is a collector electrode, 9 is an element isolation layer, and 10 is an insulating film.

[0003]

However, the conventional AlGaAs-based heterojunction bipolar transistor constructed as described above has the following problems. The first problem is that in the transistor operating state, the impurity element bery in the base region diffuses to the emitter side, so that the collector current decreases and the current amplification factor decreases as shown in FIG.

As a means for solving this problem, Fujii et al.
5.5 in all layers of beryllium-doped AlGaAs base
% Of indium, the diffusion of beryllium can be suppressed to about 1/3 (J. Vac. Sci.
Technol. 8, 1990, pp. 154). The purpose of adding indium here was to suppress the diffusion of beryllium. However, at present, the problem of diffusion of the base impurity element is as follows.
It has been found that the problem can be solved by changing the impurity element to carbon having a smaller diffusion coefficient.

The second conventional problem is that the p-type Ga shown in FIG.
Even in a heterojunction bipolar transistor structure in which As base layer 3 is doped with carbon having a small diffusion coefficient as a base impurity element, the base current gradually increases with time in the transistor operating state as shown in FIG. The rate will be reduced. The cause was not clear, and there was no effective countermeasure.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made to solve the above-mentioned conventional problems, and an object of the present invention is to suppress an increase in base current with time during transistor operation,
An object of the present invention is to provide a heterojunction bipolar transistor without a decrease in current amplification factor.

[0007]

The phenomenon that the base current increases in the operating state of the transistor can be understood as follows. For example, in the operation state of an npn-type transistor, electrons are injected from the emitter to the base. In the base, electron-hole recombination occurs depending on the impurity concentration and the recombination center density. Among them, the non-radiative recombination gives the energy of electrons to the crystal as lattice vibration. Due to this extreme lattice vibration, recombination centers (crystal defects, dislocations, segregation of impurities, etc.) that cause an increase in base current are gradually introduced into the crystal. Further, the increased recombination centers generate new recombination, and the base current increases with time. Therefore, to solve this, (1) keep the initial non-radiative recombination center density as low as possible. (2) Even if excessive lattice vibration occurs due to non-radiative recombination,
This makes the crystal less likely to introduce recombination centers. It is possible.

When a heterojunction bipolar transistor is formed for both purposes, an element having the same charge as that of the constituent element is added in addition to the constituent element that determines the energy bandgap and the impurity element that determines the conductivity type. In particular,
Indium or antimony is added to the base of the heterojunction bipolar transistor. Further, phosphorus, indium, indium and phosphorus, antimony or antimony and phosphorus are added to the emitter of the heterojunction bipolar transistor. Further, phosphorus, indium or indium and phosphorus, antimony or antimony and phosphorus are added to the collector of the heterojunction bipolar transistor. Thus, the amount of lattice distortion of the base or the emitter is set within a certain range.

[0009]

The relationship between the amount of strain of the base lattice and the lifetime of the heterojunction bipolar transistor when an equal-charge element is added will be described with reference to an example in which indium is added. FIG. 1 is an example showing a configuration of a heterojunction bipolar transistor using an indium-doped carbon-doped p-type GaAs base layer 13 in which indium is added to the carbon-doped p-type GaAs base layer 3 of FIG. In this case, as shown in FIG. 8, the amount of base lattice distortion Δa (%) = (a _B −a _C ) / a _C (where a _B is the lattice constant of the base and a _C is the lattice constant of the collector).
The element life is remarkably changed according to the temperature. That is, indium is added to the base layer containing carbon, and the amount of lattice distortion of the base layer is compared with the lattice constant of the collector layer (by comparing the lattice constants of the two layers in contact with the base layer, ie, the emitter layer and the collector layer, 0 <Δa / a <+8 based on the smaller value)
By setting the range of × 10 ^-4 , the life of the heterojunction bipolar transistor can be improved by one digit or more. Comparing this with a conventional heterojunction bipolar transistor to which indium is not added, a heterojunction bipolar transistor having a large initial current amplification factor and having no decrease in current amplification factor over time can be obtained as shown in FIG. Become.

[0010] This is because GaAs is formed by adding indium and setting the lattice strain of the base layer within a predetermined range.
This indicates that the density of the non-radiative recombination center in s is reduced, and that the crystal is a crystal into which recombination centers are hardly introduced even when non-radiative recombination occurs. The reason for this is that, due to carbon doping, the (Al) GaAs base layer is distorted in the direction in which the lattice shrinks, and the shrinkage strain tends to deteriorate the crystal. On the other hand, Ga and As
When indium or antimony with a larger atomic radius is added, the lattice is rather distorted in the direction of expansion, which makes the crystal more stable against excessive lattice vibration caused by non-radiative recombination. It is also important that the lattice constant of the base layer is within a predetermined range from the lattice constants of the emitter layer and the collector layer. Also, it is considered that the reduction of the impurity hydrogen concentration in the carbon-doped (Al) GaAs base layer effectively works to improve the life of the heterojunction bipolar transistor.

Here, the importance of defining the amount of base lattice distortion has been described. However, since non-radiative recombination can also occur in the emitter layer, the definition of the amount of lattice distortion is also important for the emitter layer. Further, the lattice constant of the base layer with respect to the collector layer may be adjusted by changing the lattice constant of the collector layer by adding an equal charge element.

[0012]

Embodiments of the present invention will be described below in detail with reference to the drawings. ( Embodiment ) FIG. 1 is a cross-sectional view showing a configuration of an embodiment of a heterojunction bipolar transistor according to the present invention.
This is an example in which indium is added to a carbon-doped GaAs base layer of an As / GaAs heterojunction bipolar transistor. In the figure, an n-type GaAs collector buffer layer 1, an undoped GaAs collector layer 2, an indium-doped carbon-doped p-type GaAs base layer 13, an n-type Al _0.3 Ga _0.7 As emitter layer 4 and an n-type GaAs collector buffer layer 1 are formed on a semi-insulating GaAs substrate S. The InGaAs emitter cap layer 5 is sequentially epitaxially grown. This is processed into a mesa shape, and WSi / W
An emitter electrode 6 made of Ti, a base electrode 7 made of Ti / W, and a collector electrode 8 made of AuGe / Ni are formed. Reference numeral 9 denotes an element isolation layer, and reference numeral 10 denotes an insulating film.

The concentration of indium is determined so that the lattice distortion of the base layer is in the range of 0 <Δa / a <+ 8 × 10 ⁻⁴ according to the carbon concentration. Further, the lattice constant of the base layer may be gradually changed in a range of 0 <Δa / a <+ 8 × 10 ⁻⁴ .

In the above-described embodiment, the case where indium is added to the base layer has been described. However, similar effects can be obtained by adding antimony instead of indium.

[0015] (Reference Example 1) FIG. 2 is a sectional view showing a configuration according to a reference example of a heterojunction bipolar transistor according to the present invention, AlGaAs
This is an example in which the base region of the s / GaAs heterojunction bipolar transistor has a stacked strain structure of indium-doped carbon-doped GaAs and carbon-doped GaAs. In the figure, an n-type GaAs collector buffer layer 1, an undoped GaAs collector layer 2, an indium-doped carbon-doped InGaAs layer, and a carbon-doped Ga on a semi-insulating GaAs substrate S.
A stacked strain base layer 23 having a plurality (n ≧ 1) of stacked structures with an As layer, an n-type Al _0.3 Ga _0.7 As emitter layer 4 and an n-type InGaAs emitter cap layer 5 are sequentially epitaxially grown. This is processed into a mesa, and an emitter electrode 6 made of WSi / W and a base electrode 7 made of Ti / W
And a collector electrode 8 made of AuGe / Ni. Reference numeral 9 denotes an element isolation layer, and reference numeral 10 denotes an insulating film.

Here, an example using a GaAs base layer has been described, but the same applies to an AlGaAs base layer. The thickness of each layer is 10 nm or less, and the difference between lattice constants is 1 × 10
^-4 to 1 × 10 ^-2 . Further, the amount of strain may be changed by modulation doping of carbon. In the reference example 1 described above, the description has been given of the case of adding indium, similar effects can be obtained by adding antimony instead of indium.

[0017] (Reference Example 2) FIG. 3 is a sectional view showing a configuration according to another reference example of a heterojunction bipolar transistor according to the present invention,
This is an example in which phosphorus is added to an AlGaAs emitter layer of an AlGaAs / GaAs heterojunction bipolar transistor. In the figure, an n-type G is formed on a semi-insulating GaAs substrate S.
aAs collector buffer layer 1, undoped GaAs collector layer 2, carbon-doped p-type GaAs base layer 3, phosphorus-doped n-type Al _0.3 Ga _0.7 As emitter layer 14 and n-type I
The nGaAs emitter cap layer 5 is sequentially epitaxially grown. This is processed into a mesa shape to form an emitter electrode 6 made of WSi / W, a base electrode 7 made of Ti / W, and a collector electrode 8 made of AuGe / Ni. Reference numeral 9 denotes an element isolation layer, and reference numeral 10 denotes an insulating film.

Here, the phosphorus concentration is changed according to the Al composition of the emitter layer 14 in order to control the lattice distortion of the emitter layer. Further, the lattice constant of the emitter layer may be gradually changed in the emitter region.

In the above-described reference example 2 , the case where phosphorus is added to the emitter layer has been described. However, instead of phosphorus, indium, indium and phosphorus, antimony, or antimony and phosphorus are added to set the lattice constant to a predetermined value. The same effect can be obtained even if it is set within the range.

[0020] (Reference Example 3) FIG. 4 is a sectional view showing a configuration according to another reference example of a heterojunction bipolar transistor according to the present invention, AlGaAs
This is an example in which phosphorus is added to a GaAs collector layer of an aAs / GaAs heterojunction bipolar transistor. In the figure, an n-type GaAs collector buffer layer 1, a phosphorus-doped undoped GaAs collector layer 12, a carbon-doped p-type GaAs base layer 3, and an n-type A are formed on a semi-insulating GaAs substrate S.
l _0.3 Ga _0.7 As emitter layer 4 and n-type InGaAs
The s emitter cap layer 5 is sequentially epitaxially grown. This is processed into a mesa shape, and an emitter electrode 6 made of WSi / W, a base electrode 7 made of Ti / W, and an AuG
A collector electrode 8 made of e / Ni is formed. Note that 9
Denotes an element isolation layer, and 10 denotes an insulating film.

The phosphorus concentration is determined so that the lattice distortion of the base layer with respect to the collector layer is in the range of 0 <Δa / a <+ 8 × 10 ⁻⁴ . In the above-described Reference Example 3 , the case where phosphorus was added to the collector layer was described. However, indium, indium, phosphorus,
Lattice strain of the base layer with respect to the collector layer may be set within a predetermined range by adding antimony or antimony and phosphorus.

[0022]

As described above, according to the present invention,
This has an extremely excellent effect that a heterojunction bipolar transistor without a decrease in current amplification factor over time can be obtained.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a configuration according to an embodiment of a heterojunction bipolar transistor according to the present invention.

FIG. 2 is a cross-sectional view showing a configuration of a reference example of a heterojunction bipolar transistor according to the present invention.

FIG. 3 is a cross-sectional view showing a configuration of a heterojunction bipolar transistor according to still another reference example of the present invention.

FIG. 4 is a sectional view showing a configuration of another reference example of a heterojunction bipolar transistor according to the present invention.

FIG. 5 is a cross-sectional view showing a configuration of a conventional heterojunction bipolar transistor.

FIG. 6 is a diagram showing a characteristic deterioration phenomenon of a conventional heterojunction bipolar transistor.

FIG. 7 is a diagram showing a characteristic deterioration phenomenon of a conventional heterojunction bipolar transistor.

FIG. 8 is a diagram showing the relationship between the lifetime of a heterojunction bipolar transistor and the amount of lattice distortion.

FIG. 9 is a diagram showing a change over time in a current amplification factor of a heterojunction bipolar transistor according to the related art and the present invention.

[Explanation of symbols]

S semi-insulating GaAs substrate 1 n-type GaAs collector buffer layer 2 undoped GaAs collector layer 3 carbon-doped p-type GaAs base layer 4 n-type Al _0.3 Ga _0.7 As emitter layer 45 n-type InGaAs emitter cap layer 6 emitter electrode 7 base electrode 8 collector electrode 9 element isolation layer 10 insulating film 12 phosphorus-doped undoped GaAs collector layer 13 of indium added carbon-doped p-type GaAs base layer 14 phosphorus-doped n-type Al _0.3 Ga _0.7 As emitter layer 23 of carbon-doped (InGaAs / GaAs) n ( ≧
1) Laminated strain base layer

Continued on the front page (72) Inventor Nagaaki Nagashima 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (72) Inventor Hitoshi Nagano 1-16-1 Uchisaiwaicho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone (56) References JP-A-4-102312 (JP, A) JP-A-4-33372 (JP, A) JP-A-5-299340 (JP, A) JP-A-5-251460 (JP, A) A) JP-A-5-175226 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/331 H01L 29/205 H01L 29/737

Claims (1)

(57) [Claims] 1. A semiconductor device comprising: an emitter region, a base region, and a collector region, wherein the base region includes carbon containing Ga.
In a hetero-junction bipolar transistor made of As or carbon-containing AlGaAs, the base region is provided with the base with respect to the collector region.
0 <Δa / a <+8
× heterojunction bipolar transistor, characterized in that it comprises a concentration of indium or antimony to be ^10-4.