JP3302725B2 - Power semiconductor integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power semiconductor integrated circuit device using a dielectric isolation semiconductor substrate.

[0002]

2. Description of the Related Art A power semiconductor device is integrated with a control and driving circuit into an integrated circuit to reduce the size and reliability of a power device.
Attempts are being made to reduce costs. Such a conventional technique will be described by taking an inverter circuit for driving a DC motor using an IGBT as an output element as an example.

FIG. 6 shows a configuration of an inverter circuit. The inverter circuit includes a DC power supply 1, six output elements (IGBTs) 2u to 2z constituting a three-phase inverter, diodes 3u to 3z, drive circuits 4u to 4w for driving upper output elements 2u to 2w, and lower output elements. Drive circuits 4x to 4z for driving 2x to 2z, level shift circuits 5u to 5w for supplying control signals to the drive circuits 4u to 4w, and drive circuits 4x to 4x
4z and a control circuit 6 for supplying control signals to the level shift circuits 5u to 5w, power supply circuits 7du to 7dw and 7cu to 7cw for supplying power to the drive circuits 4u to 4z, a current detection resistor 8, an overcurrent detection circuit and the like. An overcurrent protection circuit 9 including a circuit for stopping a drive circuit by an output, an overheat protection circuit 10 including an overheat detection circuit and a circuit for stopping a drive circuit by an output thereof, a circuit 11 for detecting a voltage of a device,
An overvoltage protection circuit 12 including an overvoltage detection circuit and a circuit for stopping the drive circuit by the output thereof;
DC power supply 13 for supplying power to the control circuit and the protection circuit unit
It consists of.

The operation of the inverter circuit will be briefly described. The position of the rotor is detected by a rotor position detection circuit provided in the motor M, and this detection signal is transmitted to the control circuit 6.
to go into. As a result, the control circuit 6 outputs a control signal for driving the upper and lower output elements corresponding to the position of the rotor. The control signals are supplied to the upper drive circuits 4u to 4w via the level shift circuits 5u to 5w. When a control signal is input to the drive circuit, an output element corresponding to the control signal is turned on, a current flows through the winding of the motor M, and the rotor rotates. Upper drive circuits 4u to 4w
Is supplied when the lower output elements 2x to 2z are turned on.

[0005] In order to integrate such an inverter circuit into an integrated circuit, it is necessary to insulate and isolate elements and circuits whose potentials fluctuate. Although pn junction isolation is often used for element isolation of integrated circuits, the area required for isolation is very large in the case of integrated formation of a high-voltage element for power. A bipolar element having a low on-voltage cannot be used. In order to solve this problem, it is desirable to use a dielectric isolation semiconductor substrate.

FIG. 7 shows an example of the structure of such a dielectric isolation semiconductor substrate. This is obtained by directly bonding the mirror-polished first silicon substrate 51 and second silicon substrate 52 with an oxide film 53 interposed therebetween. The second substrate 52 is separated into a plurality of island-shaped semiconductor regions 55 by a separation groove 54, on which an output element and a drive circuit are formed. An oxide film is formed on the side surface of the isolation groove 54, and polycrystalline silicon 56 is buried.

FIG. 8 shows an example in which the inverter circuit of FIG. 6 is integrated using such a dielectric isolation substrate. The portion surrounded by the broken line is the power integrated circuit device 01. High breakdown voltage elements 2u-2z, 3u-3z, 7u-7
The circuits 4u to 4w, 11 at z and high potential are formed in one dielectrically isolated island-shaped semiconductor region as surrounded by thick lines.

[0008]

However, even if such a dielectric isolation structure is used, high voltage devices and circuits having a high potential are formed in separate island-shaped semiconductor regions, respectively. The area is still large. This is traditionally
Because the standard for separation has not been clarified, further reduction in the area of the separation region is desired.

The present invention has been made in view of such circumstances, and it is an object of the present invention to provide a power semiconductor integrated circuit device in which the area required for isolation is reduced by clarifying the criteria for dielectric isolation. .

[0010]

SUMMARY OF THE INVENTION The present invention relates to a power semiconductor integrated circuit device in which a plurality of power semiconductor output elements and a circuit for controlling and driving the power semiconductor output elements are integrated on a dielectric isolation semiconductor substrate. Among semiconductor output elements and circuits having a reference potential terminal different from the potential, one having the same reference potential is formed in one dielectrically isolated island-shaped semiconductor region.

Further, in the present invention, in addition to the above structure, a low lifetime region or a high concentration impurity region is formed between the semiconductor output element and the circuit formed in the island-shaped semiconductor region.

[0012]

According to the present invention, a semiconductor output element and a circuit having the same reference potential among semiconductor output elements and circuits having a reference potential terminal different from the ground potential of the device are formed in one dielectrically isolated island-shaped semiconductor region. Therefore, the number of elements and circuits to be dielectrically separated can be minimized, and therefore, the size of the power semiconductor integrated circuit device can be reduced. In addition, by forming a low lifetime region or a high concentration impurity region between the semiconductor output element and the circuit formed in the island-shaped semiconductor region, carriers are diffused from the output element in the on state to the element in the off state. Thus, it is possible to prevent an element in an off state from malfunctioning.

[0013]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a diagram showing an integrated circuit configuration of an inverter circuit according to a first embodiment of the present invention. The components are the same as those of the conventional FIG. 8, and the corresponding components are the same as those in FIG.
The same reference numerals are used as in FIG. The structure of the dielectric isolation substrate constituting the integrated circuit device 01 is the same as that of the conventional FIG.

In this embodiment, the upper output elements 2u to 2u
w, diodes 3u to 3w, drive circuits 4u to 4w, and capacitors 7u to 7w are formed in three island-shaped semiconductor regions 21, 22, and 23 prepared for each phase, respectively. The output element 2u, the diode 3u, and the output element 2u formed in one island-shaped semiconductor region, for example, the island-shaped semiconductor region 21.
A low lifetime region 57 is provided between the drive circuit 4u and the capacitor 7cu as shown in FIG. The low lifetime region 57 is formed by means of irradiation of charged particles such as electron beam irradiation or diffusion of heavy metals such as gold and platinum. Further, instead of the low lifetime region 57, a high concentration impurity region 58 may be formed as shown in FIG.

The lower output elements 2x to 2z and the diodes 3x to 3z are collectively connected to another island-like semiconductor region 24.
Is formed. A low lifetime region or a high concentration impurity region as shown in FIG. 2 or FIG. 3 is provided between the output element 2x, the diode 3x, the output element 2y, the diode 3y, the output element 2z, and the diode 3z. I have. Diodes 7du to 7dw of power supply circuit
Is formed in another island-shaped semiconductor region 25, and a low lifetime region or a high-concentration impurity region is provided between the diodes 7du, 7dv, and 7dw. The circuit 11 for detecting the voltage of the device is also formed in one island-shaped semiconductor region 26.

The reference used to combine the elements or circuits used in one island-like semiconductor region is that one having a reference potential terminal different from the ground potential of the device and having the same reference potential is one island-like semiconductor. It is formed in the area. That is, since the reference potentials of the upper output elements 2u to 2w and the associated elements and circuits fluctuate between the phases, three separate island-shaped semiconductor regions 21 to 23 are provided for each phase.
Is formed. A low lifetime region or a high-concentration impurity region is provided between an output element, a diode, a driving circuit, and a capacitor formed in one island-shaped semiconductor region.

This means that any one of the output elements (IGBT)
Alternatively, when the diode is in the ON state, the accumulated carriers in the low-concentration layer in the island-shaped semiconductor region are prevented from diffusing to the region of the output element (IGBT), diode, or drive circuit in the OFF state. If the low lifetime region or the high-concentration impurity region does not exist, the carriers diffuse to the region of the output element (IGBT), diode, or drive circuit in the off state, causing malfunction of the output element, diode, or drive circuit. .

The lower output elements 2x to 2z and the diodes 3x to 3z become reference potentials floating from the ground potential due to a potential difference generated in the resistor 8 for detecting a current. However, since there is no potential difference between the phases, one island-shaped semiconductor is formed. It is formed in the region 24. Then, the output element 2x, the diode 3x, the output element 2y, the diode 3y, the output element 2z, the diode 3
For the same reason, a low lifetime region or a high concentration impurity region as shown in FIG. 2 or 3 is provided between z.

Diodes 7du to 7dw of power supply circuit
Are formed in one island-shaped semiconductor region 25 because they have a common reference potential floated by the DC power supply 13. The circuit 11 for detecting the voltage of the device is also formed in the island-shaped semiconductor region 26 since the device is in a potential state floating from the ground potential in the device.

In the case of this embodiment, elements having the same reference potential are formed in one dielectrically isolated island-shaped semiconductor region, so that elements and circuits to be dielectrically isolated can be minimized. Therefore, the power semiconductor integrated circuit device 01
The number of the island-shaped semiconductor regions is approximately one-third that of the conventional semiconductor device shown in FIG. 8, the area of the isolation region is reduced, and the size of the entire integrated circuit device is reduced. In addition, since a low lifetime region or a high-concentration impurity region is provided between the semiconductor output device and the circuit formed in the island-shaped semiconductor region, carrier diffusion from the output device in the on state to the element in the off state. Can be suppressed, and a malfunction of the element in the off state can be prevented beforehand.

FIG. 4 shows a second embodiment. The difference from the embodiment of FIG. 1 is that the anode potentials of the lower diodes 3x to 3z are connected to the ground potential of the device. In this case, the diodes 3x to 3z do not need to be placed in the island-shaped semiconductor regions separated from each other by dielectrics, and therefore, the output elements 2x to 3z are not required.
It is formed separately from the island-shaped semiconductor region 24 in which 2z is inserted. Thereby, the area of the island-shaped semiconductor region 24 in which the lower output elements 2x to 2z are formed becomes small.

Here, a low lifetime region or a high-concentration impurity region is provided between the output elements 2x, 2y, and 2z contained in the island-shaped semiconductor region 24. Each of the diodes 3x to 3z is provided with a low lifetime region or a high concentration impurity region so as to surround each of them.

FIG. 5 shows a third embodiment. In this embodiment, IGBTs having a current detection function are used as the lower output elements 2x to 2z. A low lifetime region or a high concentration impurity region is provided so as to surround each of the output elements 2x to 2z and the diodes 3x to 3z. In this case, the current detection resistor is not required, and the reference potential terminals of the lower output elements 2x to 2z and the diodes 3x to 3z can be connected to the ground potential of the device. Therefore, the island-shaped semiconductor region 24 separated from the dielectric in the previous embodiment is not required, and the area required for the separation is further reduced.

In the above embodiment, the integration of the inverter circuit for driving the DC motor has been described. However, the present invention is not limited to this, and can be similarly applied to other various power integrated circuit devices. . Further, in the embodiment, a dielectric isolation semiconductor substrate obtained by directly bonding two semiconductor substrates is used, but it is also effective when a dielectric isolation semiconductor substrate obtained by another method is used. In addition, the present invention can be variously modified and implemented without departing from the gist thereof.

[0026]

As described above, according to the present invention, there is provided a power semiconductor integrated circuit device in which the number of dielectrically isolated island-like semiconductor regions is reduced and the size is reduced without reducing reliability. can do.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a power semiconductor integrated circuit device according to a first embodiment.

FIG. 2 is a diagram showing a cross section of an element structure in which a low lifetime region is provided in an island-shaped semiconductor region.

FIG. 3 is a diagram showing a cross section of an element structure in which a high-concentration impurity region is provided in an island-shaped semiconductor region.

FIG. 4 is a diagram showing a configuration of a power semiconductor integrated circuit device according to a second embodiment.

FIG. 5 is a diagram showing a configuration of a power semiconductor integrated circuit device according to a third embodiment.

FIG. 6 is a diagram showing a configuration of an inverter circuit for driving a DC motor.

FIG. 7 is a diagram showing a configuration example of a dielectric isolation semiconductor substrate.

FIG. 8 is a diagram showing a configuration of a conventional power semiconductor integrated circuit device.

[Explanation of symbols]

 01 semiconductor integrated circuit device 1 DC power supply 2u-2w 2x-2z output element 3u-3w 3x-3z diode 4u-4w 4x-4z drive circuit 5u-5w level shift Circuit 6 control circuit 7du-7dw power supply circuit diode 7cu-7cw power supply circuit capacitor 8 current detection resistor 9 overcurrent protection circuit 10 heating protection circuit 11 voltage detection circuit 12: overvoltage protection circuit, 13: DC power supply, 21 to 26: island-shaped semiconductor region.

──────────────────────────────────────────────────の Continuing on the front page (51) Int.Cl. ⁷ identification code FI H01L 27/04 H (58) Investigated field (Int.Cl. ⁷ , DB name) H01L 21/762 H01L 21/822 H01L 27 / 04 H01L 29/78

Claims (2)

(57) [Claims] 1. A power semiconductor integrated circuit device in which a plurality of power semiconductor output elements and a circuit for controlling and driving the power semiconductor output elements are formed on a dielectric isolation semiconductor substrate, a reference potential terminal different from the ground potential of the device. A semiconductor integrated circuit device for power, wherein semiconductor output elements and circuits having the same reference potential are formed in one dielectrically isolated island-shaped semiconductor region. 2. A power semiconductor integrated circuit device in which a plurality of power semiconductor output elements and a circuit for controlling and driving these power semiconductor output elements are formed on a dielectric isolation semiconductor substrate, a reference potential terminal different from the ground potential of the device. Among the semiconductor output elements and circuits having, those having the same reference potential are formed in one dielectrically separated island-like semiconductor region, and between the semiconductor output elements and circuits formed in this island-like semiconductor region , A power semiconductor integrated circuit device, wherein a low lifetime region or a high-concentration impurity region having a shorter carrier lifetime than the element is formed.