[go: up one dir, main page]

JP3294689B2 - Liquid crystal display - Google Patents

Liquid crystal display

Info

Publication number
JP3294689B2
JP3294689B2 JP27924393A JP27924393A JP3294689B2 JP 3294689 B2 JP3294689 B2 JP 3294689B2 JP 27924393 A JP27924393 A JP 27924393A JP 27924393 A JP27924393 A JP 27924393A JP 3294689 B2 JP3294689 B2 JP 3294689B2
Authority
JP
Japan
Prior art keywords
liquid crystal
electrode
crystal display
display device
electric field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP27924393A
Other languages
Japanese (ja)
Other versions
JPH07134301A (en
Inventor
寺尾  弘
津村  誠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP27924393A priority Critical patent/JP3294689B2/en
Publication of JPH07134301A publication Critical patent/JPH07134301A/en
Application granted granted Critical
Publication of JP3294689B2 publication Critical patent/JP3294689B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、広視野角、高コントラ
スト、高速応答の液晶表示装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device having a wide viewing angle, high contrast, and high speed response.

【0002】[0002]

【従来の技術】従来、基板面に対し平行に電界が印加さ
れる液晶表示装置には、例えば、特開昭63−2190
7号公報、WO91/10936に示されるような櫛歯
型状の電極を有する液晶表示装置がある。これらの液晶
表示装置では、基板上に形成された配向膜等の配向手段
により配向させて初期または電圧無印加時の液晶の配向
を制御している。
2. Description of the Related Art Conventionally, a liquid crystal display device to which an electric field is applied in parallel to a substrate surface is disclosed in, for example, Japanese Patent Application Laid-Open No. 63-2190.
No. 7, WO91 / 10936 discloses a liquid crystal display device having a comb-shaped electrode. In these liquid crystal display devices, the liquid crystal is aligned by an alignment means such as an alignment film formed on a substrate to control the alignment of the liquid crystal initially or when no voltage is applied.

【0003】[0003]

【発明が解決しようとする課題】前記において、電圧無
印加時から電圧を印加して液晶が電界方向に配向するま
での時間は電界強度に依存し、電極間距離等を調整して
電界強度を変えることにより短くすることが可能であ
る。しかし、電圧印加状態から電圧印加を止めることに
より、液晶分子が元の配向方向に戻るまでの時間は、主
に液晶の粘度や弾性定数に依存し、上記の様に印加電圧
を調整しても短縮できない。
In the above, the time from when no voltage is applied to when the liquid crystal is oriented in the direction of the electric field after the application of a voltage depends on the electric field strength, and the electric field strength is adjusted by adjusting the distance between the electrodes and the like. It can be shortened by changing. However, by stopping the voltage application from the voltage application state, the time until the liquid crystal molecules return to the original alignment direction mainly depends on the viscosity and elastic constant of the liquid crystal, and even if the applied voltage is adjusted as described above, I can't shorten it.

【0004】通常の液晶のバルク粘度は、20〜40c
p(20℃)であり、元の配向方向に液晶分子が戻るま
での時間は100msを超え、動画やマウス対応の液晶
表示装置としては、応答時間が長すぎるために問題とな
っていた。
The bulk viscosity of ordinary liquid crystals is 20 to 40 c
p (20 ° C.), and the time required for the liquid crystal molecules to return to the original orientation direction exceeds 100 ms, which has been a problem because the response time is too long for a liquid crystal display device compatible with moving images and mice.

【0005】本発明の目的は、応答時間の短い液晶表示
装置を提供することにある。
An object of the present invention is to provide a liquid crystal display device having a short response time.

【0006】[0006]

【課題を解決するための手段】前記課題を解決する本発
明の要旨は次のとおりである。
The gist of the present invention for solving the above problems is as follows.

【0007】 (1) 少なくとも一方が透明な一対の基板、該一対の
基板の内の一方の基板上に形成された複数種類の電極、
前記基板間に挟持された液晶層前記基板の外側に配設
された偏光板を有し、前記複数種類の電極を介して前記
液晶層に電界を印加する電界印加手段を備えた液晶表示
装置であって、前記複数種類の電極は、少なくとも画素
部において前記基板面に平行、かつ、少なくとも2
方向に電界が印加できるよう構成され、かつ前記複数種
類の内の第1種の電極がくの字形状を有し、前記複数種
類の内の第2種の電極が前記第1種の電極のくの字形状
部分に平行に配置されている液晶表示装置にある。さら
に、 (2)少なくとも一方が透明な一対の基板、該一対の基
板の内の一方の基板上に形成された複数種類の電極、前
記基板間に挟持された液晶層、画素毎に設けられたアク
ティブ素子、前記基板の外側に配設された偏光板を有
し、前記複数種類の電極を介して前記液晶層に電界を印
加する電界印加手段を備えた液晶表示装置であって、前
記複数種類の電極は、少なくとも画素部において前記基
板の面に平行に、かつ、少なくとも2方向に電界が印加
できるよう構成され、かつ前記アクティブ素子のドレイ
ン電極は、前記一方の基板上にくの字状の屈曲形状を有
して形成されている液晶表示装置にある。
[0007] (1) at least one of a pair of transparent substrates, the pair
A plurality of types of electrodes formed on one of the substrates,
A liquid crystal layer sandwiched between the substrates, arranged outside of the substrate
By having a polarizing plate, wherein via a plurality of types of electrodes <br/> a liquid crystal display device provided with an electric field applying means for applying an electric field to the liquid crystal layer, said plurality of types of electrodes, at least the pixel parallel to the surface of the substrate in the part, and at least 2
Direction , and the plurality of types can be applied.
The first type of electrode has a V shape, and the plurality of types
The second type of electrode is a square shape of the first type of electrode.
The liquid crystal display device is arranged in parallel with the portion . Further
In, (2) at least one of a pair of transparent substrates, said pair of base
Multiple types of electrodes formed on one of the substrates, front
The liquid crystal layer sandwiched between the substrates,
Active element, and a polarizing plate disposed outside the substrate.
And applying an electric field to the liquid crystal layer via the plurality of types of electrodes.
A liquid crystal display device provided with an electric field applying means for applying
The plurality of types of electrodes are provided at least in the pixel portion at the base.
Electric field is applied in parallel to the plane of the plate and in at least two directions
And a drain of the active element.
The electrode has a U-shaped bent shape on the one substrate.
The liquid crystal display device is formed as follows.

【0008】本発明は、上記のとおり基板と平行な面内
で少なくとも2方向の電界を印加して表示画素部の液晶
分子の配向を制御して明状態と暗状態とを形成する際、
視野角の拡大も図るものである。
The present invention, when forming a bright state and a dark state by controlling the orientation of liquid crystal molecules as a substrate and a display pixel section by applying an electric field of at least two directions in a plane parallel to the above,
The viewing angle is also increased .

【0009】前記電界印加手段としては、電極に単に駆
動回路を具備したもの、マトリクス状にアクティブ素子
を備えたもの、或いは、全てをマトリクス状のアクティ
ブ素子としたものでもよい。
The electric field applying means may be a device having only a drive circuit in an electrode, a device having active elements in a matrix, or a device having all active elements in a matrix.

【0010】上記マトリクス状のアクティブ素子として
は薄膜トランジスタ(TFT)を用いることができる。
この場合、駆動電圧低減のために対向電極には交流電圧
を印加することができる。
A thin film transistor (TFT) can be used as the matrix active element.
In this case, an AC voltage can be applied to the counter electrode to reduce the driving voltage.

【0011】更にまた、液晶表示装置を簡略化するため
電界を印加する電極の全てを同一基板上に設けてもよ
い。
Still further, in order to simplify the liquid crystal display device, all the electrodes for applying an electric field may be provided on the same substrate.

【0012】基板に平行な面内で液晶に印加される2つ
の電界方向のなす角度は、コントラスト向上のため40
〜50度、好ましくは45度に設定するのがよい。ま
た、視野角を拡大するため基板に平行な面内に印加され
る3つの電界の方向のうち、1方向を基準にして、他の
2方向のなす角度が40〜50度と−50〜−40度、
好ましくは45度と−45度に設定するのがよい。
The angle between two electric field directions applied to the liquid crystal in a plane parallel to the substrate is 40 degrees for improving the contrast.
It is good to set to 50 degrees, preferably 45 degrees. In addition, among the directions of three electric fields applied in a plane parallel to the substrate in order to increase the viewing angle, the angle between the other two directions with respect to one direction is 40 to 50 degrees and −50 to −50. 40 degrees,
Preferably, it is set to 45 degrees and -45 degrees.

【0013】なお、本発明では液晶の配向を電界の印加
によって制御するので、必ずしも配向膜は必要としない
が、封入した液晶の初期配向を整えたり、電界による液
晶の配向の補助的手段、または、ドメイン発生の防止の
ために用いることは差し支えない。
In the present invention, since the alignment of the liquid crystal is controlled by applying an electric field, an alignment film is not necessarily required. However, the initial alignment of the enclosed liquid crystal is adjusted, or the auxiliary means for the alignment of the liquid crystal by the electric field, or It can be used to prevent the occurrence of domains.

【0014】また、位相差を補正するため一方の基板と
偏光板との間に位相差板を設けてもよい。位相差板を挿
入することにより、液晶層のリターデーション(常光と
異常光との光路差を示す量)に対して、パネル全体とし
てみた時、適切なリターデーションになるよう補正する
ことにより最大透過率、最大コントラストを得ることが
できる。また、所望の配向方向からずれて配向する僅か
な液晶分子による位相差を補正することもできる。
Further, a phase difference plate may be provided between one of the substrates and the polarizing plate to correct the phase difference. By inserting a retardation plate, the retardation of the liquid crystal layer (the amount indicating the optical path difference between ordinary light and extraordinary light) is corrected by adjusting it to an appropriate retardation when viewed as a whole panel. Rate and maximum contrast. Further, it is possible to correct a phase difference due to a small amount of liquid crystal molecules which are aligned with a deviation from a desired alignment direction.

【0015】更に、配向膜を用いる場合、配向方向以外
に電界によって液晶を配向させる時でも、配向方向に配
向する界面近傍の僅かな液晶分子により生じる微小な位
相差を位相差板により補正することができる。位相差板
は主に暗状態の透過率を下げ、コントラスト向上に効果
がある。
Further, in the case where an alignment film is used, even when the liquid crystal is aligned by an electric field other than the alignment direction, a small phase difference caused by a small amount of liquid crystal molecules near an interface aligned in the alignment direction is corrected by a phase difference plate. Can be. The phase difference plate mainly has an effect of lowering the transmittance in the dark state and improving the contrast.

【0016】また、カラーフィルタを組合せてカラー液
晶表示装置を提供することができる。なお、カラーフィ
ルタは公知のものが用いられ、それは基板上に設ける。
Also, a color liquid crystal display device can be provided by combining color filters. Note that a known color filter is used, which is provided on a substrate.

【0017】[0017]

【作用】基板面に平行な面内で表示画素部の液晶層に対
して少なくとも2方向に電界を印加することによって、
明状態、暗状態を示す液晶分子の配向状態を制御するこ
とができる。特に、液晶が所定の配向状態に達するまで
の時間(応答時間)を短縮することができるので高速応
答の表示素子が得られる。さらに、画素部の電界形成用
電極にくの字形状部分を設けることによって視野角の拡
大が図られる。
By applying an electric field to the liquid crystal layer of the display pixel portion in at least two directions in a plane parallel to the substrate surface,
It is possible to control the alignment state of liquid crystal molecules showing a bright state and a dark state. In particular, the time required for the liquid crystal to reach a predetermined alignment state (response time) can be shortened, so that a high-speed response display element can be obtained. Furthermore, for forming an electric field in the pixel section
The viewing angle can be expanded by providing a V-shaped part on the electrode.
Large is achieved.

【0018】従来方式の液晶表示装置では、電界の印加
を止めることにより電界から開放された液晶分子が、配
向膜により元の配向方向に戻るまでの時間は、液晶の粘
性や弾性定数に依存する。本発明は、液晶の配向方向が
上記電界印加により強制的に制御されるために、応答速
度を大幅に向上することができる。
In the conventional liquid crystal display device, the time required for the liquid crystal molecules released from the electric field by stopping the application of the electric field to return to the original alignment direction by the alignment film depends on the viscosity and elastic constant of the liquid crystal. . According to the present invention, since the alignment direction of the liquid crystal is forcibly controlled by the application of the electric field, the response speed can be greatly improved.

【0019】また、マトリクス状のアクティブ素子は、
微小な領域の精密な配向制御を可能にするので、特に好
ましい。
Further, the active elements in a matrix form
It is particularly preferable because it enables precise alignment control of a minute region.

【0020】基板に平行な面内で画素部の液晶層に対し
て印加される2つの電界の方向のなす角度を、40度〜
50度、好ましくは45度とすることによりコントラス
トを向上することができる。また、基板に平行な面内で
印加される1つの電界方向に対し、他の2つの電界方向
を40度〜50度と−50度〜−40度、望ましくは4
5度と−45度に設定し、画素部の微小な領域内で液晶
の配向方向を反転させることにより、視野角を拡大し、
その角度依存性の減少を可能にする。
The angle formed between the directions of the two electric fields applied to the liquid crystal layer of the pixel portion in a plane parallel to the substrate is 40 degrees to 40 degrees.
By setting the angle to 50 degrees, preferably 45 degrees, the contrast can be improved. Further, with respect to one electric field direction applied in a plane parallel to the substrate, the other two electric field directions are set at 40 to 50 degrees and -50 to -40 degrees, preferably 4 to 40 degrees.
By setting the angle to 5 degrees and -45 degrees and inverting the orientation direction of the liquid crystal in a minute area of the pixel portion, the viewing angle is expanded,
It allows its angle dependence to be reduced.

【0021】なお、マトリクス状のアクティブ素子とし
てTFTを用いて、対向電極には交流電圧を印加するこ
とにより駆動電圧を低減することができる。
The drive voltage can be reduced by using a TFT as a matrix active element and applying an AC voltage to the counter electrode.

【0022】[0022]

【実施例】本発明を実施例に基づき具体的に説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described based on embodiments.

【0023】〔実施例 1〕表面を研磨した厚さ1.1
mmのガラス基板2枚を用い、図1の概略図に示すよう
に、上基板には図1(a)、下基板には図1(b)で示
すようなパターンの電極(1画素分)をそれぞれ形成し
た。なお、上下の電極は上から見て互いに45度の角度
をなすように形成した。
[Example 1] Thickness 1.1 with polished surface
As shown in the schematic diagram of FIG. 1, two glass substrates having a thickness of 2 mm were used, and as shown in FIG. 1A, an upper substrate and an electrode having a pattern as shown in FIG. Was formed respectively. The upper and lower electrodes were formed so as to form an angle of 45 degrees with each other when viewed from above.

【0024】本実施例においては、電極材料としてはア
ルミニウムを用いたが、特にこれに限定されず、電気抵
抗の低い材料、例えば、クロム、銅等を用いて形成して
もよい。電極1,2および電極3,4の間隙は6.5μ
m、電極幅は4μmとした。
In this embodiment, aluminum is used as the electrode material. However, the present invention is not particularly limited to this, and a material having a low electric resistance, such as chromium or copper, may be used. The gap between electrodes 1 and 2 and electrodes 3 and 4 is 6.5 μ
m, and the electrode width was 4 μm.

【0025】上記2枚の基板は電極1,2と電極3,4
とが対向するように配置し、スペーサを介して組立て両
基板のギャップを7μmに調整して液晶セルを構成し
た。これに、誘電率異方性Δεが4.3(20℃)、屈
折率異方性Δnが0.072(589nm,20℃)、
粘度ηが25cp(20℃)のネマチック液晶(チッソ
製)を注入して封止した。
The two substrates are electrodes 1 and 2 and electrodes 3 and 4
Were arranged so as to face each other, and the liquid crystal cell was constructed by adjusting the gap between both substrates to 7 μm via a spacer. In addition, the dielectric anisotropy Δε is 4.3 (20 ° C.), the refractive index anisotropy Δn is 0.072 (589 nm, 20 ° C.),
A nematic liquid crystal (manufactured by Chisso) having a viscosity η of 25 cp (20 ° C.) was injected and sealed.

【0026】そのままではドメインが発生する場合は、
液晶層が等方層になるまで一旦加熱し、電極1に3Vを
印加し,電極2を0Vに設定して冷却し、ドメインを消
した。
When a domain is generated as it is,
The liquid crystal layer was once heated until it became an isotropic layer, 3 V was applied to the electrode 1, the electrode 2 was set to 0 V, and cooled to eliminate the domain.

【0027】上記液晶セル基板を2枚の偏光板で挾み、
一方の偏光軸が図1(b)の傾斜した電極3,4と平行
に、また、他方の偏光軸が上記偏光軸と垂直になるよう
に配置し貼付けた。
The liquid crystal cell substrate is sandwiched between two polarizing plates,
One polarization axis was arranged and attached so as to be parallel to the inclined electrodes 3 and 4 in FIG. 1B, and the other polarization axis was perpendicular to the polarization axis.

【0028】図1(b)に示す電極3に1Vの電圧を印
加し、電極4は0Vに設定する。また、図1(a)に示
す電極1,2には0.5Vの電圧を印加する。これによ
り、各画素の開口部では図2(a)の模式図に示すよう
に、概ね液晶分子5の多くは同一方向に配向し、一方の
偏光板を通過した光は他方の偏光板によって遮られて暗
状態を示した。
A voltage of 1 V is applied to the electrode 3 shown in FIG. 1B, and the voltage of the electrode 4 is set to 0 V. A voltage of 0.5 V is applied to the electrodes 1 and 2 shown in FIG. Thereby, as shown in the schematic diagram of FIG. 2A, most of the liquid crystal molecules 5 are oriented in the same direction in the opening of each pixel, and light passing through one polarizing plate is blocked by the other polarizing plate. And showed a dark state.

【0029】次に、電極3,4の電圧は1Vと0Vを保
持したまま電極1に電圧Va(但し、3V≦Va≦10
Vとする)を印加し、電極2の電圧を0Vに設定する。
各画素の開口部では図2(b)の模式図に示すように、
液晶分子5は電界により配向方向が変化する。これによ
り液晶分子5の配向方向が2枚の偏光板の偏光軸の中間
に位置するため一方の偏光板を通過した光の偏光方向は
液晶分子5によって変化するものゝ、他方の偏光板を通
過し明状態を示した。
Next, while maintaining the voltages of the electrodes 3 and 4 at 1 V and 0 V, the voltage Va is applied to the electrode 1 (provided that 3 V ≦ Va ≦ 10
V), and the voltage of the electrode 2 is set to 0V.
At the opening of each pixel, as shown in the schematic diagram of FIG.
The alignment direction of the liquid crystal molecules 5 is changed by an electric field. As a result, since the orientation direction of the liquid crystal molecules 5 is located in the middle of the polarization axes of the two polarizing plates, the polarization direction of the light passing through one of the polarizing plates is changed by the liquid crystal molecules 5, and the light passing through the other polarizing plate. A bright state was indicated.

【0030】暗状態から明状態した時、総輝度変化に対
して輝度変化が90%になる時間をTrとする。電極3
の電圧をVa’(但し、0V<Va’<3Vとする)、
電極4の電圧を0Vに設定し、電極1,2の電圧をV
a'/2にして明状態から暗状態にする時、総輝度変化
に対して輝度変化が90%になる時間をTfとする。
The time when the luminance change becomes 90% of the total luminance change when the state changes from the dark state to the light state is defined as Tr. Electrode 3
Is Va ′ (where 0V <Va ′ <3V),
The voltage of the electrode 4 is set to 0 V, and the voltage of the electrodes 1 and 2 is set to V
When changing from a bright state to a dark state at a ′ / 2, the time when the luminance change becomes 90% of the total luminance change is defined as Tf.

【0031】図3に、電極1,2間の電界強度に対する
応答速度Trと、電極3,4間の電界強度に対する応答
速度Tfを示す。
FIG. 3 shows a response speed Tr to the electric field strength between the electrodes 1 and 2 and a response speed Tf to the electric field strength between the electrodes 3 and 4.

【0032】Trは電界強度0.7V/μm以上で50
ms以下、Tfはいずれの場合も50ms以下であっ
た。また、Va=10Vでの暗状態と明状態の最大コン
トラストは80であった。
Tr is 50 at an electric field strength of 0.7 V / μm or more.
ms, and Tf was 50 ms or less in each case. The maximum contrast between the dark state and the bright state at Va = 10 V was 80.

【0033】〔比較例 1〕図1(b)で示すような電
極を下基板に形成せずに、ポリイミド系配向膜を塗布、
焼成した。一方、上基板には図1(a)に示すようなパ
ターンの電極を形成した後、ポリイミド系配向膜を塗
布、焼成した。上下基板上の配向膜にラビングを施し、
ラビング方向は互いに平行で、かつ、上基板に形成され
た電極間に電圧が印加された時生じる電界の方向に対し
て85度の角度をなすようにした。
Comparative Example 1 A polyimide-based alignment film was applied without forming an electrode as shown in FIG.
Fired. On the other hand, after an electrode having a pattern as shown in FIG. 1A was formed on the upper substrate, a polyimide-based alignment film was applied and fired. Rubbing the alignment film on the upper and lower substrates,
The rubbing directions were parallel to each other, and made an angle of 85 degrees with the direction of the electric field generated when a voltage was applied between the electrodes formed on the upper substrate.

【0034】実施例1と同様にして液晶セルを作製し、
液晶を封入した。一方の偏光板はその偏光軸がラビング
方向と平行に、他方はその偏光軸がラビング方向と垂直
になるよう配置し貼付けた。これによりノーマリクロー
ズ特性の液晶表示装置が得られた。
A liquid crystal cell was prepared in the same manner as in Example 1,
Liquid crystal was sealed. One polarizing plate was placed and attached such that its polarization axis was parallel to the rubbing direction, and the other was so that its polarization axis was perpendicular to the rubbing direction. As a result, a liquid crystal display device having normally closed characteristics was obtained.

【0035】暗状態から明状態(または明状態から暗状
態)に変化する時の総輝度変化に対し90%輝度が変化
する時間:応答速度Tr(応答速度Tf)と、電極1,
2間の電界強度との関係を図4に示す。Trは電界強度
0.8V/μm以上で50ms以下になるが、Tfは電
界強度による変化はほとんど認められず、約100ms
であった。
The time during which the luminance changes by 90% with respect to the total luminance change when changing from the dark state to the bright state (or from the bright state to the dark state): the response speed Tr (response speed Tf)
FIG. 4 shows the relationship with the electric field strength between the two. Tr is 50 ms or less when the electric field strength is 0.8 V / μm or more, but Tf is hardly changed by the electric field strength, and is about 100 ms.
Met.

【0036】〔実施例 2〕液晶セルの構成は実施例1
と同様にし、液晶にΔεが−4.8(20℃)、Δnが
0.044(589nm,20℃)、ηが57cp(2
0℃)のネマチック液晶ZLI−2806(メルク製)
を用いてその応答特性を調べた。
[Embodiment 2] The structure of a liquid crystal cell is Embodiment 1.
In the same manner as above, Δ 液晶 is -4.8 (20 ° C.), Δn is 0.044 (589 nm, 20 ° C.), and η is 57 cp (2
0 ° C) nematic liquid crystal ZLI-2806 (Merck)
The response characteristics were examined using.

【0037】Tr、Tfは実施例1と大差はなく、50
ms以下の応答が可能であった。しかも、Va=10V
での暗状態と明状態とのコントラストは100であっ
た。
Tr and Tf are not much different from those of the first embodiment,
A response of less than ms was possible. Moreover, Va = 10V
The contrast between the dark state and the bright state was 100.

【0038】〔実施例 3〕液晶セルの構成で上下の電
極が画素部で上から見て40度の角度をなすように配置
し、他は実施例1と同様にして応答速度を調べた。
Example 3 In the structure of the liquid crystal cell, the response speed was examined in the same manner as in Example 1 except that the upper and lower electrodes were arranged at an angle of 40 degrees when viewed from above in the pixel portion.

【0039】Tr、Tfとも実施例1と大差はなく、5
0ms以下の応答が可能であった。Va=10Vでの暗
状態と明状態とのコントラストは60であった。
Both Tr and Tf are not much different from those of the first embodiment.
A response of 0 ms or less was possible. The contrast between the dark state and the bright state at Va = 10 V was 60.

【0040】〔実施例 4〕液晶セルの構成で上下の電
極が画素部で50度の角度をなすように配置し、他は実
施例1と同様にして応答速度を調べた。
Example 4 The response speed was examined in the same manner as in Example 1 except that the upper and lower electrodes of the liquid crystal cell were arranged at an angle of 50 degrees in the pixel portion.

【0041】Tr、Tfとも実施例1と大差はなく、5
0ms以下の応答が可能であった。Va=10Vでの暗
状態と明状態とのコントラストは70であった。
Both Tr and Tf are not much different from those of the first embodiment.
A response of 0 ms or less was possible. The contrast between the dark state and the bright state at Va = 10 V was 70.

【0042】〔実施例 5〕図5(a),(b)に示す
ように、表面を研磨した厚さ1.1mmのガラス基板6
上にドレイン電極7、ゲート電極8、ソース電極9をマ
トリクス状に配置し、各画素にTFT10を形成した。
[Embodiment 5] As shown in FIGS. 5A and 5B, a 1.1 mm thick glass substrate 6 having a polished surface.
A drain electrode 7, a gate electrode 8, and a source electrode 9 were arranged in a matrix on the TFT, and a TFT 10 was formed in each pixel.

【0043】図5(b)に示すように、TFT10は、
ゲート電極8上にゲート絶縁膜13を介してドレイン電
極7、ソース電極9が積層されており、それらの電極は
アモルファスシリコン12a、及びそのオーミック接合
部12bを介して接続されている。
As shown in FIG. 5B, the TFT 10
A drain electrode 7 and a source electrode 9 are stacked on the gate electrode 8 via a gate insulating film 13, and these electrodes are connected via an amorphous silicon 12a and an ohmic junction 12b thereof.

【0044】また、コモン電極11は図5(a)に示す
ようにゲート電極8との交差部は図5(b)に示すよう
に絶縁層15を介して立体的に配置されている。更に、
画素部では電極等を保護する保護膜14が積層されてい
る。ソース電極9とコモン電極11との間隙6.5μ
m、電極幅4μmとした。
As shown in FIG. 5A, the intersection of the common electrode 11 and the gate electrode 8 is three-dimensionally arranged via the insulating layer 15 as shown in FIG. 5B. Furthermore,
In the pixel portion, a protective film 14 for protecting electrodes and the like is laminated. 6.5 μm between source electrode 9 and common electrode 11
m, and the electrode width was 4 μm.

【0045】対向基板には、実施例1の図1(b)に示
すようなパターンでソース電極9と45度の角度をなす
電極を形成した。なお、上記と同様に電極間隙6.5μ
m、電極幅4μmとした。
On the counter substrate, an electrode was formed at an angle of 45 degrees with the source electrode 9 in a pattern as shown in FIG. Note that the electrode gap is 6.5 μ as in the above.
m, and the electrode width was 4 μm.

【0046】スペーサを挾んで上下基板ギャップを7μ
mとなるように調節し組み立てた。液晶としてはΔεが
4.3(20℃)、Δnが0.072(589nm,20
℃)、ηが25cp(20℃)のネマチック液晶(チッ
ソ製)を封入し、実施例1と同様に偏光板を貼付けた。
The gap between the upper and lower substrates is 7 .mu.
m and adjusted. As a liquid crystal, Δε is 4.3 (20 ° C.) and Δn is 0.072 (589 nm, 20 ° C.).
° C), and a nematic liquid crystal (manufactured by Chisso) having an η of 25 cp (20 ° C) was sealed, and a polarizing plate was attached in the same manner as in Example 1.

【0047】コモン電極11をグランドレベルに保ち、
ドレイン電極7、ゲート電極8の電圧をコントロールし
てソース電極9に0〜10Vの電圧を印加し、対向基板
の2つの電極にはVa’,Vb’(但し、0≦Vb’<
Va’≦4.5V)の電圧を印加した。その結果、各画
素での光透過率の調整が可能となり、各階調の明状態及
び暗状態を表示することができた。
The common electrode 11 is kept at the ground level,
A voltage of 0 to 10 V is applied to the source electrode 9 by controlling the voltages of the drain electrode 7 and the gate electrode 8, and Va ′ and Vb ′ (where 0 ≦ Vb ′ <
Va ′ ≦ 4.5 V). As a result, the light transmittance of each pixel can be adjusted, and a bright state and a dark state of each gradation can be displayed.

【0048】応答速度Trは、ソース電極9とコモン電
極11間に1.0V/μm以上の電圧を印加した場合共
に50ms以下であった。ソース電極9とコモン電極1
1間の電界を弱め、暗状態を表示する際のTfも50m
s以下となった。また、暗状態と明状態の最大コントラ
ストは80であった。
The response speed Tr was 50 ms or less when a voltage of 1.0 V / μm or more was applied between the source electrode 9 and the common electrode 11. Source electrode 9 and common electrode 1
Tf for weakening the electric field between 1 and displaying a dark state is also 50 m
s or less. The maximum contrast between the dark state and the bright state was 80.

【0049】〔実施例 6〕図6(b)に示すように、
表面を研磨した厚さ1.1mmのガラス基板上に電極
1,2,9a,9bを形成した。これらをマトリクス状
に配置する。
[Embodiment 6] As shown in FIG.
Electrodes 1, 2, 9a and 9b were formed on a 1.1 mm thick glass substrate whose surface was polished. These are arranged in a matrix.

【0050】電極9aはソース電極としてドレイン電極
7a、ゲート電極8とともにTFT10aを形成する。
同様に電極9bはソース電極としてドレイン電極7b、
ゲート電極8とともにTFT10bを形成する。電極1
はドレイン電極と交差しないよう立体的に配置する。電
極2もドレイン電極、ソース電極と交差しないように立
体的に配置する。電極1と電極9bの中心線の交わる角
度θは75度とした。但し、θは75度に限定されず4
5〜90度の範囲で適宜設定することができる。
The electrode 9a forms a TFT 10a together with the drain electrode 7a as a source electrode and the gate electrode 8.
Similarly, the electrode 9b is a drain electrode 7b as a source electrode,
The TFT 10b is formed together with the gate electrode 8. Electrode 1
Are three-dimensionally arranged so as not to cross the drain electrode. The electrode 2 is also arranged three-dimensionally so as not to cross the drain electrode and the source electrode. The angle θ at which the center lines of the electrode 1 and the electrode 9b intersect was 75 degrees. However, θ is not limited to 75 degrees and 4
It can be set appropriately within the range of 5 to 90 degrees.

【0051】電極1と電極2との間隔及び電極9aと電
極9bとの間隔は30μmとする。対向基板には導電性
物質を使用せず、図6(a)に示すように遮光層17を
設けた。スペーサを挟んで上下基板ギャップを5μmに
調節し両基板を貼合せた。偏光板は、その偏光軸が16
a、16bで示す方向となるよう貼付けた。
The distance between the electrodes 1 and 2 and the distance between the electrodes 9a and 9b are 30 μm. The light-shielding layer 17 was provided as shown in FIG. The gap between the upper and lower substrates was adjusted to 5 μm with the spacer interposed therebetween, and both substrates were bonded together. The polarizing plate has a polarization axis of 16
a, 16b.

【0052】液晶としてはチッソ製のΔεが4.3(2
0℃)、Δnが0.072(589nm,20℃)、η
が25cp(20℃)のネマチック液晶を用いた。但
し、液晶としてはこれに限らない、例えば、誘電率異方
性が負の液晶ZLI−2806(メルク製)Δε:−
4.8(20℃)、Δn:0.044(589nm,20
℃)、η:57cp(20℃)のネマチック液晶を用い
てもよい。
As a liquid crystal, Δε manufactured by Chisso was 4.3 (2
0 ° C.), Δn is 0.072 (589 nm, 20 ° C.), η
Used a nematic liquid crystal of 25 cp (20 ° C.). However, the liquid crystal is not limited to this. For example, a liquid crystal having a negative dielectric anisotropy ZLI-2806 (manufactured by Merck) Δε: −
4.8 (20 ° C.), Δn: 0.044 (589 nm, 20
° C) and η: 57 cp (20 ° C).

【0053】電極1に電圧Va、電極2に電圧Vbを、
更に、ドレイン電極7a,7b、ゲート電極8の電圧を
調整して、電極9a,9bに電圧(Va+Vb)/2を
印加する。但し、0≦Vb<Va≦20Vとする。これ
により暗状態を示した。
A voltage Va is applied to the electrode 1, a voltage Vb is applied to the electrode 2,
Further, the voltages of the drain electrodes 7a and 7b and the gate electrode 8 are adjusted, and a voltage (Va + Vb) / 2 is applied to the electrodes 9a and 9b. However, it is assumed that 0 ≦ Vb <Va ≦ 20V. This indicated a dark state.

【0054】次に、ドレイン電極7a、ゲート電極8の
電圧を調整して電極9aに印加される電圧を(Va+V
b)/2〜Vaの範囲で変化させる。また、同様にドレ
イン電極7b、ゲート電極8の電圧を調整して電極9b
に印加される電圧をVb〜(Va+Vb)/2の範囲で
変化させる。これにより各階調の明状態を表示できた。
Next, the voltage applied to the electrode 9a is adjusted to (Va + V) by adjusting the voltages of the drain electrode 7a and the gate electrode 8.
b) Change in the range of / 2 to Va. Similarly, the voltages of the drain electrode 7b and the gate electrode 8 are adjusted to adjust the voltage of the electrode 9b.
Is changed in the range of Vb to (Va + Vb) / 2. Thereby, the bright state of each gradation could be displayed.

【0055】応答速度Tr、Tfは、Va=18V、V
b=0Vの時ともに50ms以下となった。また、最大
コントラストは100であった。
The response speeds Tr and Tf are as follows: Va = 18V, V
Both became 50 ms or less when b = 0V. The maximum contrast was 100.

【0056】〔実施例 7〕図5(a)、(b)のよう
に一方の基板に電極とTFTを形成した。他方の対向基
板にもドレイン電極、ゲート電極を形成し、図1(b)
の電極パターンで画素部の電極を形成して一方をソース
電極、他をコモン電極とした。ソース電極は基板上のド
レイン電極、ゲート電極と共にTFTを形成する。その
他は実施例5と同様にして液晶セルを作製した。
[Embodiment 7] As shown in FIGS. 5A and 5B, an electrode and a TFT were formed on one substrate. A drain electrode and a gate electrode are also formed on the other counter substrate, and FIG.
The electrode of the pixel portion was formed by the electrode pattern described above, and one was a source electrode and the other was a common electrode. The source electrode forms a TFT together with the drain electrode and the gate electrode on the substrate. Otherwise, a liquid crystal cell was manufactured in the same manner as in Example 5.

【0057】両基板のコモン電極をグランドレベルに保
ち、それぞれのドレイン電極、ゲート電極の電圧をコン
トロールしてソース電極に0〜10Vの範囲で印加電圧
を調整した。その結果、実施例5の場合よりも光透過率
の微調整が可能となり、各階調の明状態及び暗状態を形
成でき、最大コントラストも90であった。
The voltage applied to the source electrode was adjusted in the range of 0 to 10 V by controlling the voltage of the drain electrode and the gate electrode of each substrate while keeping the common electrode of both substrates at the ground level. As a result, finer adjustment of the light transmittance became possible than in the case of Example 5, the bright state and the dark state of each gradation could be formed, and the maximum contrast was 90.

【0058】〔実施例 8〕図7(a),(b)に示す
ような電極パターンで上下基板にそれぞれ1画素分の電
極を形成した。2枚の偏光板の一方の偏光軸が図7
(a)に示す横に伸びた電極に平行になるように、ま
た、もう一方の偏光軸が垂直になるよう配置し貼付け
た。その他は実施例1と同様にして液晶セルを作製し
た。
[Embodiment 8] An electrode for one pixel was formed on each of the upper and lower substrates in an electrode pattern as shown in FIGS. 7 (a) and 7 (b). FIG. 7 shows one polarization axis of the two polarizing plates.
It was arranged and attached so as to be parallel to the laterally extending electrode shown in FIG. 7A and the other polarization axis was vertical. Otherwise, a liquid crystal cell was manufactured in the same manner as in Example 1.

【0059】図7の電極1に電圧Va、電極2に電圧V
b、電極3に電圧Va’、電極4に電圧Vb’(但し、
0≦Vb,Vb’≦Va、Va’≦10V)を印加し、
画素部での透過率を調べたところ、透過率が等しくなる
角度が上下左右及びそれらの中間の方向でほぼ一致し、
視野角も広いものが得られた。また、暗状態と明状態の
最大コントラストは80であった。
The voltage Va is applied to the electrode 1 and the voltage V is applied to the electrode 2 in FIG.
b, voltage Va ′ on electrode 3 and voltage Vb ′ on electrode 4 (however,
0 ≦ Vb, Vb ′ ≦ Va, Va ′ ≦ 10V)
When examining the transmittance in the pixel portion, the angle at which the transmittance becomes equal almost coincides in the upper, lower, left, right, and intermediate directions,
A wide viewing angle was obtained. The maximum contrast between the dark state and the bright state was 80.

【0060】〔実施例 9〕実施例6における両基板の
液晶との界面にポリイミド配向膜を塗布、焼成し、16
aで示す方向にラビング処理して液晶セルを組立てた。
その他は実施例6と同様にした。
Example 9 A polyimide alignment film was applied to the interface between both substrates and the liquid crystal in Example 6 and baked.
The liquid crystal cell was assembled by rubbing in the direction indicated by a.
Others were the same as in Example 6.

【0061】この液晶セルでは液晶封入時や初期状態に
おいてドメインの発生は認められなかった。応答速度に
関しては暗状態から明状態に移る速度が実施例6の場合
に比べて多少遅いが、Va=20V、Vb=0Vの時T
r、Tfは共に50ms以下であった。また、最大コン
トラストは100であった。
In this liquid crystal cell, generation of domains was not observed when the liquid crystal was sealed or in the initial state. Regarding the response speed, the speed of transition from the dark state to the bright state is slightly slower than that of the sixth embodiment, but when Va = 20V and Vb = 0V, T
Both r and Tf were 50 ms or less. The maximum contrast was 100.

【0062】〔実施例 10〕実施例9の液晶セルにお
いて、リターデーションが0.12μmの位相差板をそ
の光学軸がラビング方向に対し、−45度の方向になる
ように基板と偏光板の間に挿入した。実施例9と比較し
てコントラストの向上がみられ、最大コントラストは1
10以上となった。
[Embodiment 10] In the liquid crystal cell of Embodiment 9, a retardation plate having a retardation of 0.12 μm was placed between the substrate and the polarizing plate such that the optical axis thereof was oriented at -45 degrees with respect to the rubbing direction. Inserted. The contrast was improved as compared with Example 9, and the maximum contrast was 1
10 or more.

【0063】〔実施例 11〕実施例5の液晶セルにお
いて、コモン電極の電圧をグランドレベルではなく、ド
レイン電極の逆相で交流化した電圧を5V印加した。そ
の結果、ドレイン電極に印加する電圧が実施例5の場合
に比べて約2/3となり、駆動電圧を低減することがき
た。
[Embodiment 11] In the liquid crystal cell of Embodiment 5, the voltage of the common electrode was not at the ground level, but a voltage of 5 V which was converted to an alternating current in the opposite phase of the drain electrode was applied. As a result, the voltage applied to the drain electrode was about / of that in the fifth embodiment, and the driving voltage was reduced.

【0064】〔実施例 12〕 図8に示すように、厚さ1.1mmのガラス基板上に電
極1,2,3,4,9a,9b,9c,9dを繰り返し
て形成配置し、電極9aはソース電極としてドレイン電
極7a,ゲート電極8aと共にTFT10aを形成す
る。
Embodiment 12 As shown in FIG. 8, electrodes 1, 2, 3, 4, 9a, 9b, 9c and 9d are repeatedly formed and arranged on a glass substrate having a thickness of 1.1 mm. Forms a TFT 10a together with a drain electrode 7a and a gate electrode 8a as a source electrode.

【0065】同様に電極9b,7b,8a及び9c,7
a,8b更には9d,7b,8bは、TFT10b,1
0c,10dを形成する。
Similarly, the electrodes 9b, 7b, 8a and 9c, 7
a, 8b, and 9d, 7b, 8b are TFTs 10b, 1
0c and 10d are formed.

【0066】電極1,3はドレイン電極と交差しないよ
うに立体的に配置する。電極2,4もドレイン電極、ソ
ース電極と交差しないように立体的に配置する。電極1
と電極9a及び電極3と電極9dの中心線の交わる角度
θは75度とした。但し、角度θは75度に限定するも
のではなく、45〜90度の範囲内で適宜設定すること
ができる。
The electrodes 1 and 3 are three-dimensionally arranged so as not to cross the drain electrodes. The electrodes 2 and 4 are also arranged three-dimensionally so as not to cross the drain electrode and the source electrode. Electrode 1
The angle θ at which the electrode 9a and the center line of the electrode 3 intersect with the center line of the electrode 9d was 75 degrees. However, the angle θ is not limited to 75 degrees, and can be appropriately set within a range of 45 to 90 degrees.

【0067】電極1と電極2、電極3と電極4、電極9
aと電極9b、電極9cと電極9dとの間隔は30μm
とする。対向基板には導電性物質を使用せず、実施例6
の場合のように電極配線部分を覆う遮光層を設けた。そ
の他は実施例6と同様にして液晶セルを作製した。
Electrode 1 and electrode 2, electrode 3 and electrode 4, electrode 9
a and the electrode 9b, and the distance between the electrode 9c and the electrode 9d are 30 μm.
And Example 6 did not use a conductive substance for the opposing substrate.
The light shielding layer covering the electrode wiring portion was provided as in the case of (1). Otherwise, a liquid crystal cell was manufactured in the same manner as in Example 6.

【0068】図8で、上部画素の電極1,電極9bに電
圧Va、電極2,電極9aに電圧Vbを印加すると暗状
態を示した。但し、0≦Vb<Va≦20Vであり、電
極9a,9bに電圧を印加する際にはドレイン電極7
a,7b,ゲート電極8aの電圧を調整する。また、電
極9aに印加する電圧をVb〜(Va+Vb)/2の範
囲で変化させ、電極9bにかかる電圧をVa〜(Va+
Vb)/2の範囲で変化させると、各階調の明状態を表
示することができた。
FIG. 8 shows a dark state when a voltage Va is applied to the electrodes 1 and 9b of the upper pixel and a voltage Vb is applied to the electrodes 2 and 9a. However, 0 ≦ Vb <Va ≦ 20V, and when a voltage is applied to the electrodes 9a and 9b, the drain electrode 7
a, 7b and the voltage of the gate electrode 8a are adjusted. Further, the voltage applied to the electrode 9a is changed in the range of Vb to (Va + Vb) / 2, and the voltage applied to the electrode 9b is changed to Va to (Va + Va + Vb).
When changed in the range of Vb) / 2, a bright state of each gradation could be displayed.

【0069】図8の下部画素の電極3に電圧Va、電極
4に電圧Vbを印加し、電極9c,9dに電圧(Va+
Vb)/2を印加すると暗状態を示した。但し、0≦V
b<Va≦20Vであり、電極9c,9dに電圧を印加
する際にはドレイン電極7a,7b,ゲート電極8bの
電圧を調整する。また、電極9cにかかる電圧を(Va
+Vb)/2〜Vaの範囲で変化させ、電極9dにかか
る電圧を(Va+Vb)/2〜Vbの範囲で変化させる
と各階調の明状態を表示することができた。
A voltage Va is applied to the electrode 3 and a voltage Vb is applied to the electrode 4 of the lower pixel in FIG. 8, and a voltage (Va +) is applied to the electrodes 9c and 9d.
When Vb) / 2 was applied, a dark state was exhibited. Where 0 ≦ V
b <Va ≦ 20 V, and when a voltage is applied to the electrodes 9c and 9d, the voltages of the drain electrodes 7a and 7b and the gate electrode 8b are adjusted. Further, the voltage applied to the electrode 9c is (Va
+ Vb) / 2 to Va, and the voltage applied to the electrode 9d was changed in the range of (Va + Vb) / 2 to Vb, it was possible to display the bright state of each gradation.

【0070】実施例6の場合に比べて信号を送る各画素
の指定が容易になり、高精細表示装置やテレビ用として
好適である。
The specification of each pixel to which a signal is to be transmitted is easier than in the case of the sixth embodiment, which is suitable for a high-definition display device or a television.

【0071】〔実施例 13〕実施例12の液晶セルに
おいて、TFTを有する基板の対向基板上に画素の開口
部を通り、ジグザグに伸びるR、G、Bからなる3色の
カラーフィルタを設けた。カラーフィルタ上には表面を
平坦化するために透明なエポキシ樹脂を積層した。配向
膜はこの透明エポキシ樹脂上に塗布した。その他の構成
は実施例12と同様にである。この液晶セルでは各画素
の透過率を制御することにより優れたカラー表示が得ら
れた。
[Thirteenth Embodiment] In the liquid crystal cell of the twelfth embodiment, three color filters of R, G, and B extending zigzag through the openings of the pixels are provided on the opposite substrate of the substrate having the TFT. . A transparent epoxy resin was laminated on the color filter to flatten the surface. An alignment film was applied on this transparent epoxy resin. Other configurations are the same as those of the twelfth embodiment. In this liquid crystal cell, excellent color display was obtained by controlling the transmittance of each pixel.

【0072】本発明の液晶表示装置は、ノート型パーソ
ナルコンピュータ、ラップトップコンピュータ、ワード
プロセッサ、ワークステーション、テレビなどの表示装
置、またはビューファーやプロジェクタ等にも用いるこ
とが可能である。
The liquid crystal display device of the present invention can be used for a display device such as a notebook personal computer, a laptop computer, a word processor, a workstation, and a television, or a viewer or a projector.

【0073】[0073]

【発明の効果】本発明により応答速度が速く、視野角が
いずれの方向からも広く、かつ、必ずしも液晶の配向手
段を設けることを必要としない液晶表示装置を提供する
ことができる。
According to the present invention, it is possible to provide a liquid crystal display device which has a high response speed, a wide viewing angle from any direction, and does not necessarily require the provision of liquid crystal alignment means.

【図面の簡単な説明】[Brief description of the drawings]

【図1】1画素の電極パターンの概略図である。FIG. 1 is a schematic diagram of an electrode pattern of one pixel.

【図2】液晶分子の配向状態を示す模式図である。FIG. 2 is a schematic diagram showing an alignment state of liquid crystal molecules.

【図3】実施例1における電界強度と応答速度との関係
を示すグラフである。
FIG. 3 is a graph showing a relationship between an electric field intensity and a response speed in Example 1.

【図4】比較例1における電界強度と応答速度との関係
を示すグラフである。
FIG. 4 is a graph showing the relationship between electric field strength and response speed in Comparative Example 1.

【図5】1画素の電極パターンとTFT形成部分の概略
図である。
FIG. 5 is a schematic view of an electrode pattern of one pixel and a TFT forming portion.

【図6】1画素の電極パターンと、遮光層パターンの概
略図である。
FIG. 6 is a schematic diagram of an electrode pattern of one pixel and a light-shielding layer pattern.

【図7】1画素の電極パターンの概略図である。FIG. 7 is a schematic diagram of an electrode pattern of one pixel.

【図8】電極パターンの概略図である。FIG. 8 is a schematic diagram of an electrode pattern.

【符号の説明】[Explanation of symbols]

1,2,3,4…電極、5…液晶分子、6…ガラス基
板、7,7a,7b…ドレイン電極、8,8a,8b…
ゲート電極、9,9a,9b,9c,9d…ソース電
極、10,10a,10b,10c,10d…薄膜トラ
ンジスタ、11…コモン電極、12a…アモルファスシ
リコン、12b…オーミック接合部、13…ゲート絶縁
膜、14…保護膜、15…絶縁層、16a…上基板側の
偏光板の偏光軸の方向、16b…下基板側の偏光板の偏
光軸の方向、17…遮光層。
1, 2, 3, 4 ... electrodes, 5 ... liquid crystal molecules, 6 ... glass substrates, 7, 7a, 7b ... drain electrodes, 8, 8a, 8b ...
Gate electrode, 9, 9a, 9b, 9c, 9d: source electrode, 10, 10a, 10b, 10c, 10d: thin film transistor, 11: common electrode, 12a: amorphous silicon, 12b: ohmic junction, 13: gate insulating film, 14: protective film, 15: insulating layer, 16a: direction of the polarizing axis of the polarizing plate on the upper substrate side, 16b: direction of the polarizing axis of the polarizing plate on the lower substrate side, 17: light shielding layer.

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平1−120528(JP,A) 特開 昭50−116059(JP,A) 特開 昭50−116197(JP,A) 特開 昭54−43047(JP,A) (58)調査した分野(Int.Cl.7,DB名) G02F 1/1343 G02F 1/133 575 G02F 1/1368 G09G 3/36 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-1-120528 (JP, A) JP-A-50-116059 (JP, A) JP-A-50-116197 (JP, A) JP-A-54-116 43047 (JP, A) (58) Field surveyed (Int. Cl. 7 , DB name) G02F 1/1343 G02F 1/133 575 G02F 1/1368 G09G 3/36

Claims (9)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】少なくとも一方が透明な一対の基板、 該一対の基板の内の一方の基板上に形成された複数種類
電極、 前記基板間に挟持された液晶層 前記基板の外側に配設された偏光板を有し、 前記複数種類の電極を介して前記液晶層に電界を印加す
る電界印加手段を備えた液晶表示装置であって、 前記複数種類の電極は、少なくとも画素部において前記
基板面に平行、かつ、少なくとも2方向に電界が印
加できるよう構成され、かつ前記複数種類の内の第1種
の電極がくの字形状を有し、前記複数種類の内の第2種
の電極が前記第1種の電極のくの字形状部分に平行に配
置されていることを特徴とする液晶表示装置。
At least one of a pair of transparent substrates, and a plurality of types formed on one of the pair of substrates.
Electrode, a liquid crystal layer sandwiched between said substrate and having a polarizing plate disposed outside the substrate, with the electric field applying means for applying an electric field to the liquid crystal layer through the plurality of types of electrodes a liquid crystal display device, the plurality of types of electrodes are parallel to the plane of the <br/> substrate at least the pixel portion, and is configured so that electric field can be applied in at least two directions, and among the plurality of types First kind of
Electrode has a V-shape, and a second type of the plurality of types
Are arranged in parallel with the V-shaped portion of the first type of electrode.
A liquid crystal display device characterized by being placed .
【請求項2】少なくとも一方が透明な一対の基板、 該一対の基板の内の一方の基板上に形成された複数種類
の電極、 前記基板間に挟持された液晶層、 画素毎に設けられたアクティブ素子、 前記基板の外側に配設された偏光板を有し、 前記複数種類の電極を介して前記液晶層に電界を印加す
る電界印加手段を備えた液晶表示装置であって、 前記複数種類の電極は、 少なくとも画素部において前記
基板面に平行に、かつ、少なくとも2方向に電界が印
加できるよう構成され、かつ 前記アクティブ素子のドレ
イン電極は、前記一方の基板上にくの字状の屈曲形状を
有して形成されていることを特徴とする液晶表示装置。
2. A pair of substrates, at least one of which is transparent, and a plurality of types formed on one of the pair of substrates.
Electrodes, a liquid crystal layer sandwiched between the substrates , an active element provided for each pixel, and a polarizing plate disposed outside the substrate, and an electric field is applied to the liquid crystal layer through the plurality of types of electrodes. Apply
A liquid crystal display device provided with an electric field applying unit that, the plurality of types of electrodes are parallel to the plane of the <br/> substrate at least the pixel portion, and is configured so that electric field can be applied in at least two directions And the drain of the active element
The in-electrode has a U-shaped bent shape on the one substrate.
A liquid crystal display device comprising:
【請求項3】前記画素の開口部を通り、ジグザグ状に伸
びる3色のカラーフィルターが形成されていることを特
徴とする請求項2記載の液晶表示装置。
3. A zigzag shape extending through an opening of the pixel.
It is noted that three color filters
3. The liquid crystal display device according to claim 2, wherein:
【請求項4】前記ドレイン電極は、前記画素の各々に対
し2本設けられ、前記アクティブ素子を介して前記複数
種類の電極の内の対応するものにそれぞれ接続されてい
ることを特徴とする請求項2もしくは3のいずれかに記
載の液晶表示装置。
4. The method according to claim 1, wherein the drain electrode is connected to each of the pixels.
And two of the plurality are provided via the active element.
Connected to the corresponding one of the electrode types
4. The method according to claim 2, wherein
Liquid crystal display device.
【請求項5】画素毎にアクティブ素子を備えている請求
項1記載の液晶表示装置。
5. An active element is provided for each pixel.
Item 2. The liquid crystal display device according to item 1.
【請求項6】前記アクティブ素子が薄膜トランジスタ
(TFT)である請求項2もしくは5のいずれかに記載
の液晶表示装置。
6. The thin film transistor according to claim 6, wherein said active element is a thin film transistor.
(TFT) according to any one of claims 2 and 5.
Liquid crystal display device.
【請求項7】前記基板上に無電界時に液晶分子を所定の
方向に配向させる配向手段が設けられている請求項1〜
6のいずれかに記載の液晶表示装置。
7. A method according to claim 1, wherein liquid crystal molecules are provided on the substrate when no electric field is applied.
An orientation means for orienting in the direction is provided.
7. The liquid crystal display device according to any one of 6.
【請求項8】前記基板の一方と前記偏光板との間に位相
差板が設けられている請求項1〜7のいずれかに記載の
液晶表示装置。
8. A phase shift between one of said substrates and said polarizing plate.
The difference plate according to claim 1, wherein the difference plate is provided.
Liquid crystal display.
【請求項9】前記基板のいずれか一方にカラーフィルタ
が設けられている請求項1あるいは2のいずれかに記載
の液晶表示装置。
9. A color filter on one of the substrates.
3. A method according to claim 1, wherein
Liquid crystal display device.
JP27924393A 1993-11-09 1993-11-09 Liquid crystal display Expired - Lifetime JP3294689B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27924393A JP3294689B2 (en) 1993-11-09 1993-11-09 Liquid crystal display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27924393A JP3294689B2 (en) 1993-11-09 1993-11-09 Liquid crystal display

Publications (2)

Publication Number Publication Date
JPH07134301A JPH07134301A (en) 1995-05-23
JP3294689B2 true JP3294689B2 (en) 2002-06-24

Family

ID=17608440

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27924393A Expired - Lifetime JP3294689B2 (en) 1993-11-09 1993-11-09 Liquid crystal display

Country Status (1)

Country Link
JP (1) JP3294689B2 (en)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW454101B (en) 1995-10-04 2001-09-11 Hitachi Ltd In-plane field type liquid crystal display device comprising liquid crystal molecules with more than two different kinds of reorientation directions and its manufacturing method
US5959599A (en) 1995-11-07 1999-09-28 Semiconductor Energy Laboratory Co., Ltd. Active matrix type liquid-crystal display unit and method of driving the same
TW329500B (en) 1995-11-14 1998-04-11 Handotai Energy Kenkyusho Kk Electro-optical device
JPH09146108A (en) * 1995-11-17 1997-06-06 Semiconductor Energy Lab Co Ltd Liquid crystal display device and its driving method
JP3708620B2 (en) * 1996-03-01 2005-10-19 株式会社半導体エネルギー研究所 Active matrix liquid crystal electro-optical device
US6911962B1 (en) 1996-03-26 2005-06-28 Semiconductor Energy Laboratory Co., Ltd. Driving method of active matrix display device
JP3194127B2 (en) * 1996-04-16 2001-07-30 大林精工株式会社 Liquid crystal display
US7098980B2 (en) 1996-04-16 2006-08-29 Obayashiseikou Co., Ltd. Liquid crystal display device comprising pixel and common electrodes inclined in first and second directions to form a zigzag shape which is symmetrical relative to alignment direction of liquid crystal
JP2907137B2 (en) * 1996-08-05 1999-06-21 日本電気株式会社 Liquid crystal display
JP3567183B2 (en) * 1996-08-19 2004-09-22 大林精工株式会社 Liquid crystal display
US6812985B1 (en) 1996-09-23 2004-11-02 Lg.Philips Lcd Co., Ltd. Liquid crystal display device
KR100476038B1 (en) * 1996-11-28 2005-06-20 비오이 하이디스 테크놀로지 주식회사 LCD and its manufacturing method
KR100257370B1 (en) 1997-05-19 2000-05-15 구본준 In plane switching mode liquid crystal display device
JP3966614B2 (en) 1997-05-29 2007-08-29 三星電子株式会社 Wide viewing angle LCD
DE19824249B4 (en) * 1997-05-30 2009-10-08 Samsung Electronics Co., Ltd., Suwon liquid-crystal display
US6704083B1 (en) 1997-05-30 2004-03-09 Samsung Electronics, Co., Ltd. Liquid crystal display including polarizing plate having polarizing directions neither parallel nor perpendicular to average alignment direction of molecules
KR100262405B1 (en) * 1997-06-27 2000-08-01 김영환 Liquid crystal display element
US6184961B1 (en) 1997-07-07 2001-02-06 Lg Electronics Inc. In-plane switching mode liquid crystal display device having opposite alignment directions for two adjacent domains
KR100251512B1 (en) 1997-07-12 2000-04-15 구본준 Transverse electric field liquid crystal display device
US6697140B2 (en) 1997-07-29 2004-02-24 Lg. Philips Lcd Co., Ltd. In-plane switching mode liquid crystal display device wherein portions of second gate line overlaps with data electrode
KR100255931B1 (en) 1997-08-14 2000-05-01 구본준, 론 위라하디락사 Transverse electric field liquid crystal display device
US6549258B1 (en) 1997-09-04 2003-04-15 Lg. Philips Lcd Co., Ltd. Hybrid switching mode liquid crystal display device
KR100293434B1 (en) * 1997-09-08 2001-08-07 구본준, 론 위라하디락사 In-plane switching mode liquid crystal display device
KR100293436B1 (en) 1998-01-23 2001-08-07 구본준, 론 위라하디락사 In plane switching mode liquid crystal display device
KR100354904B1 (en) 1998-05-19 2002-12-26 삼성전자 주식회사 Wide viewing angle liquid crystal display device
KR100344844B1 (en) 1998-07-07 2002-11-18 엘지.필립스 엘시디 주식회사 A Liquid Crystal Display Device And The Method For Manufacturing The Same
KR100320416B1 (en) 1998-08-26 2002-09-17 엘지.필립스 엘시디 주식회사 In-plane switching mode liquid crystal display device
KR100595294B1 (en) 1999-12-14 2006-07-03 엘지.필립스 엘시디 주식회사 Manufacturing method of color filter substrate for transverse electric field liquid crystal display device
KR100504531B1 (en) 1999-12-15 2005-08-03 엘지.필립스 엘시디 주식회사 An in-plane switching mode liquid crystal display device
JP3427981B2 (en) 2000-07-05 2003-07-22 日本電気株式会社 Liquid crystal display device and manufacturing method thereof
US6784966B2 (en) 2001-03-06 2004-08-31 Seiko Epson Corp. Liquid crystal device, projection type display and electronic equipment
KR100840326B1 (en) 2002-06-28 2008-06-20 삼성전자주식회사 Liquid crystal display device and thin film transistor substrate used therein
KR101309139B1 (en) * 2003-12-29 2013-09-17 엘지디스플레이 주식회사 array substrate and liquid crystal display device including the same
KR101186863B1 (en) * 2003-12-29 2012-10-05 엘지디스플레이 주식회사 Multi-domain in plane switching mode liquid crystal display device
CN100465739C (en) * 2007-01-18 2009-03-04 友达光电股份有限公司 Liquid crystal display, driving method thereof and electrode configuration method
JP5143484B2 (en) * 2007-07-09 2013-02-13 株式会社ジャパンディスプレイウェスト Display device and electronic device
KR20090063761A (en) * 2007-12-14 2009-06-18 삼성전자주식회사 Display device
JP5175127B2 (en) * 2008-03-28 2013-04-03 株式会社ジャパンディスプレイウェスト Liquid crystal display
US20120182512A1 (en) * 2009-08-07 2012-07-19 Takehisa Sakurai Liquid crystal display device
FR2976707B1 (en) * 2011-06-20 2013-11-22 Commissariat Energie Atomique LIQUID CRYSTAL DISPLAY WITH ERASTING ELECTRODES

Also Published As

Publication number Publication date
JPH07134301A (en) 1995-05-23

Similar Documents

Publication Publication Date Title
JP3294689B2 (en) Liquid crystal display
KR100486799B1 (en) Reflection-type liquid crystal display apparatus
JP3427611B2 (en) Liquid crystal display
US6697141B2 (en) Liquid crystal display with opaque common electrodes over the video signal lines and fabrication method thereof
US20070030428A1 (en) Liquid crystal display
JPH07181439A (en) Active matrix liquid crystal display device
US9494832B2 (en) Liquid crystal display device
WO2011058804A1 (en) Liquid crystal display device
US20040070715A1 (en) Vertical alignment mode liquid crystal display device
JPH06160878A (en) Liquid crystal display
US7483087B2 (en) In-plane switching mode liquid crystal display device with heating line and method thereof
JPH1130783A (en) Liquid crystal display element
JP4041610B2 (en) Liquid crystal display
JPH02176625A (en) Liquid crystal display device
JPH11109391A (en) Liquid crystal display device
KR100430376B1 (en) Liquid crystal display
JP3265802B2 (en) Liquid crystal display
JP3286579B2 (en) Transmissive liquid crystal display
US7184108B2 (en) Display device and diode array panel therefor
US6922223B2 (en) Vertical alignment mode liquid crystal display device having pixel electrode on protrusion on resin layer
JP2814783B2 (en) Liquid crystal display
JP3207374B2 (en) Liquid crystal display device
US20080225212A1 (en) Pixel designs for multi-domain vertical alignment liquid crystal display
KR20050025446A (en) Liquid crystal display device
JPH1172785A (en) Liquid crystal display device

Legal Events

Date Code Title Description
FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090405

Year of fee payment: 7

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090405

Year of fee payment: 7

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100405

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110405

Year of fee payment: 9

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313121

Free format text: JAPANESE INTERMEDIATE CODE: R313115

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110405

Year of fee payment: 9

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120405

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130405

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130405

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140405

Year of fee payment: 12

EXPY Cancellation because of completion of term