JP3257266B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a resin-sealed package.

[0002]

2. Description of the Related Art The structure of a conventional semiconductor device of a resin-sealed package is shown in FIGS.

The back surface 5 of the semiconductor chip 3 is fixed on the die pad 2 of the lead frame 1 and the semiconductor chip 3 is mounted. The die pad 2 is connected to the lead frame 1 by suspension leads 11. In the periphery of the die pad 2, the tips of the inner leads 6 are arranged at regular intervals from the die pad 2. On the main surface 4 of the semiconductor chip 3, as shown in FIG.
2 are formed. The electrode terminals 12 corresponding to each other
And the inner lead 6 are wire-bonded via the thin metal wire 15. Outer leads 7 are integrally connected to the inner leads 6, respectively. The die pad 2, the semiconductor chip 3, the inner leads 6, and the fine metal wires 15 are formed of epoxy resin or the like so that the outer leads 7 are exposed to the outside. The package body 18 is sealed. Each outer lead 7 exposed to the outside is subjected to a bending process along the package.

Next, a conventional technique will be described with reference to a schematic diagram of wire bonding shown in FIG. The thin metal wire 15 is used in the wire bonding method. The distal end of the fine metal wire 15 passed through the through hole 9 of the capillary 8 of the wire bonder head is melted by a high electric field discharge to form a metal ball 10, and the metal ball 10 is subjected to a load, a temperature and an ultrasonic wave. Then, the metal balls 10 and the electrode terminals 12 are alloyed and joined by pressing the electrode terminals 12 of the semiconductor chip 3 with the capillary 8.
Further, an extra thin metal wire 15 is fed out from the capillary 8, and the thin metal wire 15 is placed on the upper surface of the tip of the inner lead 6.
Is pressurized, and the thin metal wire 15 and the inner lead 6 are similarly alloyed and joined. At this time, the following three conditions are required for reliable bonding.

[0005] (1) The electrode terminals 12 are arranged on the periphery of the semiconductor chip 3 in order to prevent contact between the thin metal wires 15 and the edge of the semiconductor chip 3.

[0006] (2) The tip of the inner lead 6 and the die pad 2 are arranged with an interval capable of maintaining insulation from each other.

(3) The inner lead 6 embedded in the resin for bonding the thin metal wire 15 has a length that does not cause pin loose in the lead forming process.

In order to satisfy all of the above conditions, the thickness of the package body 18 surrounding the peripheral portion of the semiconductor chip 3 is set to be equal to 0.
8 mm or more is required.

Further, as another conventional technique, a semiconductor chip is mounted on a die pad smaller than the semiconductor chip,
There is a structure and a manufacturing method in which an inner lead is disposed on a main surface of a semiconductor chip, an electrical connection is made between an electrode terminal arranged near the center of the semiconductor chip and a tip of the inner lead by a thin metal wire, and the resin package body fills them. (JP-A-5-198612).

[0010]

The area of a semiconductor chip has been increasing with the increasing functionality and added value of the semiconductor chip, while the size of the system has been reduced. Therefore, the performance of a package on which a semiconductor chip is mounted requires mounting of a thin, small, and large-area chip. However, in the conventional semiconductor device as described above, 0.8 is required around the semiconductor chip in order to ensure reliability.
It is necessary to provide a package body with a thickness of
A large area semiconductor chip cannot be mounted in a small package body.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and provides a semiconductor device for improving the fixing strength between a suspension lead and a semiconductor chip when a large-area semiconductor chip is housed in a small package body. The purpose is to:

[0012]

According to a first aspect of the present invention, there is provided a semiconductor device having a main surface and a back surface facing each other,
A semiconductor chip having a plurality of electrode terminals arranged linearly or staggered in the vicinity of a center line of a long side or a short side on a main surface, and an electric signal of a suspension lead or an electrode terminal holding the semiconductor chip to the outside. Consists of a lead frame that constitutes an inner lead for taking out and an outer lead extending continuously from the inner lead, a thin metal wire connecting the electrode terminal and the top surface of the inner lead tip, and a sealing resin that seals all except the outer lead. In the resin-type semiconductor package, the suspension leads are filled by holding the long side and / or the short side of the semiconductor chip, the vertical side of the both sides, the inclined side surface, the side surface provided with the processing groove, or the ridge on the back side of the semiconductor chip.

According to a second aspect of the present invention, there is provided a semiconductor device, wherein the semiconductor chip is a suspension lead that holds a side surface formed by a vertical plane of a long side and / or a short side of the semiconductor chip. The chip holding surface is a groove with a width wider than the chip thickness, a suspension lead with fine cross-hatched or parallel streaks and dimple-shaped irregularities,
At least one common inner lead arranged substantially parallel to the center line above the main surface of the semiconductor chip and near the center line of the long side or short side of the main surface, and above the main surface of the semiconductor chip and correspond to each other; A plurality of inner leads arranged in the vicinity of the electrode terminals to be connected, a plurality of thin metal wires for electrically connecting the plurality of electrode terminals of the semiconductor chip to the common inner lead and the plurality of inner leads, and the semiconductor Chip, said suspension lead,
A resin package body for sealing the common inner lead, the plurality of inner leads and the plurality of thin metal wires, a common outer lead connected to the common inner lead and exposed to the outside of the resin package body, A plurality of outer leads connected to the inner leads and exposed to the outside of the resin package body, wherein a distance between the main surface of the semiconductor chip and the common inner lead and the plurality of inner leads is 0.03 mm to 0.03 mm; It has an interval of .10 mm and is filled with the resin package body.

According to a fourth aspect of the present invention, there is provided a semiconductor device in which a semiconductor chip having a groove or a depression formed on a long side or a short side or both sides of the semiconductor chip and a portion holding the side surface of the semiconductor chip are flat. Or a suspending lead having a protrusion, at least one common inner lead disposed above the main surface of the semiconductor chip and near the center line of the long side or short side of the main surface substantially in parallel with the center line, and A plurality of inner leads arranged above the main surface and in the vicinity of the corresponding electrode terminals; and a plurality of inner leads for electrically connecting the plurality of electrode terminals of the semiconductor chip to the common inner lead and the plurality of inner leads. A metal wire for sealing the semiconductor chip, the suspension lead, the common inner lead, and the plurality of inner leads. A package body, a common outer lead connected to the common inner lead and exposed to the outside of the resin package body, and a plurality of outers connected to the plurality of inner leads and exposed to the outside of the resin package body, respectively. And a distance between the main surface of the semiconductor chip and the common inner lead and the plurality of inner leads is 0.03 m.
It has an interval from m to 0.10 mm and is filled with the resin package body.

The semiconductor device according to the fifth and sixth aspects of the present invention has a constriction in the middle of a lead for holding the semiconductor chip and a side surface consisting of a long side or a short side or a plane of both sides of the semiconductor chip. Then, a suspension lead bent from the constricted portion along the side surface from the semiconductor chip main surface side to the rear surface side, or a long side or a short side of the semiconductor chip or a side surface formed of a plane of both sides thereof is held. For this reason, the lead has a constriction in the middle, and the constricted portion is bent from above the constricted portion toward the back surface of the semiconductor chip so that the constricted portion is located on the back surface of the semiconductor chip. A bent suspension lead, disposed substantially parallel to the center line above the main surface of the semiconductor chip and near the center line of the long side or short side of the main surface. At least one common inner lead and the plurality of inner leads, wire bonding according to the above, the resin sealing, in which are met by the outer lead forming.

According to a seventh aspect of the present invention, in the semiconductor device, the tip of the lead holding the semiconductor chip and the side surface composed of the long side and / or the short side of the semiconductor chip is welded, discharged, immersed in eutectic solder. And a suspension lead formed in a spherical shape with at least one common inner lead disposed substantially parallel to the center line above the main surface of the semiconductor chip and near the center line of the long side or short side of the main surface, and It has a plurality of inner leads, and is satisfied by wire bonding, resin sealing, and outer lead molding as described in the preceding section.

According to another aspect of the present invention, there is provided a semiconductor device having a plurality of electrodes having a main surface and a back surface opposed to each other and arranged linearly or in a staggered manner near a center line of a long side or a short side on the main surface. A semiconductor chip having terminals, the side surfaces of which are inclined from the main surface to the rear surface by 10 ° to 60 ° toward the inside of the semiconductor chip, and bent along the inclined side surfaces of the long side and / or short side of the semiconductor chip; A suspending lead for holding the semiconductor chip, at least one common inner lead disposed above the main surface of the semiconductor chip and near the center line of the long side or short side of the main surface and substantially parallel to the center line, and a plurality of inner leads; It has leads and is filled by wire bonding, resin sealing, and outer lead molding as described in the preceding section.

[0018]

In the semiconductor device according to the first aspect of the present invention, a plurality of electrode terminals are linearly or staggered near the center line of the long side or the short side of the main surface of the semiconductor chip, and the semiconductor chip is fixed to the back surface of the semiconductor chip. The semiconductor chip is not provided with a die pad, and the side surface of the semiconductor chip is held by the suspension lead, and the common inner lead and the plurality of inner leads are arranged with a gap of 0.03 mm or more and 0.10 mm or less from the main surface of the semiconductor chip. The gap is filled with the resin package body.

In a semiconductor device according to a second aspect of the present invention,
The side surface of the semiconductor chip according to claim 1 is held by a suspension lead having a groove that can hold the semiconductor chip stably, and the common inner lead and the plurality of inner leads are 0.03 mm or more and 0.03 mm or more from the main surface of the semiconductor chip. A gap of 10 mm or less is provided and the gap is filled with the resin package body.

In the semiconductor device according to the third aspect of the present invention,
The semiconductor chip holding surface is stably held by a suspension lead having a cross-hatch-shaped or parallel fine streaks or dimple-shaped irregularities, and a common inner lead and a plurality of inner leads are connected to the main surface of the semiconductor chip by a distance of 0 mm. .0
A gap of 3 mm or more and 0.10 mm or less is provided, and the gap is filled with the resin package body.

In a semiconductor device according to a fourth aspect of the present invention,
Make a band-shaped groove or discontinuous dent on the side surface of the semiconductor chip, fit the tip of a suspension lead with a flat surface or a projection at that location, and stably hold the semiconductor chip,
The common inner lead and the plurality of inner leads are arranged with a gap of 0.03 mm or more and 0.10 mm or less from the main surface of the semiconductor chip, and the gap is filled with the resin package body.

In the semiconductor device according to the fifth aspect of the present invention,
A constriction is provided in the middle of the suspension lead, the tip of the suspension lead is bent downward from the constricted portion to stably hold the semiconductor chip, and the common inner lead and the plurality of inner leads are 0.03 mm or more from the main surface of the semiconductor chip by 0.03 mm or more. 10mm
The following gaps are provided and the gaps are filled with the resin package body.

In a semiconductor device according to a sixth aspect of the present invention,
A constriction is provided in the middle of the suspension lead, and the suspension lead is bent downward at the root of the constriction. The bent portion is set so that the constriction is located exactly on the back surface of the semiconductor chip. Further, the tip portion is twisted from the constricted portion to hold the semiconductor chip stably, and the common inner lead and the plurality of inner leads are connected to the main surface of the semiconductor chip by 0.03.
The gap is not less than 0.1 mm and not more than 0.10 mm, and the gap is filled with the resin package body.

In a semiconductor device according to a seventh aspect of the present invention,
A spherical portion is formed at the tip of the suspension lead by welding, electric discharge, eutectic solder immersion, or the like, and the semiconductor chip is stably held by the spherical portion. A gap of not less than 03 mm and not more than 0.10 mm is provided and the gap is filled with the resin package body.

In the semiconductor device according to the present invention,
The side surface of the semiconductor chip is inclined inward from the semiconductor chip main surface toward the back surface. The suspension leads are bent along the slope to stably hold the semiconductor chip, and the common inner lead and the plurality of inner leads are arranged with a gap of 0.03 mm or more and 0.10 mm or less from the main surface of the semiconductor chip. The gap is filled with the resin package body.

The wire bonding using the thin metal wires according to the first to eighth aspects is performed with one type of output waveform. However, it is further improved by synthesizing two or more types of ultrasonic waves having different output waveforms.

[0027]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a perspective plan view of a first embodiment of the semiconductor device of the present invention, FIG. 2A is a sectional view taken along the line AA of FIG. 1, and FIG. It is sectional drawing along the BB line.

The semiconductor chip 3 has a rectangular shape, and has a main surface 4 on which an integrated circuit is formed and a back surface 5 facing the main surface 4.
And Further, on the main surface 4 of the semiconductor chip 3, a plurality of electrode terminals 12 arranged linearly near the center line of the long side are formed. Main surface 4 of semiconductor chip 3
Above the plurality of electrode terminals 12 linearly arranged
And two common inner leads 13 are arranged in parallel so as to sandwich the common inner lead 13 and are located in a vertical relationship with the common inner lead 13 outside these common leads 13 and near the corresponding electrode terminals 12. A plurality of inner leads 14 are arranged. The common inner lead 13 is a bus bar for power and ground. The semiconductor device of the present invention does not have the die pad 2 on the back surface 5 of the semiconductor chip 3 as described above, and the manufacturing method is performed according to the following procedure.

First, a semiconductor chip having an integrated circuit pattern formed at regular intervals on a wafer is cut. The cut area of the wafer attached to the dicing sheet is cut by a dicing saw while leaving a part of the dicing sheet from the front surface to the back surface of the wafer, and is finished into an independent semiconductor chip 3. Independent semiconductor chip 3
Is 1 from dicing sheet by chip setting machine
It is peeled off individually and stored in the pocket of the carrier block. On the upper surface of the carrier block, a lead frame 1 used for assembling the semiconductor chip has a depression or a position regulating pin for being arranged at a predetermined position,
Here, the lead frame 1 is placed. In addition, a vacuum suction hole is provided on the bottom surface of the pocket to prevent the stored semiconductor chip 3 from moving in the pocket, so that the semiconductor chip 3 stored in the pocket is fixed at a predetermined position. .

The lead frame 1 has four suspension leads 11 for holding the semiconductor chip 3 as described above, and the side of the short side of the semiconductor chip 3 housed in the pocket of the carrier block is connected to the suspension lead 11. The fixing of the side surface of the semiconductor chip 3 to the holding surface of the suspension lead 11 is performed by the reaction force of the bent suspension lead or a quick-setting adhesive. At that time, common inner lead 1
The three and the plurality of inner leads 14 are located 0.03 mm or more and 0.10 mm or less on the main surface 4 of the semiconductor chip 3. Thereafter, ultrasonic thermocompression wire bonding is performed using a gold wire having a diameter of 25 μm to 30 μm to connect each electrode terminal on the semiconductor chip main surface in the pocket of the carrier block to the common inner lead 13 and the plurality of inner leads 14 on the carrier block. This work is performed in a series with the carrier block. The temperature at the time of wire bonding is 210 ° C. or more and 280 ° C. or less, and the applied ultrasonic wave may have one type of output waveform, but it is preferable to combine two or more types of output waveforms.

After the connection with the wires is completed, the lead frame 1 and the semiconductor chip 3 are removed from the carrier block, and the lead frame 1 is mounted on a sealing mold for obtaining an SOJ outer shape, and is sealed with an epoxy-based sealing resin. It is molded into a package. At this time, the sealing resin fills the gap between the semiconductor chip 3 main surface 4 and each of the inner leads 13 and 14. In this state, outer lead 1
By performing the surface metal film formation and the J formation on the surfaces 6 and 17, a small-sized and thin resin-sealed package-type semiconductor device capable of accommodating the large-area semiconductor chip 3 without impairing the reliability, particularly the moisture resistance, is obtained. realizable.

FIG. 3A is a sectional view of a semiconductor device according to a second embodiment of the present invention, and FIG. 3B is an enlarged view of a holding portion thereof. The wafer described in the first embodiment is diced by the method described in the first embodiment, and processed into a semiconductor chip 3. The semiconductor chip 3 is housed in the carrier block described in the first embodiment, and the inner leads 14 described in the first embodiment and the semiconductor chip 3 are fixed.
The semiconductor chip 3 is fixed to the lead frame 1 provided with four suspension leads 11 having the shape shown in FIG. The lead frame 1 having the suspension leads 11 as shown in the enlarged view of the holding portion in FIG. 3B is used for fixing. 300 μm or more, 650,
A groove 19 having a width of not more than μm and a depth of not less than 10 μm and not more than 170 μm is provided. Then, the side surface of the short side of the semiconductor chip 3 accommodated in the pocket of the carrier block is held by the semiconductor chip 3 holding surface of the suspension lead 11, and the alignment of the side surface of the semiconductor chip 3 with the holding surface of the suspension lead 11 is performed. The fixing is performed by using a reaction force of the groove 19 on the surface of the suspended suspension lead 11 and the suspension lead 11 or a quick-setting adhesive.

Next, wire bonding, resin sealing, and molding of the outer leads 16 and 17 are performed by the method described in the first embodiment, so that the reliability, particularly the moisture resistance, of the large-area semiconductor chip 3 is not impaired. A small and thin resin-sealed package type semiconductor device that can accommodate the semiconductor device can be realized.

FIG. 4A is a sectional view of a semiconductor device according to a third embodiment of the present invention, and FIG. 4B is an enlarged view of a holding portion thereof. The wafer described in the first embodiment is diced by the method described in the first embodiment, and processed into semiconductor chips 3. The semiconductor chip 3 is housed in the carrier block described in the first embodiment, and four inner leads 14 described in the first embodiment and four suspension leads 11 having the shape shown in FIG. The semiconductor chip 3 is fixed to the lead frame 1 which has been used.

For fixing, a lead frame 1 having suspension leads 11 as shown in the enlarged view of the holding portion in FIG. 4B is used. The semiconductor chip 3 holding surface of the suspension lead 11 has a cross hatch shape as seen inside the tip of the tweezers.
Alternatively, parallel fine streaks or dimple 20-shaped uneven surfaces are provided. Then, the side surface of the short side of the semiconductor chip 3 stored in the pocket of the carrier block is held by the semiconductor chip 3 holding surface of the suspension lead 11, and the side surface of the semiconductor chip 3 and the holding surface of the suspension lead 11 are fixed. This is carried out by using the reaction force of the suspension lead 11 having fine cross-hatched or parallel streaks on the surface of the suspended suspension lead 11 or the dimple 20-shaped uneven surface or using a quick-setting adhesive. Hereinafter, wire bonding, resin sealing, outer leads 16 and 17 are performed by the method described in the first embodiment.
By performing this molding, a small and thin resin-sealed package-type semiconductor device capable of accommodating the large-area semiconductor chip 3 can be realized without impairing reliability, particularly, moisture resistance.

FIG. 5A is a sectional view of a semiconductor device according to a fourth embodiment of the present invention, FIG. 5B is an enlarged view of the holding portion, and FIG. 5C is an enlarged view of a similar holding portion. is there. The method of manufacturing the semiconductor chip 3 used in the present invention is performed according to the following procedure.

First, a semiconductor chip 3 having an integrated circuit pattern formed at regular intervals on a wafer is cut. The dicing method is to cut the cut area of the wafer attached to the dicing sheet in only one direction using a dicing saw, and then to connect the semiconductor chips 3 cut in a strip shape so that the side faces upward. To the side of the semiconductor chip 3 having a thickness of 20 μm.
m with a dicing blade 26 of 300 μm or less
Cutting is performed to a depth of not less than μm and not more than 300 μm, and this is also performed on the opposing side surface. Thereafter, the strip-shaped semiconductor chip 3 is similarly cut. The dicing is cut from the front surface to the back surface of the wafer while leaving a part of the dicing sheet, and a continuous semiconductor chip groove 21 is formed on the side surface of the semiconductor chip 3.
Alternatively, the semiconductor chip 3 is processed into a discrete semiconductor chip 3 having a discontinuity and a recess of a fixed length. The semiconductor chip 3 is first
Example 1 was stored in the carrier block described in Example 1.
The semiconductor chip 3 is fixed to the lead frame 1 provided with four suspension leads 11 having the shape shown in FIG.

For fixing, a lead frame 1 having suspension leads 11 as shown in the enlarged view of the holding portion in FIG. 5B is used. The semiconductor chip 3 holding portion of the suspension lead 11 is a flat surface so as to fit into the semiconductor chip groove 21, and the side surface of the semiconductor chip 3 and the holding surface of the suspension lead 11 are fixed by bending the tip of the bent suspension lead 11. This is performed by using the reaction force of the suspension lead 11 fitted into the chip groove 21 or the use of a quick-curing adhesive.

As a similar example of the fourth embodiment, as shown in FIG. 5C, there is also provided a lead frame 1 having a structure having a holding surface projection 22 which fits into the semiconductor chip groove 21 on the semiconductor chip 3 holding surface of the suspension lead 11. Similar effects can be expected.

The large-area semiconductor chip 3 is housed without impairing the reliability, especially the moisture resistance, by performing the wire bonding, the resin sealing, and the molding of the outer leads 16 and 17 by the method described in the first embodiment. A small and thin resin-sealed package type semiconductor device that can be realized can be realized.

FIG. 6A is a longitudinal sectional view of a fifth embodiment of the semiconductor device according to the present invention, FIG. 6B is a longitudinally enlarged view of the holding part, and FIG. 6C is a laterally enlarged view of the holding part. .

The wafer described in the first embodiment is diced by the method described in the first embodiment, and processed into a semiconductor chip 3. The semiconductor chip 3 is housed in the carrier block described in the first embodiment, and the inner leads 14 described in the first embodiment are fixed to the semiconductor chip 3 (FIG. 6A).
The semiconductor chip 3 is fixed to the lead frame 1 provided with four suspension leads 11 having the shape of FIG.

For fixing, a lead frame 1 having suspension leads 11 as shown in a vertical enlarged view of a holding portion in FIG. 6B is used. A constriction 23 is formed on the semiconductor chip 3 holding surface of the suspension lead 11, and the semiconductor chip 3 holding surface is bent downward from the constriction 23 portion, and the side of the short side of the semiconductor chip 3 housed in the pocket of the carrier block is formed. The semiconductor chip 3 is held by the suspension leads 11, and the side surface of the semiconductor chip 3 and the holding surface of the suspension leads 11 are fixed by using the reaction force of the folded suspension leads 11 or the use of a quick-setting adhesive. A state in which the semiconductor chip 3 is held by the suspension leads 11 is shown in a laterally enlarged view of a holding portion in FIG.

The wire bonding, resin sealing, and molding of the outer leads 16 and 17 are performed by the method described in the first embodiment, so that the large area semiconductor chip 3 can be manufactured without impairing the reliability, particularly, the moisture resistance. A small and thin resin-sealed package type semiconductor device that can accommodate the semiconductor device can be realized.

FIG. 7 (a) is a longitudinal sectional view of a sixth embodiment of the semiconductor device of the present invention, FIG. 7 (b) is a longitudinally enlarged view of the holding part, and FIG. 7 (c) is a laterally enlarged view of the holding part. It is. The wafer described in the first embodiment is diced by the method described in the first embodiment and processed into a semiconductor chip 3. The semiconductor chip 3 is housed in the carrier block described in the first embodiment, and the inner leads 14 described in the first embodiment and the suspension leads 11 having the shape of FIG. The semiconductor chip 3 is fixed to the provided lead frame 1.

For fixing, a lead frame 1 having a suspension lead 11 as shown in a vertical enlarged view of a holding portion in FIG. 7B is used. The constriction 23 is formed at the tip of the suspension chip 11 on the semiconductor chip 3 holding surface.
The portion is bent downward along the side surface of the semiconductor chip 3 at the root side of the suspension lead 11 from the portion, and the neck 23 is bent so as to hold the back surface 5 of the semiconductor chip 3. The fixing of the semiconductor chip 3 holding surface at the distal end of the constriction 23 and the back surface 5 of the semiconductor chip 3 is performed by using the reaction force of the bent suspension lead 11 or the use of a quick-setting adhesive. A state in which the semiconductor chip 3 is held by the suspension leads 11 is shown in a laterally enlarged view of the holding portion in FIG.

The large-area semiconductor chip 3 is housed without impairing the reliability, especially the moisture resistance, by performing the wire bonding and the molding of the resin-sealed outer leads 16 and 17 by the method described in the first embodiment. A small and thin resin-sealed package type semiconductor device that can be realized can be realized.

FIG. 8A is a longitudinal sectional view of a seventh embodiment of the semiconductor device of the present invention, FIG. 8B is a longitudinally enlarged view of the holding part, and FIG. 8C is a laterally enlarged view of the holding part. It is. The wafer described in the first embodiment is diced by the method described in the first embodiment and processed into a semiconductor chip 3. The semiconductor chip 3 is housed in the carrier block described in the first embodiment, and the inner leads 14 described in the first embodiment and the suspension leads 11 having the shape shown in FIG. The semiconductor chip 3 is fixed to the provided lead frame 1.

For fixing, a lead frame 1 having suspension leads 11 as shown in a vertical enlarged view of a holding portion in FIG. 8B is used. The tip of the semiconductor chip 3 holding portion of the suspension lead 11 is welded, discharged, or immersed in eutectic solder to form a spherical holding portion 24.
Formed. Then, the side surface of the short side of the semiconductor chip 3 housed in the pocket of the carrier block is held by the suspension lead 11, and the side surface of the semiconductor chip 3 and the suspension lead 1 are held.
1 is fixed to the holding surface by a reaction force of the bent suspension lead 11 or by using a quick-setting adhesive. FIG. 8 shows a state in which the semiconductor chip 3 is held by the suspension leads 11.
(C) is shown in a laterally enlarged view of the holding unit.

The wire bonding and the molding of the resin-sealed outer leads 16 and 17 are performed by the method described in the first embodiment, so that the large-area semiconductor chip 3 can be manufactured without impairing the reliability, particularly, the moisture resistance. A small and thin resin-sealed package type semiconductor device that can be housed can be realized.

FIG. 9A is a sectional view of an eighth embodiment of the semiconductor device according to the present invention, and FIG. 9B is an enlarged view of the holding portion. The semiconductor chip 3 has a rectangular shape, and has a main surface 4 on which an integrated circuit is formed and a back surface 5 opposed thereto. On the main surface 4 of the semiconductor chip 3, a plurality of electrode terminals 1 linearly arranged near the center line of the long side are arranged.
2 are formed. Two common inner leads 13 are arranged in parallel above the main surface 4 of the semiconductor chip 3 so as to sandwich the plurality of electrode terminals 12 arranged linearly, and outside the common inner leads 13. In addition, a plurality of inner leads 14 are disposed near the corresponding electrode terminals 12 in a vertical relationship with the common inner lead 13. The common inner lead 13 is a bus bar for power and ground.

The semiconductor device of the present invention does not have the die pad 2 on the back surface 5 of the semiconductor chip 3 as described above, and the manufacturing method is performed according to the following procedure. First, a semiconductor chip 3 having an integrated circuit pattern formed at regular intervals on a wafer is cut. The cutting area of the wafer, which is attached to the dicing sheet so that the back surface 5 of the semiconductor chip 3 faces up, is cut by a dicing saw from the back surface side of the wafer to the main surface side, leaving a part of the dicing sheet. The semiconductor chip 3 is finished. FIG. 1 is a sectional view of a cutting edge 27 of a dicing blade 26 used for the main cutting.
The cutting edge 27 has an angle of not less than 20 ° and not more than 120 °. The independent semiconductor chips 3 are peeled one by one from the dicing sheet by a chip setting machine and stored in the pocket of the carrier block. However, since the back surface 5 of the semiconductor chip 3 faces upward, the semiconductor chips are temporarily stored in the chip tray. After that, the chip tray is turned over and the semiconductor chip 3 is transferred, and is stored in the pocket of the carrier block with the main surface 4 facing upward. A lead frame 1 used for assembling the semiconductor chip 3 has a depression or a pin for positioning the lead frame 1 at a predetermined position on the upper surface of the carrier block, and the lead frame 1 is placed here.

A vacuum suction hole is provided on the bottom surface of the pocket to prevent the semiconductor chip 3 housed in the pocket from moving in the pocket, so that the semiconductor chip 3 housed in the pocket is fixed at a predetermined position. Has become. The lead frame 1 includes four suspension leads 11 for holding the semiconductor chip 3 as described above. The method of holding the semiconductor chip 3 by the suspension leads 11 is such that the semiconductor chip 3 holding surface of the suspension leads 11 is arranged along the inclined side surface 25 of the short side of the semiconductor chip 3 as shown in FIG. , The semiconductor chip 3 is held. Semiconductor chip 3
Is fixed to the holding surface of the suspension lead 11 by a reaction force of the bent suspension lead 11 or a quick-setting adhesive. At this time, the common inner lead 13 and the plurality of inner leads 14 are 0.03 m above the main surface 4 of the semiconductor chip 3.
m and 0.10 mm or less. After a while
Each electrode terminal 12 on the main surface 4 of the semiconductor chip 3 in the pocket of the carrier block and the common inner lead 13 and the plurality of inner leads 14 on the carrier block are connected by 25
The connection is made by an ultrasonic thermocompression wire bonding method using a gold wire having a diameter of μm to 30 μm. This work is performed in series with the carrier block. The temperature at the time of wire bonding is 210 ° C. or more and 280 ° C. or less, and the applied ultrasonic wave may have one type of output waveform, but it is preferable to combine two or more types of output waveforms.

After the connection with the wires is completed, the lead frame 1 and the semiconductor chip 3 are removed from the carrier block, and the lead frame 1 is mounted on a sealing mold for obtaining an SOJ outer shape, and is sealed with an epoxy-based sealing resin. It is molded into a package. At this time, the sealing resin fills the gap between the semiconductor chip 3 main surface 4 and each of the inner leads 13 and 14. In this state, outer lead 1
By performing the surface metal film formation and the J formation on 6, 17, a small and thin resin-sealed package-type semiconductor device capable of accommodating a large-area semiconductor chip 3 without impairing reliability, particularly moisture resistance, is realized. it can.

[0056]

The semiconductor device according to the first to eighth aspects of the present invention has a main surface and a back surface opposed to each other, and has a linear or linear shape near a center line of a long side or a short side on the main surface. A semiconductor chip having a plurality of electrode terminals arranged in a zigzag pattern, a suspension lead for holding the semiconductor chip, and a center line above a main surface of the semiconductor chip and near a center line of a long side or a short side of the main surface. At least one common inner lead disposed substantially in parallel with the plurality of inner leads disposed above the main surface of the semiconductor chip and near the corresponding electrode terminals, and a plurality of electrode terminals of the semiconductor chip. Excludes a plurality of thin metal wires for connecting to the common inner lead and the plurality of inner leads, and an outer lead integrally connected to the inner lead. A resin-type semiconductor package made of a sealing resin for sealing the semiconductor chip, wherein the suspension leads have long sides and / or long sides of the semiconductor chip main surface, vertical side surfaces, inclined side surfaces, processed grooved side surfaces or semiconductor chip back surfaces. Since the side ridges are maintained, a semiconductor chip having a large area can be accommodated without impairing reliability, particularly, moisture resistance.

[Brief description of the drawings]

FIG. 1 is a perspective plan view of a first embodiment of a semiconductor device of the present invention.

FIG. 2 is a sectional view of a semiconductor device according to a first embodiment of the present invention;

FIG. 3 is a sectional view of a semiconductor device according to a second embodiment of the present invention;

FIG. 4 is a sectional view of a third embodiment of the semiconductor device according to the present invention;

FIG. 5 is a sectional view of a fourth embodiment of the semiconductor device according to the present invention;

FIG. 6 is a sectional view of a fifth embodiment of the semiconductor device according to the present invention;

FIG. 7 is a sectional view of a semiconductor device according to a sixth embodiment of the present invention;

FIG. 8 is a sectional view of a semiconductor device according to a seventh embodiment of the present invention;

FIG. 9 is a sectional view of an eighth embodiment of the semiconductor device according to the present invention;

FIG. 10 is a diagram illustrating a dicing blade used to realize an eighth embodiment of the semiconductor device according to the present invention;

FIG. 11 is a partially cutaway perspective view showing a conventional semiconductor device.

FIG. 12 is an enlarged view of a main part of a conventional semiconductor device.

FIG. 13 is a schematic diagram of bonding.

FIG. 14 is a plan view of an example of a lead frame.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Lead frame 2 Die pad 3 Semiconductor chip 4 Main surface 5 Back surface 6 Inner lead 7 Outer lead 8 Capillary 9 Through hole 10 Metal ball 11 Suspended lead 12 Electrode terminal 13 Common inner lead 14 Plural inner leads 15 Fine metal wire 16 Common inner lead Connected common outer leads 17 Plural outer leads connected to a plurality of inner leads 18 Package body 19 Groove 20 Thin streaks or dimples 21 Semiconductor chip groove 22 Holding surface projection 23 Neck 24 Spherical holding portion 25 Inclined surface 26 Dicing blade 27 Cutting edge

──────────────────────────────────────────────────続 き Continuing from the front page (72) Keiichi Fujimoto, Inventor 1006 Kadoma, Kazuma, Osaka Prefecture Inside Matsushita Electric Industrial Co., Ltd. (56) References JP-A-6-188333 (JP, A) JP-A-5-190750 (JP, A) JP-A-4-317363 (JP, A) JP-A-2-278857 (JP, A) JP-A-6-125033 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 23/50

Claims (11)

(57) [Claims] 1. A semiconductor chip, a lead frame including a suspension lead group and an inner lead group, and a resin molded package made of a sealing resin, wherein the suspension lead group is on the same plane as the inner lead group. The semiconductor chip is disposed so as to sandwich at least two opposing side surfaces thereof, and the holding portions of the leads of the suspension lead group are bent along the side surfaces of the semiconductor chip, and the bent portions of the suspension lead group are bent. The semiconductor chip is fixed by sandwiching at least two opposing side surfaces of the semiconductor chip, and the tip of the inner lead group extends to the vicinity of the electrode terminal group of the semiconductor chip. And the semiconductor chip, the suspension lead group, and the inner lead group are connected to the sealing resin. A semiconductor device in which the outer leads are led out of the sealing resin, and the suspension leads are provided with semiconductor chip fixing strength increasing means for improving the fixing strength between the suspension leads and the semiconductor chip. . 2. The semiconductor chip fixing strength increasing means.
The suspension lead has a groove for fitting the semiconductor chip side surface on the surface of the suspension lead that holds the semiconductor chip,
2. The semiconductor device according to claim 1, wherein a tip end of the suspension lead goes around the back surface of the semiconductor chip. 3. The semiconductor chip fixing strength increasing means.
2. The semiconductor device according to claim 1, wherein the suspension lead has a cross-hatched shape on a surface of the suspension lead holding the semiconductor chip, a fine streak parallel to the main surface of the semiconductor chip, or a dimple-like unevenness. 3. . 4. The semiconductor chip fixing strength increasing means.
Te semiconductor device according to claim 1, characterized in that it comprises a hanging lead of the suspension leads of the semiconductor chip line or point-like on a surface of the holding projections. 5. The semiconductor chip fixing strength increasing means.
The suspension lead has a constricted portion on the surface holding the semiconductor chip of the suspension lead, on the back surface, or on both sides of the retaining surface, and the suspension lead is bent along the side surface of the semiconductor chip from the constricted portion. The semiconductor device according to claim 1, wherein the semiconductor device has a shape. 6. The semiconductor chip fixing strength increasing means.
The suspension lead has a constricted portion near the semiconductor chip back surface on both sides of the surface of the suspension lead holding the semiconductor chip, and the suspension lead has a shape in which a portion below the constricted portion is bent toward the semiconductor chip back surface. The semiconductor device according to claim 1, comprising: 7. The semiconductor chip fixing strength increasing means.
Te semiconductor device according to claim 1, characterized in that it comprises a semiconductor chip holding portion of the spherical tip of a surface hanging leads for holding a semiconductor chip of the suspension lead. 8. The semiconductor chip fixing strength increasing means.
2. The semiconductor device according to claim 1, wherein a surface of the suspension lead for holding the semiconductor chip has an inclination along an inclined side surface of the semiconductor chip. 9. A semiconductor chip, a lead frame including a suspension lead group and an inner lead group, and a resin molded package made of a sealing resin, wherein the suspension lead group is on the same plane as the inner lead group. The semiconductor chip is disposed so as to sandwich at least two opposing side surfaces thereof, and the holding portions of the leads of the suspension lead group are bent along the side surfaces of the semiconductor chip, and the bent portions of the suspension lead group are bent. The semiconductor chip is fixed by sandwiching at least two opposing side surfaces of the semiconductor chip, and the tip of the inner lead group extends to the vicinity of the electrode terminal group of the semiconductor chip. And the semiconductor chip, the suspension lead group, and the inner lead group are connected to the sealing resin. The semiconductor chip further sealed, the outer lead group is led out of the sealing resin to the outside, and the suspension lead has a semiconductor chip fixing strength increasing means for improving the fixing strength between the suspension lead and the semiconductor chip. A semiconductor device having a shape that is not at least a plane perpendicular to a main surface. 10. The semiconductor chip according to claim 1, wherein the semiconductor chip is
The semiconductor device according to claim 9 , wherein a groove or a dent is provided on a side of the opposite side or four sides of the semiconductor chip as the fixing strength increasing means . 11. The semiconductor chip according to claim 11, wherein the semiconductor chip is
10. The semiconductor device according to claim 9 , wherein the fixing strength increasing means has a structure in which side surfaces of four or four sides of the semiconductor chip are inclined from a main surface to a back surface of the semiconductor chip.