JP3246230B2 - Digital signal recording device and digital signal reproducing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal recording and reproducing apparatus for recording and reproducing digital signals, and more particularly to a recording apparatus for recording a digital signal obtained by encoding a video signal with high efficiency on a tape. Things.

[0002]

2. Description of the Related Art In recent years, a signal compression technique proposed by MPEG (Moving Picture Expert Group) has attracted attention as a standardization technique for high-efficiency encoding of video signals. This is to reduce the redundancy due to the correlation between the screens by using the difference between the screens. In general, data encoded using such a technique has a variable data rate, a block unit, a macro block. The length is variable in units, slices, pictures, and GOPs.

In recording and reproducing such coded data, especially in high-speed reproduction, data is reproduced in a partially thinned form, and in the form of a data string as it is, it cannot be correctly decoded by a decoder. . For this purpose, only the in-screen coded data is extracted from the coded data sequence, and the DCT low-frequency coefficient portion therein is extracted and used as high-speed reproduction data. During high-speed reproduction, data for high-speed reproduction is selected from the reproduced data and output to the decoder.

FIG. 6 is a block diagram of a conventional digital signal recording / reproducing apparatus. In the figure, 1 is an auxiliary data generation circuit, 20 is a formatter, 3 is an error correction encoder,
Is a recording signal generator, 5 is a recording head, 6 is a magnetic tape,
7 is a reproduction head, 8 is a reproduction signal generator, 9 is an error correction decoder, 21 is a deformatter, 22 is an auxiliary data classifier, 11 is an auxiliary data decoder, 12 is a system controller, and 13 is a switch. The auxiliary data generation circuit 1 includes a video selection circuit 100 and an important component extraction circuit 10
1 is included.

The formatter 20 includes a memory 200, a memory 201, a recording packet header adding circuit 204, and a switch 205.

Hereinafter, the operation at the time of recording will be described. First, the input coded television signal is directly sent to the formatter 2.
0 and to the auxiliary data generation circuit 1 as well. In the auxiliary data generation circuit 1, first, the video selection circuit 10
A value of 0 selects the data of the portion of the coded television signal that has been subjected to intra-screen coding.

The important component extraction circuit 101 extracts the DC component of each block as auxiliary data from the selected intra-screen encoded data, and the extracted auxiliary data is sent from the auxiliary data generation circuit 1 to the formatter 20.

[0008] The coded television signal is also input to the formatter 20 as it is, and is formatted into a predetermined track pattern together with auxiliary data by the formatter 20.

The memory 200 has auxiliary data for triple speed,
In the memory 201, auxiliary data for 27 × speed is stored for one screen. Each of the auxiliary data and the input data is divided by the size of the recording packet by the recording packet header adding circuit 205, and the header of the recording packet is added. Each of the recorded packetized data is output by controlling the read timing or address by the switch 205 so as to have the arrangement shown in FIG.

At this time, an auxiliary data / input signal switching flag is recorded in a header portion of each recording packet in order to distinguish a packet in which auxiliary data is recorded from a packet in which an input signal is recorded. Further, in order to switch the two types of auxiliary data generated according to the double speed, an auxiliary data type flag is recorded in a header portion of each auxiliary data recording packet. FIG. 9 shows the recording packet header.

The formatted data is input to an error correction encoder 3 and added with an error correction code. The recording signal generator 4 generates a recording signal by performing predetermined recording signal processing such as addition of a sync address and modulation on the data to which the error correction code has been added. The generated recording signal is recorded on the magnetic tape 6 by the recording head 5.

By the above operation, auxiliary data is recorded on the tape 6 in addition to the input coded television signal.

At the time of reproduction, recorded data is reproduced from a magnetic tape 6 by a reproduction head 7, subjected to processing such as demodulation and removal of a sync address by a reproduction signal generator 8, and outputted to an error correction decoder 9 as a reproduction signal. Is done. The reproduced signal is subjected to error correction by an error correction decoder 9,
Output to the deformatter 21.

The deformatter 21 separates the input coded television signal and the auxiliary data and outputs them separately.

At this time, the auxiliary data / input signal switching flag is read from the header portion of each packet and determined.
The auxiliary data classifier 22 determines the auxiliary data type flag from the header part of each auxiliary data packet according to the double speed, and selects either one type of auxiliary data.

The selected auxiliary data is expanded by the auxiliary data decoder 11 into the same format as the input coded television signal.

The coded television signal and the expanded auxiliary data are switched by a switch 13. This switching is performed, for example, when the system controller 12 is in a state where an error is likely to occur, such as in the high-speed playback mode, and the omission is likely to occur.

The signal resulting from the switching by the switch 13 is output to the decoder as a reproduced coded television signal.

[0019]

However, in the above-described conventional configuration, a flag is set for the type of auxiliary data (for high-speed reproduction, etc.) / Input signal and the type of auxiliary data at double speed, and the determination is made. Circuit is also required.

In view of the foregoing, it is an object of the present invention to provide a digital signal recording / reproducing apparatus which can easily determine the type of auxiliary data / input signal or the type of auxiliary data at double speed.

[0021]

According to a first aspect of the present invention, there is provided extraction means for extracting a part of the digital signal as important data from an input digital signal, and extracting the important data from a specific track on a recording medium. A digital signal recording apparatus, comprising: a rearranging unit that rearranges the digital signal and the important data so as to be arranged at a predetermined position; and a recording processing unit that records the rearranging unit.

According to a second aspect of the present invention, there is provided a reproduction processing means for performing a reproduction process from a recording medium on which an input signal and important data are recorded and extracting a reproduction signal, and from the reproduced data, important data based on information indicating a specific track A digital signal reproducing apparatus, comprising: important data separating means for separating an input signal and an input signal; and output means for switching and outputting an input signal and important data.

[0023]

According to the present invention, important data can be easily separated from a reproduced signal based on information such as a track number. Further, when separating two types of important data, it is possible to easily determine only important track information such as azimuth without determining a flag for separation.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a digital signal recording / reproducing apparatus according to the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a conventional digital signal recording / reproducing apparatus. In the figure, 1 is an auxiliary data generation circuit, 2 is a formatter, 3 is an error correction encoder, 4 is a recording signal generator, 5 is a recording head, 6 is a magnetic tape, 7 is
Is a reproduction head, 8 is a reproduction signal generator, 9 is an error correction decoder, 10 is a deformatter, 11 is an auxiliary data decoder,
Reference numeral 12 is a system controller, and 13 is a switch. The auxiliary data generation circuit 1 includes a video selection circuit 10
0, an important component extraction circuit 101 is included.

Hereinafter, the operation at the time of recording will be described. First, the input coded television signal is directly sent to the formatter 2.
And to the auxiliary data generation circuit 1 as well.
In the auxiliary data generation circuit 1, first, the video selection circuit 100 selects data of a portion of the coded television signal that has been subjected to intra-screen coding.

The important component extraction circuit 101 extracts the DC component of each block as auxiliary data from the selected intra-screen encoded data, and the extracted auxiliary data is sent from the auxiliary data generation circuit 1 to the formatter 2. The coded television signal is also input to the formatter 2 as it is, and is formatted into a predetermined track pattern together with auxiliary data by the formatter 2.

FIG. 2A shows the structure of the formatter in the first embodiment. FIG. 3 shows the data arrangement. The formatter 2 includes a memory 200, a recording packet header adding circuit 202, and a switch 203. The auxiliary data is stored in the memory 200 for each screen. The auxiliary data and the input data are divided by the recording packet header adding circuit 202 for each size of the recording packet, and the header of the recording packet is added. Each of the recorded packetized data is output by controlling the read timing or address by the switch 203 so as to have the arrangement shown in FIG.

At this time, an auxiliary data / input signal switching flag is recorded in a header portion of each recording packet in order to distinguish a packet recording the auxiliary data from a packet recording the input signal. Here, the azimuth for recording the auxiliary data is determined and recorded on either one.

FIG. 2B shows the structure of the formatter in the second embodiment. FIG. 4 shows the data arrangement. The formatter 2 includes a memory 200, a memory 201, a recording packet header adding circuit 202, and a switch 204. Auxiliary data for quadruple speed is stored in the memory 200, and auxiliary data for 16x speed is stored in the memory 201 for one screen. Each of the auxiliary data and the input data is divided by the size of the recording packet by the recording packet header adding circuit 202, and the header of the recording packet is added. Each of the recorded packetized data is output by controlling the read timing or address by the switch 204 so as to have the arrangement shown in FIG.

At this time, an auxiliary data / input signal switching flag is recorded in the header of each recording packet in order to discriminate the packet recording the auxiliary data from the packet recording the input signal. Further, as shown in FIG. 4, the auxiliary data generated in two types according to the double speed is recorded by changing the azimuth, so that it is not necessary to record a switching flag in the header portion of each auxiliary data recording packet. FIG. 5 shows the recording packet header.

The formatted data is input to the error correction encoder 3 and added with an error correction code. The recording signal generator 4 performs predetermined recording signal processing such as addition of a signal sync address and modulation on the data to which the error correction code has been added, to generate a recording signal. The generated recording signal is recorded on the magnetic tape 6 by the recording head 5.

By the above operation, auxiliary data is recorded on the tape 6 in addition to the input coded television signal.

At the time of reproduction, recorded data is reproduced from the magnetic tape 6 by the reproduction head 7, subjected to processing such as demodulation and removal of the sync address by the reproduction signal generator 8, and output to the error correction decoder 9 as a reproduction signal. Is done. The reproduced signal is subjected to error correction by an error correction decoder 9,
Output to the deformatter 10.

At this time, the auxiliary data / input signal switching flag is read from the header part of each packet to determine.
Also, the auxiliary data type flag is determined from the header part of each auxiliary data packet according to the double speed, and either one type of auxiliary data is selected.

At this time, since each sync address and track number are added to each recording packet, it is possible to know which track and which position each recording packet is in.

For example, when the auxiliary data exists in only one of the azimuths as shown in FIG. 3, the auxiliary data can be separated from only the signal of one azimuth in advance before the judgment by the flag. The azimuth signal does not need to be determined, and the hardware or time required for the determination can be reduced.

When there are two types of auxiliary data, for example, by arranging them in different azimuths as shown in FIG. 4, the type of auxiliary data does not require a special flag, and can be determined only by azimuth. .

The deformatter 10 first reproduces a flag indicating the presence or absence of auxiliary data. If the flag indicates that auxiliary data is present, the formatter 10 separates the input coded television signal from the auxiliary data and separates them from each other. Output to
The auxiliary data is expanded by the auxiliary data decoder 11 into the same format as the input coded television signal.

The coded television signal and the expanded auxiliary data are switched by a switch 13. This switching is performed, for example, when the system controller 12 is in a state where an error is likely to occur, such as in the high-speed playback mode, and the omission is likely to occur. If the flag extracted by the deformatter 10 indicates that no important component data is recorded, the switching is not performed.

The signal resulting from the switching by the switch 13 is output to the decoder as a reproduced coded television signal.

Note that the present invention is not limited to the circuit configurations shown in the first and second embodiments, but may have other configurations having the same effects. Further, the processing may be performed by software having the same function as the hardware configuration shown in the present embodiment. Further, the double speed of the high-speed reproduction data is set to 4 times or 16 times, but another double speed may be used.

The data arrangement is not limited to those shown in FIGS. 3 and 4, and the arrangement of the recording packet header may be another arrangement.

The switching of the data stream for high-speed reproduction may be determined not by the azimuth but by the track number or the like. Also, the type of the auxiliary data is a part of the data obtained by performing the intra-screen encoding, but is not limited thereto. Further, the configuration of the flag used for the determination may be another configuration having the same effect.

[0045]

As described above, according to the digital signal recording apparatus and the reproducing apparatus of the present invention, when the important data is separated from the reproduced signal, it can be easily separated based on the information such as the track number. it can. Further, when separating two types of important data, it is possible to easily determine only important track information such as azimuth without determining a flag for separation. This makes it possible to easily perform the type of the auxiliary data / input signal or the type based on the double speed in the auxiliary data.

[Brief description of the drawings]

FIG. 1 is a block diagram of a digital signal recording / reproducing apparatus according to a first embodiment of the present invention.

FIG. 2 is a block diagram of a formatter according to the first embodiment of the present invention.

FIG. 3 is a data layout diagram in the first embodiment of the present invention.

FIG. 4 is a layout diagram of data in a second embodiment of the present invention.

FIG. 5 is a layout diagram of a recording packet header according to a second embodiment of the present invention.

FIG. 6 is a block diagram of a conventional digital signal recording / reproducing apparatus.

FIG. 7 is a block diagram of a formatter of a conventional digital signal recording / reproducing apparatus.

FIG. 8 is a layout diagram of data in a conventional example.

FIG. 9 is a layout diagram of a recording packet header in a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Auxiliary data generation circuit 2 Formatter 3 Error correction encoder 4 Recording signal generator 5 Recording head 6 Magnetic tape 7 Reproduction head 8 Reproduction signal generator 9 Error correction decoder 10 Deformatter 11 Auxiliary data decoder 12 System controller 13 Switch 20 Formatter 21 Deformatter 100 Important component extraction circuit 101 Video selection circuit 200 Memory 201 Memory 202 Recorded packet header addition circuit 203 Switch

────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Akihiro Takeuchi 1006 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (56) References JP-A 5-120811 (JP, A) 137114 (JP, A) JP-A-5-276491 (JP, A) JP-A-7-274106 (JP, A) JP-A-7-222094 (JP, A) JP-A-7-288774 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) G11B 20/12 103 H04N 5/92

Claims (7)

(57) [Claims] 1. An extracting means for extracting a part of the digital signal as important data from the input digital signal, and rearranging the important data so that the important data is arranged only on one azimuth track among the tracks on the recording medium. Sorting means, and the important data sorted by the sorting means.
Digital signal recording apparatus comprising: a recording processing means for recording over data. 2. An extracting means for extracting a part of the digital signal from the input digital signal as important data, and two kinds of important data are respectively arranged on different azimuth tracks among the tracks of the recording medium. Sorting means for sorting, and the sorting means
A digital signal recording device comprising recording processing means for recording important data . 3. The digital signal recording apparatus according to claim 2, wherein said extraction means extracts two kinds of important data so as to be used for special reproduction at different speeds. 4. A reproduction processing means for performing a reproduction process from a recording medium on which an input signal and important data are recorded and extracting a reproduction signal, and separating the important data and the input signal from only a specific azimuth signal from the reproduction data. A digital signal reproducing apparatus comprising: important data separating means; and output means for switching and outputting an input signal and important data. 5. The output means outputs an input signal during normal reproduction.
5. The digital signal reproducing apparatus according to claim 4, wherein important data is switched and output during special reproduction. 6. An input signal and two kinds of important data are recorded on a recording medium, and an output means separates the two kinds of important data based on different azimuth signals among tracks of the recording medium. The digital signal reproducing device according to claim 5, wherein: 7. The digital signal reproducing apparatus according to claim 6, wherein the output means switches and outputs two kinds of important data during special reproduction at different speeds.