JP3232002B2 - Wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board suitable for, for example, a package for accommodating a semiconductor element and having a wiring circuit layer and a ground electrode layer and free from warpage and lamination failure.

[0002]

2. Description of the Related Art Conventionally, a ceramic multilayer wiring board capable of high-density wiring has been frequently used as a wiring board, for example, a multilayer wiring board used for a package for housing a semiconductor element. This multilayer ceramic wiring board is composed of an insulating substrate such as alumina and a wiring conductor made of a high melting point metal such as W or Mo formed on the surface thereof, and a concave portion is formed in a part of the insulating substrate. The semiconductor element is housed in the recess, and the recess is hermetically sealed by the lid.

[0003] However, since the ceramics constituting the insulating substrate of such a ceramic wiring board has a hard and brittle property, it is difficult to use the ceramics in a manufacturing process or a transporting process.
Chipping or cracking of the ceramic is liable to occur, and the hermetic sealing of the semiconductor element may be impaired, so that the yield is low.

On a ceramic wiring board, metallized ink is printed on a green sheet before sintering.
It is manufactured by laminating and sintering the printed sheets, but in the manufacturing process, firing at high temperature causes firing shrinkage, resulting in deformation such as warpage and dimensional variation in the obtained substrate. There is a problem that it is not easy to cope with the strict requirement of the flatness of the substrate such as the ultra-high density of the circuit substrate and the flip chip.

Therefore, recently, a printed circuit board has been proposed in which a fine circuit is formed by etching on the surface of a board to which a copper foil is adhered, and then the boards are laminated to form a multilayer. In order to increase the strength of such a printed circuit board, a substrate in which a spherical or fibrous inorganic filler is dispersed in an organic resin has been proposed. Application to a multi-chip module (MCM) or the like in which a large number of semiconductor elements are mounted is also being studied.

[0006]

However, when a multilayer wiring board is manufactured using an insulating board containing a thermosetting organic resin as described above, for example, as shown in FIG. In some cases, a ground (ground) electrode layer 3 is formed on at least one entire surface of the insulating substrate 1 in addition to the wiring circuit layer 2 for transmitting an electric signal to the surface or inside of the substrate 1. When the ground electrode layer 3 is formed using a dense metal such as a metal foil in the same manner as the wiring circuit layer 2, a plurality of insulating substrates 1 on which the wiring circuit layer 2 and the ground electrode layer 3 are formed are laminated, and finally, When the insulating substrate 1 is heat-cured, the volatile components contained in the insulating substrate 1 cause the substrate 1 to harden.
There is a problem that warpage occurs and blisters or the like are generated between an interface between the wiring circuit layer 2 and the insulating substrate 1 and between the insulating substrate 1 and the like.

[0007] Such a problem is required to increase the density of a multilayer wiring board or a package for accommodating a semiconductor element, and the mounting form tends to change from wire bonding to surface mounting such as flip chip. At present, there is no need to warp the wiring board and a higher flatness than before is required, which has been a major obstacle in satisfying these requirements.

[0008]

Means for Solving the Problems The inventors of the present invention have conducted intensive studies on the above-mentioned problems, and as a result, have provided an insulating substrate containing at least an organic resin, a wiring circuit layer made of a low-resistance metal, and a ground electrode layer. The wiring circuit layer is formed of a dense body, the ground electrode layer is formed of a porous body, and particularly, the wiring circuit layer is formed of a metal foil having a relative density of 90% or more. The layer is formed by a conductor containing a low resistance metal having a relative density of 60 to 90%. In other words, by forming the ground electrode layer from the porous material, even if a volatile component contained in the insulating substrate is volatilized when the thermosetting resin in the insulating substrate is thermally cured, the pores of the porous ground electrode layer can be removed. Can effectively release volatile components to the outside of the system, thereby preventing warpage of the substrate due to residual volatile components and blistering between the conductor layer and the insulating layer and between the insulating layers. A wiring board suitable for surface mounting such as a flip chip, which meets the demand for miniaturization and precision, can be obtained.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS As shown in FIG. 1, a wiring board according to the present invention has an insulating substrate 1, and a wiring circuit layer 2 and a ground electrode layer 3 formed on the surface and / or inside thereof. Further, the wiring circuit layer 2 and the ground electrode layer 3 are electrically connected by the through holes 4.

In the above structure, the insulating substrate 1 contains at least an organic resin, and preferably comprises a mixture of an organic resin and an inorganic filler, and the inorganic filler is contained in the organic resin at a ratio of 50 to 80% by volume. Dispersed uniformly.

As the inorganic filler constituting the insulating substrate, SiO ₂ , Al ₂ O ₃ , ZrO ₂ , TiO ₂ ,
AlN, BaTiO ₃ , SrTiO ₃ , zeolite, C
Known materials such as aTiO ₃ and aluminum borate can be used. The filler may be in the form of a substantially spherical powder having an average particle diameter of 20 μm or less, particularly 10 μm or less, optimally 7 μm or less, or a fibrous or woven fabric having an average aspect ratio of 2 or more, particularly 5 or more. Can be used.

On the other hand, as the organic resin in which the inorganic filler is dispersed, PPE (polyphenylene ether), BT
Resin (bismaleimide triazine), epoxy resin,
It is made of a resin such as a polyimide resin, a fluororesin, and a phenol resin, and it is particularly preferable that the raw material is a thermosetting resin that is liquid at room temperature.

The insulating substrate 1 is sufficiently mixed with the inorganic filler powder and the powder or liquid organic resin at a predetermined ratio by means of a kneading machine (kneader) or a kneading machine such as a three-roll machine. Thereafter, the insulating substrate is obtained by forming the sheet into a sheet by a known resin molding method such as a rolling method, an extrusion method, a doctor blade method, and an injection molding method. However, the insulating substrate at the time of forming the sheet is desirably in a semi-cured state in order to perform a lamination process with another insulating substrate or a conductor layer in order to form a multilayer, and the organic resin is made of a thermoplastic resin for the semi-curing. In the case of a resin, the mixture may be cooled under heating, and in the case of a thermosetting resin, the mixture may be heated to a temperature slightly lower than a temperature sufficient for complete solidification.

On the surface and inside of the insulating substrate 1, a wiring circuit layer 2, a ground electrode layer 3, or a through hole is formed with a low-resistance metal. As a low resistance metal,
Those containing at least one selected from copper, silver, aluminum and gold can be used favorably, but Pb-Sn alloy and N
It can be used together with i-Cr alloy.

According to the present invention, the wiring circuit layer 2 formed on the insulating substrate 1 is formed of a dense body, and the ground electrode layer 3 is formed of a porous body having more pores than the wiring circuit layer 2. It is. Specifically, the relative density of the wiring circuit layer is 90% or more, and the relative density of the ground electrode layer is 6%.
0 to 90%, preferably the relative density of the wiring circuit layer is 93% or more, and the relative density of the ground electrode layer is 70 to 85%.
It is good.

This is because, when the relative density of the wiring circuit layer is lower than 90%, when a fine wiring is formed, the resistivity increases and the conductor loss increases. If the relative density of the ground electrode layer is lower than 60%, the resistivity of the conductor is increased and the reliability of the product is impaired. If the relative density is higher than 90%, the substrate is laminated and hardened. This is because, when the wiring substrate is used, warping due to volatile components contained in the organic resin occurs, and blisters are easily generated between the conductor layer and the insulating substrate interface or between the insulating substrates.

The dense wiring circuit layer is formed, for example, by bonding a low-resistance metal foil containing at least one selected from copper, aluminum, gold and silver to an insulating layer such as a resin film on the surface of an insulating substrate. After bonding with a chemical, a circuit pattern resist is formed, and unnecessary parts of the metal are removed by etching with an acid or the like to form a wiring circuit layer, which is transferred to an insulating substrate or a metal foil previously punched is used. There is a way to paste. This method using a metal foil is more advantageous than forming a conductive paste containing a low-resistance metal powder into a circuit pattern by screen printing or a photoresist method in terms of lowering resistance and reliability when forming fine wiring. .

On the other hand, a porous ground electrode layer is formed by forming a low-resistance metal powder containing at least one selected from copper, aluminum, gold, and silver into a conductive paste on the surface of an insulating substrate by screen printing, a photoresist method, or the like. After forming an electrode pattern by drying, it can be obtained by drying and pressing under a lower pressure than when a high-density wiring circuit layer is formed, preferably 70 kg / cm ² or less. In addition, it can be made porous by increasing the particle size of the low-resistance metal powder in the conductive paste forming the ground electrode layer.

When a through hole is formed,
A hole is formed in an insulating substrate by a punching method, laser processing, or the like, and the inside is filled with a conductive paste similar to the wiring circuit layer, or a conductive layer is formed by a plating method.

Next, the plurality of insulating substrates on which the wiring circuit layer and the ground electrode layer formed as described above are formed are aligned, the insulating layers are stacked, and pressed under heating to form an organic insulating layer. By completely curing the resin, a wiring board as shown in FIG. 1 can be obtained.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In order to produce a wiring board of the present invention, 70% by volume of fused silica having an average particle size of 5 μm was used as an inorganic filler.
And 30% by volume of BT resin, butyl acetate and methyl ethyl ketone were added to the BT resin as a solvent, and a catalyst for accelerating the curing of the resin was added thereto. After mixing for 1 hour, a slurry was prepared.

This slurry was formed into a sheet having a thickness of 200 μm by a doctor blade method. This insulating sheet was cut into 50 mm square, and via holes were formed by punching.

The following two methods were used for forming the wiring circuit layer. As a first method, after bonding a copper foil to an adhesive surface of an adhesive resin film, a photoresist ink is applied on the copper foil, and a circuit having a line width of 50 μm and a circuit distance of 50 μm is formed on the resin film by a photolithography method. Was formed and transferred onto the insulating sheet under pressure. As a second method, a circuit having a line width of 50 μm and a distance between circuits of 50 μm was formed by a screen printing method using a conductive paste mainly composed of copper powder having an average particle diameter of 5 μm, and pressure was applied under the conditions shown in Table 1. .

On the other hand, for the ground electrode layer, the same conductive paste containing copper as a main component as described above was formed by screen printing, and pressure was applied under the conditions shown in Table 1. As a comparative product, a ground electrode layer was formed of copper foil in the same manner as described above. Further, a conductive ink containing copper as a main component was embedded in the via hole by a printing method.

In this manner, eight layers of the insulating substrate on which the wiring circuit layer and the ground electrode layer are formed are stacked,
The resin was cured in nitrogen for a time to obtain a multilayer wiring board. The relative densities of the wiring circuit layer and the ground electrode layer were calculated based on the weight and size of the conductor, and their resistivity was measured at room temperature by a four-terminal method. The results are shown in Table 1.

The warpage of the substrate is measured by a surface roughness meter at both ends of the substrate, and the swelling between the conductor layer, the insulating layer and the insulating layer is observed by observing the cross section of the wiring substrate with a binocular or a stereomicroscope.
The flatness of the wiring board was measured by a surface roughness meter in a region where the IC chip was mounted, and the results are shown in Table 1.

[0027]

[Table 1]

According to Table 1, the wiring circuit layer has a relative density of 9
The resistivity is 5 × 10 ⁻⁶ Ω-cm or less at 0% or more, and the resistivity is 10 ⁻⁵ at a relative density of the ground electrode layer of 60 to 90%.
It became 10 ^-6 Ω-cm, and both of the circuit layer and the electrode layer had sufficient characteristics. In addition, by forming the ground electrode layer as a porous body having a relative density of 60 to 90%, the warpage and flatness of the substrate are reduced, the conductor layer and the insulating layer, and blisters between the insulating layers are reduced. A wiring board suitable for surface mounting of a certain flip chip or the like was obtained.

[0029]

As described in detail above, according to the wiring board of the present invention, the wiring circuit layer is formed of a metal foil and the ground electrode layer is formed of a porous material containing metal powder, thereby forming the wiring circuit layer. Along with lower resistance, it can prevent warpage of the board and blisters between the conductor layer and the insulating layer and between the insulating layers, and it is suitable for surface mounting of flip chips etc. in response to future demands for finer and more precise circuits. A wiring board can be obtained.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view for explaining a structure of a wiring board according to the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 insulating substrate 2 wiring conductor layer 3 ground electrode layer 4 through hole

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-7-235741 (JP, A) JP-A-1-251694 (JP, A) JP-A-4-329207 (JP, A) JP-A-61- 264796 (JP, A) JP-A-3-112192 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H05K 1/09 H05K 1/02 H05K 3/46

Claims (1)

(57) [Claims] 1. A wiring board comprising at least an insulating substrate containing an organic resin, a wiring circuit layer made of a low-resistance metal, and a ground electrode layer, wherein the wiring circuit layer has a relative density of 9%.
The ground electrode layer is made of a dense body made of a metal foil of 0% or more, and the ground electrode layer is made of a porous body containing a low-resistance metal powder having more pores than the wiring circuit layer and a relative density of 60 to 90%. Wiring board.