JP3223587B2 - Magnetic disk drive - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic disk device such as a hard disk device used as an external storage device of a computer, and more particularly to a magnetic disk device equipped with a digital signal processor (DSP).

[0002]

2. Description of the Related Art Conventionally, in a hard disk drive, a head arm is moved (seeked) to a target track position of a magnetic disk at a high speed by an actuator having a high response, such as a voice coil motor, and the head arm is moved to the front end side of the head arm. Data is written / read to / from the magnetic disk via the attached head.

A servo pattern is written on the magnetic disk to perform a seek operation. In a hard disk drive, the servo pattern obtained by a head is reproduced in order to correctly access a target track on the magnetic disk. Servo control such as seek control and tracking control has been performed based on the signal.

Further, in a relatively large magnetic disk device such as a 5-inch hard disk device, digital servo technology using a digital signal processor (DSP) is employed in order to improve the performance of the servo control function of the head position. Have been.

[0005]

By the way, a relatively large hard disk drive is mounted on a stationary computer system, so that power consumption is rarely a problem. However, a word processor or a laptop computer is required. In a hard disk device mounted on a small computer such as the one described above, it is necessary to reduce power consumption in order to enable battery driving.

Conventionally, digital signal processors (DSPs) have not been adopted in small hard disk drives of 3.5 inches or less due to their relatively high cost and high power consumption. In recent years, DSPs have
It is widely used in various electronic devices and is being supplied at low cost.

In view of the above, the present invention has been made in view of the above-mentioned situation of the conventional hard disk drive, and has attempted to reduce the power consumption of the hard disk drive in which the servo control function of the head position has been improved by the DSP, and to reduce the power consumption of the word processor and the laptop computer. It is an object of the present invention to provide a high-performance magnetic disk device that can be mounted on a small computer.

[0008]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a read / write circuit for recording and reproducing data by scanning with a head for scanning tracks on a magnetic disk. A digital signal processor for controlling the position of the head on the magnetic disk by calculating servo information based on the reproduced signal; and a digital signal processor for externally connecting to a host computer and internally connected to the read / write circuit. A magnetic disk device comprising a disk controller having a digital controller comprising: an oscillating means capable of controlling the stop of an oscillating operation; and a clock generating means for forming various operation clocks based on the oscillating output of the oscillating means to operate the entire system.・ Built-in signal processor
A sleep mode for stopping the oscillating operation of the oscillating means is provided in the digital signal processor.

[0009]

In the magnetic disk drive according to the present invention, a head position control digital signal processor for calculating servo information based on a reproduction signal from a read / write circuit to control the position of the head on the magnetic disk is provided by a sleep mode. By stopping the oscillation operation of the oscillation unit in the mode, the output of various operation clocks from the clock generation unit is stopped, and the operation of the entire system is stopped.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A magnetic disk drive according to the present invention will be described with reference to the drawings.

A magnetic disk drive according to the present invention is configured, for example, as shown in FIG. In the embodiment shown in FIG. 1, the present invention is applied to a sector servo type hard disk drive.

The hard disk drive includes a magnetic disk 2 driven to rotate by a spindle motor 1, and a signal is written / read by a head 4 provided at the tip of a head arm 3. The head 4 is connected to a hard disk controller 6 via a read / write circuit 5.

The hard disk controller 6 formats the magnetic disk 2 and writes data from the CPU 7 to the magnetic disk 2 via the read / write circuit 5. In addition, data recorded on the magnetic disk 2 is read to correct errors. Further, the hard disk controller 6 exchanges data with an external host computer 8 connected via an interface.

The hard disk drive reads a servo pattern of the magnetic disk 2 by the head 4 and reproduces a position servo signal reproduced by the read / write circuit 5 through an A / D converter 9. A signal processor (DSP) 10 is provided;

The DSP 10 is for performing position servo control of the head 4 and performs calculations such as phase compensation (or PID) on the position servo signal digitized by the A / D converter 9. To calculate the control amount to generate the head position control data. The head position control data obtained by the DSP 10 is supplied to a voice coil motor (VCM) drive circuit 12 via a D / A converter 11. The VCM drive circuit 12 drives the voice coil motor 13 in accordance with the head position control data so that the head 4 at the tip of the head arm 3 is positioned on a target track on the magnetic disk 2. The head arm 3 is moved.

The DSP 10 generates a reset signal when the power is turned on, resets the DSP 10 itself, the read / write circuit 5, the hard disk controller 6, and the CPU 7 to initialize the system. During the operation of the hard disk drive, clocks CK1, CK2, and CK3, which are operation references, are supplied to the read / write circuit 5, the hard disk controller 6, and the CPU 7.

That is, as shown in FIG. 2, the DSP 10 includes an oscillation circuit 20, a frequency dividing circuit 30, and a reset circuit 4.
0, a sleep circuit 50, and the like.

The oscillating circuit 20 comprises a crystal oscillator 23, capacitors 24 and 25, a NAND gate 21 and a feedback resistor 22.
Oscillation is continued when the sleep signal supplied to the D gate 21 is "L", and oscillation is stopped when the sleep signal is "H". The master clock obtained as the oscillation output of the oscillation circuit 20
0 and is used as an internal clock of the DSP, and the clocks CK1, CK2, CK3
Is output as The crystal oscillator 23 and the capacitors 24 and 25 are externally connected to the DSP 10.

The reset circuit 40 includes AND gates 41 and 42, three-state buffers 43 and 44, and buffers 45 and 46.

The AND gate 41 performs an AND operation between a host reset signal supplied from an external host computer 8 and a sleep signal supplied from the sleep circuit 50.
The operation of the three-state buffer 43 is controlled by the D output. The input terminal of the three-state buffer 43 is grounded. The output terminal of the three-state buffer 43 is connected to a connection point between a resistor 61 and a capacitor 62 connected in series between a power supply and a ground. Is connected to the input terminal of The buffer 45 is a CMOS-level Schmitt input buffer, and controls the operation of the three-state buffer 43 by its output. The three-state buffer 43 has an input terminal grounded, an output terminal connected to the AND gate 42 via the buffer 46, and a power supply via a resistor 65. And the above AN
The D gate 42 outputs the A of the output of each of the buffers 45 and 46.
The sleep circuit 50 is reset by the ND output.

The sleep circuit 50 is composed of a D-type flip-flop in which data is supplied to a data terminal via a bus of the DSP, and data designating a sleep mode from the CPU 7 or the host computer 8 is supplied to the data terminal. By being supplied, a sleep signal of “L” is output during normal operation and “H” is output during sleep mode.

When the power is turned on, the DSP 10 having the oscillation circuit 20, the frequency dividing circuit 30, the reset circuit 40, the sleep circuit 50, etc. having the above-described configuration is connected to the power source and the ground as shown in FIG. A resistor 61 connected in series between
And until the potential of the connection point between the capacitor 62 gradually rises exceeding the threshold level V _TH, the output of the buffer 45 is "L", the 3-state buffer 44 is turned on "L" Outputs a system reset signal. With this “L” system reset signal, the entire system is reset. Further, in the DSP 10, the "L" system reset signal is supplied to the AND gate 42 via the buffer 46, so that the output of the AND gate 42 also becomes "L" and the sleep circuit 50 is reset. As a result, the sleep circuit 50 outputs an “L” sleep signal, and the oscillation circuit 20 starts oscillating and supplies an oscillation output to the frequency dividing circuit 30. The sleep circuit 50
While the sleep signal of “L” is supplied to the NAND gate 21, the oscillation circuit 20 continues to oscillate,
The frequency divider 30 outputs an internal clock of the DSP and various clocks CK1, CK2, and CK3. And
When the potential at the midpoint of connection between the resistor 61 and the capacitor 62 connected in series between the power supply and the ground gradually rises and exceeds the threshold level _VTH , the output of the buffer 45 becomes "H" and the three-state The buffer 44 enters a high impedance state. As a result, the system reset signal is pulled up by the resistor 65 and becomes “H”,
Complete the system reset.

The sleep circuit 50 uses the DS
When data "1" indicating the sleep mode is written by the firmware of P10, as shown in FIG. 3, a sleep signal of "H" is output, and the oscillation of the oscillation circuit 20 is stopped. Therefore, the internal clock of the DSP and the various clocks CK1, C
The outputs of K2 and CK3 are also stopped. As a result, the entire system enters a sleep state, that is, an operation stop state.

As described above, the DSP 10 stops the oscillating operation of the oscillating circuit 20 in the sleep mode, thereby stopping the output of various operation clocks from the frequency dividing circuit 30 and stopping the operation of the entire system. ,
The power consumption of the entire system can be reduced.

Further, the host computer 8 externally connected to the hard disk controller 6 can release the sleep state by setting the host reset signal, which is normally "H", to "L" for a predetermined time. it can.

That is, in the sleep state, when the host reset signal goes low, the A
Since the AND output of the ND gate 41 becomes "H", the 3-state buffer 43 is turned on, and the output thereof becomes "L". As a result, the output of the buffer 45 becomes "L", and the three-state buffer 44 is turned on to output an "L" system reset signal. This "L"
The system is reset by the system reset signal. Further, in the DSP 10, the "L" system reset signal is supplied to the AND gate 42 via the buffer 46, so that the output of the AND gate 42 also becomes "L" and the sleep circuit 50 is reset. As a result, the sleep circuit 50 outputs an “L” sleep signal, and the oscillation circuit 20 starts oscillating and supplies an oscillation output to the frequency dividing circuit 30. While the sleep signal of “L” is supplied from the sleep circuit 50 to the NAND gate 21, the oscillation circuit 20 continues to oscillate, and the frequency divider 3
0 to the internal clock of the DSP and various clocks CK1,
CK2 and CK3 are output. After the host reset signal becomes “H” after the predetermined time,
The three-state buffer 43 enters a high impedance state, and the same reset operation as when the power is turned on is performed.

A diode 63 is connected to a connection point between the resistor 61 and the capacitor 62 in order to discharge the electric charge of the capacitor 62 when the power is turned off.

[0028]

As is clear from the above description, in the magnetic disk drive according to the present invention, the digital position control for the head position is performed based on the reproduction signal from the read / write circuit.
Servo information can be calculated by a signal processor (DSP) to control the position of the head on the magnetic disk with high accuracy. In addition, the DSP stops the oscillation operation of the oscillation means in the sleep mode, stops the output of various operation clocks from the clock generation means, and stops the operation of the entire system, so that the power consumption of the entire system can be reduced. Can be planned.

Therefore, according to the present invention, it is possible to reduce the power consumption of a hard disk drive having a high performance servo control function of the head position by using a DSP, and to provide a high performance hard disk drive and a small computer such as a laptop computer. Can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a hard disk drive to which the present invention is applied.

FIG. 2 is a block diagram showing a specific configuration of an oscillation circuit, a reset circuit, and the like provided in a DSP in the hard disk device.

FIG. 3 is a timing chart showing an operation of the hard disk device.

[Explanation of symbols]

 1 ... Spindle motor 2 ... Magnetic disk 3 ... Head arm 4 ... Magnetic head 5 ... Read / write circuit 6 ... Hard disk controller 7 CPU CPU 8 Host computer 9 A / D converter 10 Digital signal processor 11 D / A converter 12 ... Voice coil motor drive circuit 13 ... Voice coil motor

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-5-94664 (JP, A) JP-A-3-207064 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G11B 5/596 G11B 20/18 G11B 21/10

Claims (1)

(57) [Claims] 1. A read / write circuit for recording and reproducing data by scanning a track of a magnetic disk with a head for scanning tracks, and calculating servo information based on a reproduction signal from the read / write circuit to calculate servo information on the magnetic disk. Digital head for head position control for controlling the head position
In a magnetic disk drive comprising a signal processor and a disk controller externally connected to a host computer and internally connected to the read / write circuit, an oscillating means capable of controlling the stop of an oscillating operation and an oscillating output of the oscillating means are provided. Clock generation means for forming various operation clocks and operating the entire system are incorporated in the digital signal processor, and a sleep mode for stopping the oscillation operation of the oscillation means is provided in the digital signal processor. Characteristic magnetic disk drive.