JP3221646B2 - Heterojunction bipolar transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heterojunction bipolar transistor.

[0002]

2. Description of the Related Art Heterojunction bipolar transistors (hereinafter abbreviated as HBTs) are suitable as high-frequency transistors because they can operate at high speed, and have recently been attracting attention as high-frequency amplifiers used for mobile communication.

One of the reasons is that a silicon semiconductor device compared with a compound semiconductor device such as an HBT does not have sufficient performance to amplify a high frequency signal of several hundred megahertz or more. This is because commercialization is expected to greatly contribute to the development of mobile communications. In addition, since silicon semiconductor elements have low amplification efficiency at high frequencies and consume large currents, it is essential to commercialize HBTs with high amplification efficiency for the development of portable mobile communication devices.

FIG. 5 shows the structure of a typical conventional HBT. The HBT shown in FIG. 5 is a semi-insulating GaAs substrate 101.
Above, the sub-collector layer (GaAs, 500nm, N _D =
5 × 10 ¹⁸ cm ⁻³ ) 102, collector layer (GaAs, 5
_{00nm, N D = 5 × 10} 16 cm - 3) 103, the base layer _{(GaAs, 80nm, N A =} 4 × 10 19 cm -3) 10
4. Emitter layer (Al _0.3 Ga _0.7 As, 100 nm, N
_D = 5 × 10 ¹⁷ cm ⁻³ ) 105, cap layer (GaAs)
s, 200 nm, N _D = 5 × 10 ¹⁸ cm ⁻³ ) 106 is provided with a semiconductor multilayer structure which is epitaxially grown in order. As shown in FIG. 5, the emitter layer 105 is a thin emitter layer (40 nm) 10 covering the entire upper surface of the base layer 104.
5a and the remaining emitter layer (60 nm) 105b.

[0005] Collector electrode (AuGe / Ni / Au) 1
07 and an emitter electrode (AuGe / Ni / Au) 109
Are formed on the sub-collection layer 101 and the cap layer 106, respectively, and are in ohmic contact with the respective layers. The base electrode (AuZn / Au) 108 is provided on the emitter thin layer 105a.
5a, and is in ohmic contact with the base layer 104.

[0006] As shown in FIG.
Reference numeral 5a covers the entire upper surface of the base layer 104 and functions as a protective film for the base layer 104. For this reason, it has been reported that with such a structure, surface recombination occurring on the surface of the base layer 104 is suppressed, and the current gain of the HBT can be increased.

[0007]

However, according to an experiment conducted by the inventor of the present invention, it has been found that the above-mentioned prior art HBT has good initial characteristics of current gain but deteriorates transistor characteristics in a reliability test. . In particular, it was found that the reduction of the current gain and the deterioration of the noise characteristics were remarkable.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a highly reliable HBT in which the aging of characteristics is small.

[0009]

A heterojunction bipolar transistor according to the present invention has a semiconductor structure including a collector layer, a base layer formed on the semiconductor structure, and a conductivity type opposite to the base layer. A first semiconductor layer formed over the entire upper surface of the base layer, a mesa structure including an emitter layer provided on a part of the upper surface of the first semiconductor layer , and the first semiconductor layer The mesa structure provided on the upper surface of
Electrode means formed entirely on the first semiconductor layer, the electrode means being at least partially penetrating the first semiconductor layer and in ohmic contact with the base layer; As a result, the above object is achieved.

The electrode means completely surrounds the mesa structure.
And an ohmic electrode formed on the first semiconductor layer and penetrating the first semiconductor layer and in ohmic contact with the base layer.

The electrode means is a Schottky electrode forming a Schottky barrier with the first semiconductor layer, and is electrically connected to the Schottky electrode.
And an ohmic electrode that is in ohmic contact with said base layer through said semiconductor layer.

The electrode means is formed on the first semiconductor layer completely surrounding the mesa structure, and forms a Schottky barrier with the first semiconductor layer; An ohmic electrode electrically connected to the key electrode and penetrating the first semiconductor layer and in ohmic contact with the base layer may be included.

The first semiconductor layer is made of the same material as the emitter layer.
By setting the composition and the impurity concentration, the first semiconductor layer may substantially function as an emitter layer.

[0014]

The present invention is based on the finding that in the conventional HBT shown in FIG. 5, the current amplification factor is degraded by the following mechanism.

[0015] As shown in FIG.
3. The base layer 104 and the emitter thin layer 105a
A mesa structure having 10 to 113 is formed, and the interface between the base layer 104 and the thin emitter layer 105a is exposed on these side surfaces 110 to 113. Carriers moving on the surface of the emitter thin layer 105a are exposed interfaces,
For example, it is considered that recombination occurs at the interface 114. Normally, the entire device is covered with a protective film such as silicon nitride. However, slight contamination or the like of the side surface 110 generated during the process becomes a surface defect, and the defect gradually increases due to heat generation due to operation of the device. Conceivable. Therefore, at the interface between the emitter thin layer 105a exposed on the side surfaces 110 to 113 and the base layer 104, the number of carriers that recombine gradually increases, and as a result, the current gain is considered to decrease.

In the HBT of the present invention, carriers generated on the surface of the first semiconductor layer move in the first semiconductor layer. When the carriers reach the base electrode, carriers of the opposite conductivity type supplied from the base electrode are provided. And rejoin. Therefore, no carrier crosses the base electrode or the first semiconductor layer thereunder and reaches the interface exposed on the side surface between the base layer and the first semiconductor layer, and recombination of carriers at the exposed interface substantially occurs. Disappears. As a result, H
Due to heat generated by the operation of the BT, surface defects gradually increase at the interface between the first semiconductor layer and the base layer,
Even if the interface characteristics at the interface are deteriorated, there is substantially no carrier that moves on the surface of the first semiconductor layer to reach the interface, and recombination at the interface does not occur. For this reason, the recombination current due to the deterioration of the interface characteristics at the interface does not increase, and a decrease in current gain is prevented.

[0017]

The present invention will be described below with reference to examples.

As shown in FIG. 1, the HBT of the present invention comprises a semiconductor structure 21 including a collector layer 13 formed on a semi-insulating GaAs substrate 11, a base layer 14 formed on the semiconductor structure 21, The semiconductor device includes a first semiconductor layer 15 formed over the entire upper surface of the layer 14 and a mesa structure 22 provided on a part of the upper surface of the first semiconductor layer 15 and including the emitter layer 16. .

The semiconductor structure 21 further includes a sub-collector layer 12.
And a collector layer 13 on the sub-collector layer 12.
Is provided. The sub-collector layer 12 and the collector layer 13 each have a thickness of 500 nm and an impurity concentration N _D = 5 ×
It is composed of n-type GaAs of 10 ¹⁸ cm ^-3 and n-type GaAs with a thickness of 500 nm and impurity concentration N _D = 5 × 10 ¹⁶ cm ^-3 . The semiconductor structure 21 may include another semiconductor layer in addition to the sub-collector layer 12, and when the collector electrode 18 described below is formed directly on the collector layer 13, the sub-collector layer 12 may be omitted. Good.

The base layer 14 and the first semiconductor layer 15 are
Each having a thickness of 80 nm and an impurity concentration N _A = 4 × 10 ¹⁹ c
m ⁻³ p-type GaAs, thickness 40 nm, impurity concentration N _D
= 5 × 10 ¹⁷ cm ⁻³ n-type Al _0.3 Ga _0.7 As. The first semiconductor layer 15 needs to have conductivity opposite to that of the base layer 14 and may have the same composition and impurity concentration as the emitter layer 16. In this case,
The first semiconductor layer 15 can be substantially regarded as an emitter layer.

The mesa structure 22 further includes a contact layer 17 provided on the emitter layer 16.
6 and the contact layer 17 are n-type Al _0.3 Ga _{0.7 having} a thickness of 60 nm and an impurity concentration of N _D = 5 × 10 ¹⁷ cm ⁻³ , respectively.
As and thickness of 200 nm, impurity concentration N _D = 5 × 10 ¹⁸
It is composed of cm ⁻³ n-type GaAs. The mesa structure 22 may further include another semiconductor layer in addition to the contact layer 17, and when the emitter electrode 20 described below is formed directly on the emitter layer 16, the contact layer 17 may be omitted. Good. It is necessary that the mesa structure 22 has a bottom surface smaller than the top surface of the first semiconductor layer 15 and that the side surfaces of the mesa structure 22 are not aligned with the side surfaces of the first semiconductor layer 15.

Subcollector layer 12 and contact layer 17
On top is a collector electrode 1 of AuGe / Ni / Au
8 and the emitter electrode 20 are formed in ohmic contact with the respective layers.

The HBT according to the present invention has a structure in which the first semiconductor layer 15 is formed so as to completely surround the region where the mesa structure 22 is provided.
Base electrode 19 made of AuZn / Au formed thereon
have. The base electrode 19 may have any shape, but it is necessary to completely surround the region of the first semiconductor layer where the mesa structure 22 is provided, and at least one of the base electrodes 19 is required. The portion needs to penetrate the first semiconductor layer 15 and make ohmic contact with the base layer 14.

The reason why the aging of the characteristics of the HBT having such a structure is suppressed will be described with reference to FIG.

FIGS. 2 (a) and 2 (b) show the xz cross section and y of the structure above the base layer 14 of the HBT of the present invention, respectively.
The z section is shown. As shown in FIGS. 2A and 2B, carriers generated on the surface of the first semiconductor layer 15 move in the first semiconductor layer 15 as shown by an arrow 23, while the base electrode 19 When they reach the point, they recombine with carriers of the opposite conductivity type supplied from the base electrode 19. According to experiments by the inventor, it is found that such recombination near the base electrode 19 does not increase even if the HBT is operated continuously.

Therefore, as indicated by the dashed arrow 24,
No carriers cross the first semiconductor layer 15 of the base electrode 19 and reach the interface 25 with the base layer 14, and the recombination of carriers at the interface 25 is substantially eliminated.

As a result, the interface 2 between the first semiconductor layer 15 and the base layer 14 is generated by heat generated by the operation of the HBT.
5, even if the surface defects gradually increase and the interface characteristics at the interface 25 are deteriorated, there is substantially no carrier moving on the surface of the first semiconductor layer 15 to reach the interface 25, and Recombination does not occur. Therefore, the interface 2
5, the recombination current does not increase due to the deterioration of the interface characteristics, and a decrease in current gain is prevented.

As apparent from FIGS. 2A and 2B, according to the present invention, the base electrode is formed so as to completely surround the upper surface region of the first semiconductor layer 15 provided with the mesa structure 22 including the emitter layer 16. One of the features is that 19 is provided. If a part of the base electrode 19 is interrupted, the carrier moving on the surface reaches the interface 25 at that part, so that the recombination at that part gradually increases due to the aging of the HBT, and the current gain deteriorates. Therefore, it is preferable that the base electrode 19 be provided on the first semiconductor layer 15 so as to completely surround the mesa structure 22.

As is clear from the above description, the mesa structure 2
If the base electrode 19 is provided as a guard ring so as to completely surround the upper surface region of the first semiconductor layer 15 provided with the second 2, the effect of the present invention can be obtained, and the width W of the base electrode 19 is specified. It is not limited to the value of. Therefore, it is sufficient if the width of the base electrode 19 is equal to or larger than the minimum processing dimension of the process for manufacturing the HBT, and the entire base electrode 19 does not need to have the same width W. In order to obtain an ohmic contact with sufficiently low resistance between the base layer 14 and the base electrode 19, the width W
Can be designed freely. Since the base electrode having such a shape has a large junction area between the base and the collector, a problem that the capacitance between the collector and the base increases may occur. In this case, the width W of the base electrode 19 may be selected to an appropriate value so that the capacitance between the collector and the base does not matter.

The HBT of the present invention is manufactured by the method outlined below.

First, on a semi-insulating GaAs substrate 11, a sub-collector layer 12, a collector layer 13, a base layer 14, a first
Semiconductor layer 15, emitter layer 16, and contact layer 1
7 are sequentially grown epitaxially by MBE or MOCVD. Since the first semiconductor layer 15 and the emitter layer 16 have the same composition and impurity concentration, these layers may be grown continuously.

Thereafter, by appropriately combining photolithography and etching, semi-insulating GaAs is formed.
etching the semiconductor layer on the s substrate 11 into a desired shape;
A collector electrode 18, a base electrode 19, and an emitter electrode 20 are formed. The etching step and these electrode forming steps may be appropriately combined. For example, after forming the emitter electrode 20, the contact layer 17 and the emitter layer 16 are etched so as to define the mesa structure 22, and after forming the base electrode 19, the first semiconductor layer 15 and the collector layer 13 are etched. , A collector electrode 18 may be formed.

As a method for etching the semiconductor layer, a dry etching method having high anisotropy is preferably used, but a wet etching method may be used. According to the wet etching method, since damage to the semiconductor layer is small, most of the etching is performed by dry etching, and then, a part of the semiconductor layer damaged by dry etching is removed by wet etching. Good. As a mask for etching, a photoresist, a silicon nitride film, or the like can be used. However, the emitter electrode 20 or the base electrode 19 may be used as a mask if necessary.

Finally, heat treatment is performed to form ohmic contacts between the collector electrode 18, the base electrode 19, and the emitter electrode 20, and the subcollector layer 12, the base layer 13, and the contact layer 17, respectively. The base electrode 19 serving as a p-type ohmic electrode and the collector electrode 18 and the emitter electrode 20 serving as an n-type ohmic electrode may be heat-treated under different conditions. Further, each electrode may be heat-treated immediately after forming each electrode.

A bias stress test, which is one of the reliability tests, was performed on the HBT of the present invention thus manufactured and the conventional HBT shown in FIG. These H
The BT has the same semiconductor structure except that the structure of the base electrode is different.
It was stored at a temperature of 175 ° C. for 120 hours while flowing a current at a density of 5 kA / cm ² , and the ratio of HBTs that failed was determined. The current gain measured at a collector current density of 10 kA / cm ² was 80% of the value before the start of the test.
When it fell below, it was judged as "failure".

As a result of the test, the failure rate of the HBT of the present invention was about 30%, while the failure rate of the conventional HBT was about 6%.
0%. As is clear from this result, the conventional H
It can be seen that the HBT of the present invention has a smaller decrease in current gain and improved reliability compared to the BT.

In addition to the above embodiments, the HBT of the present invention can be variously modified. The HBT shown in FIG. 3 is replaced with ohmic electrodes 30a and 30b and Schottky electrodes 31a and 31b instead of the HBT base electrode 19 shown in FIG.
Are provided on the first semiconductor layer 15.
In FIG. 3, the same components as those of the HBT shown in FIG. 1 are denoted by the same reference numerals.

As shown in FIG. 3, the Schottky electrodes 31a and 31b are formed on the first semiconductor layer 15 so as to overlap a part of the ohmic electrodes 30a and 30b. 31
and the ohmic electrodes 30a and 30b are electrically connected. The ohmic electrodes 30a and 30b are in ohmic contact with the base layer 14 through the first semiconductor layer 15, and the Schottky electrodes 31a and 31b are in Schottky contact with the first semiconductor layer 15. The ohmic electrodes 30a and 30b and the Schottky electrodes 31a and 31b as a whole completely surround the region where the mesa structure 22 is provided. As a result, as described with reference to FIGS. 2A and 2B, the first semiconductor layer 15
Carriers moving on the surface of the first and second ohmic electrodes 31a and 31b and near the ohmic electrodes 30a and 30b can recombine with carriers of the opposite conductivity type supplied from these electrodes. Accordingly, recombination at the interface 25 is eliminated, and deterioration of the current gain can be prevented as already described in detail.

The Schottky electrodes 31a and 31b are made of Ti
/ Pt / Au or the like, and can be constituted by a multilayer metal layer known as a Schottky electrode.

Further, the HBT shown in FIG. 4 has an electrode composed of ohmic electrodes 40a and 40b and a Schottky electrode 41 on the first semiconductor layer 15 instead of the base electrode 19 of the HBT shown in FIG. ing. In FIG. 4, the same components as those of the HBT shown in FIG. 1 are denoted by the same reference numerals.

As shown in FIG. 4, the Schottky electrode 41 is formed on the first semiconductor layer 15 so as to completely surround the region where the mesa structure 22 is provided.

On the first semiconductor layer 15 outside the Schottky electrode 41, ohmic electrodes 40a and 40b are formed.
By overlapping a part of Oa and 40b, they are electrically connected to each other. Further, Schottky electrode 41 is in Schottky contact with first semiconductor layer 15, and ohmic electrodes 40 a and 40 b are in ohmic contact with base layer 14 through first semiconductor layer 15.

The carriers moving on the surface of the first semiconductor layer 15 recombine with the opposite conductive type carriers supplied from the ohmic electrodes 40 a and 40 b via the Schottky electrode 41 in the vicinity of the Schottky electrode 41. can do. Accordingly, recombination at the interface 25 is eliminated, and deterioration of the current gain can be prevented as already described in detail.

Although the pnp type HBT has been described in the above embodiment, the effect of the present invention can be similarly obtained in an npn type HBT having an emitter-up type structure. Further, the composition of each semiconductor layer is not limited to the above combination, but may be InG.
The present invention is also applicable to aAs-based HBT and Si / SiGe-based HBT. Those skilled in the art will also readily understand that when other semiconductor layers are used, ohmic electrode materials suitable for them can be used.

[0045]

According to the present invention, an H transistor having a small reduction in the current gain and a small deterioration in the noise characteristics and having excellent reliability characteristics is provided.
BT is obtained.

[Brief description of the drawings]

FIG. 1 is a perspective view showing one embodiment of an HBT of the present invention.

FIGS. 2 (a) and (b) each show H shown in FIG.
3 shows a cross section of a main part of the BT.

FIG. 3 is a perspective view showing another embodiment of the HBT of the present invention.

FIG. 4 is a perspective view showing still another embodiment of the HBT of the present invention.

FIG. 5 is a perspective view showing a conventional HBT.

[Explanation of symbols]

 Reference Signs List 11 semi-insulating GaAs substrate 12 sub-collector layer 13 collector layer 14 base layer 15 first semiconductor layer 16 emitter layer 17 contact layer 18 collector electrode 19 base electrode 20 emitter electrode 21 semiconductor structure 22 mesa structure

Continued on the front page (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 21/331 H01L 29/41 H01L 29/73 H01L 29/205 H01L 29/737

Claims (5)

(57) [Claims] A semiconductor structure including a collector layer; a base layer formed on the semiconductor structure; and a semiconductor layer having a conductivity type opposite to the base layer and formed over the entire top surface of the base layer. A first semiconductor layer, a mesa structure including an emitter layer provided on a part of an upper surface of the first semiconductor layer, and a mesa structure completely provided on an upper surface of the first semiconductor layer. Electrode means formed on said first semiconductor layer at least partially through said first semiconductor layer and in ohmic contact with said base layer. Bipolar transistor. 2. The electrode means comprises an ohmic electrode formed on the first semiconductor layer completely surrounding the mesa structure and penetrating the first semiconductor layer and in ohmic contact with the base layer. The heterojunction bipolar transistor according to claim 1. 3. The Schottky electrode forming a Schottky barrier with the first semiconductor layer, the electrode means being electrically connected to the Schottky electrode,
2. The heterojunction bipolar transistor according to claim 1, further comprising: an ohmic electrode penetrating through said semiconductor layer and in ohmic contact with said base layer. 4. A Schottky electrode formed on the first semiconductor layer completely surrounding the mesa structure and forming a Schottky barrier with the first semiconductor layer; 2. The heterojunction bipolar transistor according to claim 1, further comprising: an ohmic electrode electrically connected to the Schottky electrode and penetrating the first semiconductor layer and in ohmic contact with the base layer. 5. The semiconductor device according to claim 1, wherein the first semiconductor layer is the same as an emitter layer.
2. The heterojunction bipolar transistor according to claim 1 , wherein the first semiconductor layer substantially functions as an emitter layer by setting the composition and the impurity concentration as follows . 3.