JP3219191B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a bipolar transistor having improved high-frequency characteristics.

[0002]

A semiconductor device, for example, to improve the high frequency characteristics of the bipolar transistor is to reduce the base layer thickness, it improves the cut-off frequency f _T, base resistance and the collector - to reduce the parasitic capacitance between the base Is essential. As a technique for improving high-frequency characteristics, for example, a bipolar transistor in which a base is formed by a selective growth method is proposed in Japanese Patent Application Laid-Open No. 4-330730. This technology grows silicon in the same crystalline state only on single crystal silicon and polycrystalline silicon,
Form a thin base to reduce parasitic capacitance and cut-off frequency f _T
To improve the high frequency characteristics.

In order to reduce the parasitic capacitance between the base-leading polycrystalline silicon film and the n ⁻ -type epitaxial layer, a thick oxide film is formed between the base-leading polycrystalline silicon film and the n ⁻ -type epitaxial layer. Since a silicon film cannot be connected, a method of thinning the oxide film around the emitter opening by etching it into a wedge type is called IEEE.
TRANSACTIONS ON ELECTRON DEVICES, VOL.45, pp.1287-1
294,1998.

[0004] FIG. 10 shows a bi-port proposed in the above document.
FIG. This transistor is
It is manufactured as follows. p^- Type silicon substrate 101
To n ⁺ Mold buried layer 102, n^- Type epitaxial layer 1
After the formation of 03, a trench for element isolation is formed.
A silicon oxide film 104 and a silicon nitride film 105 are formed on the entire surface.
After the formation, the trench is filled with the BPSG film 106.
Inset. Subsequently, a silicon oxide film 107 is deposited,
Processed into wedge shape by wet etching
You.

[0005] p for pulling out the base⁺ Type polycrystalline silicon
N for film 108 and collector extraction ⁺ Type polycrystalline silicon
A film 109 is formed, and a silicon oxide film 110 is formed on the entire surface.
After that, n is added to the base region forming region.^- Type epitaxial layer
An opening for exposing the surface of 103 is formed. Base area
SiGe / Si selective epitaxial growth layer 111
After forming an insulating film side wall 112, an emitter line is formed.
N for extraction⁺ A type polycrystalline silicon film 113 is formed.
A silicon oxide film 114 is deposited on the entire surface for electrode extraction
Opening to expose the surface of the polycrystalline silicon film
After that, base electrode 115, emitter electrode 116, collector
An electrode 117 is formed.

In the bipolar transistor having the base region formed by the epitaxial growth method, the thickness of the base layer is reduced even when the base impurity concentration is high, as compared with the case where the base region is formed by a method such as ion implantation. and it is possible to precisely control the impurity profile, thereby improving the cut-off frequency f _T. Further, the SiGe / Si selective epitaxial growth layer 111 serving as a base region and the p ⁺ -type polycrystalline silicon film 108 can be connected by a thin SiGe / Si polycrystalline silicon, and the base parasitic resistance can be reduced.

[0007]

However, FIG.
In the conventional bipolar transistor shown in FIG. 1, the p ⁺ -type polycrystalline silicon film 108 for leading out the base is made of a thin silicon nitride film having a high relative dielectric constant and a thin silicon oxide film 104.
Therefore, there is a problem in that the parasitic capacitance between the collector and the base increases because of being opposed to the collector region through the gate electrode. In order to reduce this parasitic capacitance, the silicon oxide film 1
When the thickness of the silicon nitride film 104 and the silicon nitride film 105 is increased, the thickness of the base layer is increased and the cut-off frequency f _T is reduced, and the connectivity between the base epitaxial layer and the base drawing polycrystalline silicon film is deteriorated. And the likelihood of an open failure increases.

The present invention has been made in view of such a situation, and an object of the present invention is to firstly make it possible to reduce the thickness of the base epitaxial layer even if the base epitaxial layer and the base lead-out layer are thin. The second purpose is to prevent the connectivity with the crystalline silicon film from deteriorating.
In addition, the insulating film between the n ⁻ -type epitaxial layer and the base drawing polycrystalline silicon film can be made sufficiently thick without deteriorating the connectivity between the base epitaxial layer and the base drawing polycrystalline silicon film. Is to do so.

[0009]

According to the present invention, in order to achieve the above object, (1) a first silicon oxide film and a first polysilicon film are formed on a collector region provided on a semiconductor substrate. Forming a crystalline silicon film, a second silicon oxide film, and a first silicon nitride film in this order; and (2) at least the first silicon nitride film and the second silicon nitride film other than the region where the base region is formed. (2) selectively etching and removing the silicon oxide film and the first polycrystalline silicon film; and (3) at least the first polycrystalline silicon film formed in the previous process.
Forming a first nitride film sidewall on the side surfaces of the silicon nitride film, the second silicon oxide film and the first polycrystalline silicon film, and masking the first nitride film sidewall and the first silicon nitride film (4) a step of etching and removing at least the first silicon nitride film; and (5) forming a base-leading polycrystalline silicon film and forming the base. Forming a second silicon nitride film over the entire surface including on the lead-out polycrystalline silicon film; and (6) forming an emitter contact opening in the second silicon nitride film and the base lead-out polycrystalline silicon film; Forming a second nitride film sidewall on the inner wall of the emitter contact opening; and (7) forming the second silicon oxide film, the first polycrystalline silicon film, and the first silicon oxide film. Patterning into a pattern shape of the side wall of the second nitride film, and further etching a side surface of the second silicon oxide film and the side surface of the first silicon oxide film to a predetermined depth; (8) by selective epitaxial growth, Forming a base epitaxial layer on the collector region from which the first silicon oxide film has been removed, and a second polysilicon between the first polysilicon film and the base leading-out polysilicon film; Forming a film; and (9) forming an insulating film sidewall on the side surfaces of the second nitride film side wall and the first and second polycrystalline silicon films, and forming an insulating film side wall in a region surrounded by the insulating film side wall. Forming an emitter extraction polycrystalline silicon film; and (10) heat-treating impurities from the emitter extraction polycrystalline silicon film into the base epitaxial layer by heat treatment. The method of manufacturing a semiconductor device characterized by comprising the steps of forming a dispersion to the emitter region, a, is provided.

In order to achieve the above object, according to the present invention, (1) a first silicon oxide film and a first polycrystalline film are formed on a semiconductor substrate on which a collector region and an element isolation insulating film are formed. Forming a silicon film and a second silicon oxide film in this order; and (2) the second silicon oxide film, the first polycrystalline silicon film, and the second polysilicon film other than the region where the base region is formed. (3) forming a base-leading polycrystalline silicon film and forming a second silicon nitride film on the entire surface including the base-leading polycrystalline silicon film; And (4) forming an emitter contact opening in the second silicon nitride film and the base drawing polycrystalline silicon film, and forming a nitride film sidewall on an inner wall of the emitter contact opening. (5) patterning the second silicon oxide film, the first polycrystalline silicon film, and the first silicon oxide film into a pattern shape of the side wall of the nitride film, and further forming the second silicon oxide film And a step of etching the side surface of the first silicon oxide film to a predetermined depth. (6) forming a base epitaxial layer on the collector region from which the first silicon oxide film has been removed by selective epitaxial growth; Forming a second polycrystalline silicon film between the first polycrystalline silicon film and the base-leading polycrystalline silicon film; and (7) the nitride film sidewall and the first and second polycrystalline silicon films. Forming an insulating film side wall on a side surface of the polycrystalline silicon film, and forming an emitter leading polycrystalline silicon film in a region surrounded by the insulating film side wall; (8) heat treatment Forming an emitter region by diffusing impurities into the base epitaxial layer from the emitter leading-out polycrystalline silicon film.

[0011]

A feature of the present invention is that a polycrystalline silicon film is provided between a collector region (n ^- type epitaxial layer) where a base epitaxial layer is grown and a base-leading polycrystalline silicon film type base epitaxial layer. "A first polycrystalline silicon film") is prepared in advance. Due to the presence of this polycrystalline silicon film, even if the film thickness of the element isolation insulating film under the polycrystalline silicon film for extracting the base is increased or the thickness of the base epitaxial layer is reduced, It is possible to connect the base drawing polycrystalline silicon film with low resistance and high reliability. Therefore, according to the present invention, it is possible to reduce the base layer thickness, the base parasitic resistance and the base - can be reduced collector parasitic capacitance, excellent transistor high-frequency characteristics cutoff frequency f _T is reliable It will be possible to provide it with high quality.

[0012]

Next, an embodiment of the present invention will be described with reference to the drawings. [First Embodiment] FIG. 1 is a cross-sectional view of a semiconductor device for explaining a first embodiment of the present invention. As shown in FIG. 1, an n ⁺ -type collector buried layer 2 in which arsenic is diffused is formed on a p-type silicon substrate 1 having a (100) plane orientation and a resistivity of 10 to 20 Ωcm. . An n ⁻ -type epitaxial layer 3 having a phosphorus concentration of about 5 × 10 ¹⁶ cm ⁻³ and a thickness of about 1 μm is formed on the n ⁺ -type collector buried layer 2.

Further, on the n ^- epitaxial layer 3,
A silicon oxide film 9 for element isolation having a thickness of about 2000 ° is formed, and a collector contact opening 10 is formed in the silicon oxide film 9. Then, the n ⁻ -type epitaxial layer 3 immediately below the collector contact opening 10
Has a collector lead-out region 11 in which phosphorus is diffused at a high concentration. The silicon oxide film 9 has a thickness of about 2000 ° and a boron concentration of 2 × 10 ²⁰ c.
A polycrystalline silicon film 12 for drawing out a base of about m ⁻³ is formed. Further, the collector contact opening 10 has a thickness of about 2000 ° and a phosphorus concentration of 2 × 10 ²⁰ cm.
A collector electrode polycrystalline silicon film 13 of about ^-3 is formed. Then, a silicon nitride film 14 is formed on silicon oxide film 9 and polycrystalline silicon films 12 and 13.

The emitter contact opening 1 is formed in the silicon nitride film 14 and the base drawing polycrystalline silicon film 12.
The silicon nitride film side walls 16 and 19 are formed on the side surfaces of the opening 15. A p-type base epitaxial layer 17 serving as an intrinsic base region is formed on n ⁻ -type epitaxial layer 3 below emitter contact opening 15. The p-type base epitaxial layer 17 is connected to the base drawing polycrystalline silicon film 12 via the polycrystalline silicon film 5 and the p-type polycrystalline silicon film 18. A silicon oxide film 4 is formed between n ⁻ -type epitaxial layer 3 outside p-type base epitaxial layer 17 and polycrystalline silicon film 5, and a polycrystalline silicon film outside p-type polycrystalline silicon film 18 is formed. A silicon oxide film 6 is formed between the crystalline silicon film 5 and the base drawing polycrystalline silicon film 12.

In the emitter contact opening 15, a polycrystalline silicon film 20 for extracting the emitter is formed which is insulated from the polycrystalline silicon film 12 for extracting the base by the silicon nitride film side walls 16 and 19. The lower surface of polycrystalline silicon film 20 is in contact with emitter region 21 formed on the surface of p-type base epitaxial layer 17. Further, an insulating film 22 having a flattened surface is formed on the silicon nitride film 14, and a through hole 24 reaching the emitter leading-out polycrystalline silicon film 20 is formed in the insulating film 22. The insulating film 22 and the silicon nitride film 14 are respectively provided with a base-leading polycrystalline silicon film 12 and a collector electrode polycrystalline silicon film 1.
3, through holes 23 and 25 are opened. Then, a base electrode 26, an emitter electrode 27, and a collector electrode 28 that are in contact with the respective polycrystalline silicon films via these through holes are formed.

Next, a method of manufacturing the semiconductor device according to the first embodiment of the present invention will be described. FIGS. 2A to 4H are cross-sectional views in the order of steps for explaining the manufacturing method according to the first embodiment of the present invention. First, FIG.
As shown in FIG. 5, arsenic is implanted on the p-type silicon substrate 1 under the conditions of energy: 70 keV and dose: 5 × 10 ¹⁵ cm ⁻² . Next, heat treatment is performed at 1100 ° C. for 4 hours in a nitrogen atmosphere to diffuse arsenic to form an n ⁺ -type collector buried layer 2. Subsequently, silicon having a phosphorus concentration of about 5 × 10 ¹⁵ cm ^{−3 is} grown to about 1.0 μm by a normal epitaxial growth method, and the n ⁻ -type epitaxial layer 3 is formed.
To form Further, on the surface of the n ⁻ -type epitaxial layer 3, a silicon oxide film 4 having a thickness of about
A polycrystalline silicon film 5 having a thickness of about 00 °, a silicon oxide film 6 having a thickness of about 400 ° and a silicon nitride film 7 having a thickness of about 300 ° are formed.

Then, as shown in FIG. 2B, a photoresist pattern is formed on the surface of the silicon nitride film 7 by photolithography, and the silicon nitride film 7, the silicon oxide film 6, The polycrystalline silicon film 5 is selectively removed. Subsequently, after forming a silicon nitride film on the entire surface, anisotropic etching is performed to form a silicon nitride film side wall 8.

Next, as shown in FIG. 2C, using the silicon nitride film 7 and the silicon nitride film side walls 8 as a mask,
The silicon oxide film 9 for element isolation is formed by thermal oxidation to 20
It is formed to a thickness of about 00 °. Thereafter, the silicon nitride film 7 and the silicon nitride film side walls 8 are removed by wet etching using phosphoric acid. By using this phosphoric acid, dry etching is performed instead of wet etching to completely remove the silicon nitride film 7 and to remove the silicon nitride film sidewall 8.
May be left partially.

Subsequently, as shown in FIG. 3D, a collector contact opening 10 for extracting a collector electrode is formed in the silicon oxide film 9. Then, phosphorus is supplied through the collector contact opening 10 with an energy of 70 ke.
V, dose: implanted under the condition of 5 × 10 ¹⁵ cm ⁻² to form the collector extraction region 11. Furthermore, by performing a heat treatment at 900 ° C. for about 30 minutes in a nitrogen atmosphere,
Recovery of damage due to ion implantation and activation of phosphorus are performed. Then, a polycrystalline silicon film is formed on the entire surface to a thickness of about 2000 °.

Next, a resist pattern is formed by a photolithography method, and phosphorus is applied to the polycrystalline silicon film on the collector contact opening 10 at an energy of 70 keV,
Dose: Inject under conditions of 5 × 10 ¹⁵ cm ⁻² . Further, a resist pattern is formed by a photolithography method, and boron is implanted only in the region where the base-leading polycrystalline silicon film is to be formed under the conditions of an energy of 20 keV and a dose of 5 × 10 ¹⁵ cm ^−2. Is removed. Further, the polycrystalline silicon film is patterned by forming a photoresist pattern and anisotropic etching to obtain a base-leading polycrystalline silicon film 1.
2 and a polycrystalline silicon film 13 for a collector electrode are formed. Further, a silicon nitride film 14 is formed on the entire surface by LPCVD.

Subsequently, as shown in FIG. 3E, after forming a photoresist pattern by photolithography, the silicon nitride film 1 is anisotropically etched.
4. The emitter contact opening 15 is formed by selectively removing the base drawing polycrystalline silicon film 12. Thereafter, a silicon nitride film is formed on the entire surface, and anisotropic etching is performed using the polycrystalline silicon film 5 as an etching stopper, thereby forming a silicon nitride film side wall 16 on the side surface of the emitter contact opening 15 and simultaneously forming the inside of the emitter contact opening 15. The silicon oxide film 6 is removed.

Next, the polysilicon film 5 in the emitter contact opening 15 is removed by anisotropic etching. At this time, etching is performed under the condition that the selectivity between the oxide film and the polycrystalline silicon film is large, so that the surface of the n ⁻ -type epitaxial layer 3 is not damaged by the etching. Subsequently, by performing isotropic etching using hydrofluoric acid, the silicon oxide films 4 and 6 are removed in the lateral direction, and the surface of the n ⁻ -type epitaxial layer 3 in the emitter contact opening 15 and the polycrystalline silicon film 5 are removed. Then, the bottom surface of the base drawing polycrystalline silicon film 12 is exposed.

Next, as shown in FIG.
CVD (ultra high vacuum chemical vapor depositio
A p-type base epitaxial layer 17 having a thickness of about 700 ° and a boron concentration of about 1 × 10 ¹⁹ cm ⁻³ is formed on the n ⁻ -type epitaxial layer 3 from which the silicon oxide film has been removed by selective epitaxial growth using n). I do. At this time, a p-type polycrystalline silicon film 18 grows between the polycrystalline silicon film 5 and the base-leading polycrystalline silicon film 12. Thus, the p-type base epitaxial layer 17 and the base-leading polycrystalline silicon film 12 are connected via the polycrystalline silicon film 5. Then, in a nitrogen atmosphere, 9
A heat treatment of about 100 ° C. for about 10 minutes is performed to diffuse boron from the base extracting polycrystalline silicon film 12 into the polycrystalline silicon film 5 and the p-type polycrystalline silicon film 18.

Next, as shown in FIG. 4 (g), after a silicon nitride film is formed on the entire surface to a thickness of about 500.degree., Anisotropic etching is carried out, and a polycrystalline silicon film for extracting the base and a polycrystalline silicon film for extracting the emitter are formed. To form a silicon nitride film side wall 19 for isolating the silicon nitride film. Further, a phosphorus-doped polycrystalline silicon film doped with phosphorus from the time of growth is formed to a thickness of 2000 ° on the entire surface by LPCVD. Next, after forming a photoresist pattern by photolithography, the phosphorus-doped polysilicon film other than the emitter contact opening is removed by anisotropic etching to form an emitter leading-out polysilicon film 20. Thereafter, heat treatment is performed to diffuse phosphorus into the p-type base epitaxial layer 17 from the emitter drawing polycrystalline silicon film 20, thereby forming the emitter region 21.

Further, as shown in FIG. 4 (h), after an insulating film 22 is formed on the entire surface, the surface of the insulating film is subjected to CMP (chemic).
al mechanical polishing). Then, after forming a photoresist pattern by photolithography, anisotropic etching is performed to selectively remove the insulating film 22 and the silicon nitride film.
2. Through-hole 2 reaching polycrystalline silicon film 20 for extracting emitter and polycrystalline silicon film 13 for collector electrode
3, 24 and 25 are opened. Finally, after sputtering a metal such as Al, a photoresist pattern is formed, and anisotropic etching is performed using the photoresist pattern as a mask to form a base electrode 26, an emitter electrode 27, and a collector electrode 28. The semiconductor device shown is obtained.

[Second Embodiment] FIGS. 5A to 7
(I) is a cross-sectional view showing a semiconductor device in order of a manufacturing process for describing a second embodiment of the present invention. In the second embodiment, after the n ⁻ -type epitaxial layer 3 is removed by etching, the silicon oxide film 9 is thermally oxidized.
To form As a result, as compared with the first embodiment, it is possible to form a thicker oxide film between the base-leading polycrystalline silicon film 12 and the n ⁻ -type epitaxial layer 3 while improving the surface flatness. Therefore, the parasitic capacitance between the collector and the base can be further reduced as compared with the first embodiment.

First, as shown in FIG. 5A, arsenic is implanted on the p-type silicon substrate 1 under the conditions of an energy of 70 keV and a dose of 5 × 10 ¹⁵ cm ⁻² . Next, heat treatment is performed at 1100 ° C. for 4 hours in a nitrogen atmosphere to diffuse arsenic to form an n ⁺ -type collector buried layer 2. Subsequently, the phosphorus concentration is set to 5 by a normal epitaxial growth method.
X 10 ¹⁵ cm ^-3 silicon is grown to about 1.0 μm,
An n ⁻ -type epitaxial layer 3 is formed. Then, n ^- the surface of the type epitaxial layer 3, the thickness: 600 Å approximately silicon oxide film 4, a polycrystalline silicon film 5 of about 500Å thickness, the thickness of the silicon oxide film 6 and a thickness of about 400Å A silicon nitride film 7 of about 300 ° is formed.

Then, as shown in FIG. 5B, a photoresist pattern is formed on the surface of the silicon nitride film 7 by photolithography, and the silicon nitride film 7, the silicon oxide film 6, The polycrystalline silicon film 5 and the silicon oxide film 4 are selectively removed, and the n ⁻ -type epitaxial layer 3 is further dug down by about 500 °. Next, after forming a silicon nitride film on the entire surface,
The silicon nitride film sidewall 8 is formed by performing anisotropic etching.

Further, as shown in FIG. 5C, using the silicon nitride film 7 and the silicon nitride film side walls 8 as a mask, the other portions are thermally oxidized to form a silicon oxide film 9 serving as an element isolation insulating film. I do. Silicon oxide film thickness 40
By setting the angle to 00 °, the surfaces of the silicon oxide film 6 and the silicon oxide film 9 have substantially the same height. Next, the silicon nitride film 7 is removed by RIE (reactive ion etching) using CF ₄ as an etching gas.

Subsequently, as shown in FIG. 6D, a collector contact opening 10 for extracting a collector electrode is formed in the silicon oxide film 9. Then, phosphorus is supplied through the collector contact opening 10 at an energy of 70 k.
Implantation is performed under conditions of eV and dose: 5 × 10 ¹⁵ cm ⁻² to form a collector lead-out region 11. Further, by performing heat treatment at 900 ° C. for about 30 minutes in a nitrogen atmosphere, recovery from damage due to ion implantation and activation of phosphorus are performed. Thereafter, a polycrystalline silicon film is deposited on the entire surface to a thickness of about 2000 ° by LPCVD.

Next, a resist pattern is formed by a photolithography method, and phosphorus is applied to the polycrystalline silicon film on the collector contact opening 10 at an energy of 70 keV,
Dose: Inject under conditions of 5 × 10 ¹⁵ cm ⁻² . further,
A resist pattern is formed by a photolithography method, and boron is applied only to a region where a polycrystalline silicon film for extracting an emitter and a base is formed at an energy of 20 k
eV, dose: implanted under the condition of 5 × 10 ¹⁵ cm ⁻² to remove the resist pattern. Further, the polycrystalline silicon film is patterned by forming a photoresist pattern and anisotropic etching to obtain a base-leading polycrystalline silicon film 12 and a collector electrode polycrystalline silicon film 13.
To form Further, a silicon nitride film 14 is formed on the entire surface by the LPCVD method.

Subsequently, as shown in FIG. 6E, after forming a photoresist pattern by photolithography, the silicon nitride film 14 and the base-leading polycrystalline silicon film 12 are selectively anisotropically etched. To form an emitter contact opening 15. Then, a silicon nitride film is formed on the entire surface, and anisotropic etching is performed using the polycrystalline silicon film 5 as an etching stopper, thereby forming a silicon nitride film side wall 16 on the side surface of the emitter contact opening 15. At this time, the silicon oxide film 6 in the emitter contact opening 15 is removed at the same time.

Next, the polysilicon film 5 in the emitter contact opening 15 is removed by anisotropic etching. At this time, by etching under the condition that the selectivity between the oxide film and the polycrystalline silicon film is large, it is possible to prevent the surface of the n ⁻ -type epitaxial layer 3 from being damaged by the etching. Further, by performing isotropic etching using hydrofluoric acid, the silicon oxide films 4 and 6 are removed in the lateral direction, and n ⁻ in the emitter contact opening 15 is removed.
Surface of type-type epitaxial layer 3, top and bottom surfaces of polycrystalline silicon film 5, and base-leading polycrystalline silicon film 12
Expose the bottom of

Next, as shown in FIG.
By selective epitaxial growth using CVD, a p-type base epitaxial layer 17 having a thickness of about 700 ° and a boron concentration of about 1 × 10 ¹⁹ cm ^-3 is formed on the n ⁻ -type epitaxial layer 3 from which the silicon oxide film has been removed. . At this time, a p-type polycrystalline silicon film 18 grows between the polycrystalline silicon film 5 and the base-leading polycrystalline silicon film 12. Thus, the p-type base epitaxial layer 17 and the base-leading polycrystalline silicon film 12 are connected via the polycrystalline silicon film 5. Then, in a nitrogen atmosphere, 9
A heat treatment of about 100 ° C. for about 10 minutes is performed to convert the base-leading polycrystalline silicon film 12 into a p-type polycrystalline silicon film 18.
By lowering the connection resistance by diffusing boron into the polycrystalline silicon film 5.

Next, as shown in FIG. 7 (g), after a silicon nitride film is formed on the entire surface to a thickness of about 500 °, anisotropic etching is performed to obtain a base-leading polycrystalline silicon film and an emitter-leading polycrystalline silicon film. To form a silicon nitride film side wall 19 for isolating the silicon nitride film. Further, a phosphorus-doped polycrystalline silicon film doped with phosphorus from the time of growth is formed on the entire surface by LPCVD to a thickness of 2000 nm.
Next, after forming a photoresist pattern by photolithography, the phosphorus-doped polysilicon film other than the emitter contact opening is removed by anisotropic etching to form an emitter leading-out polysilicon film 20. Thereafter, phosphorus is diffused into the p-type base epitaxial layer 17 from the emitter drawing polycrystalline silicon film 20 by heat treatment to form the emitter region 21.

Further, as shown in FIG. 7H, after the insulating film 22 is formed on the entire surface, the surface of the insulating film is planarized by CMP. Then, after forming a photoresist pattern by photolithography, the insulating film 22 and the silicon nitride film 14 are anisotropically etched.
Are selectively removed, and through holes 23, 24, and 25 are formed to reach the base extraction polycrystalline silicon film 12, the emitter extraction polycrystalline silicon film 20, and the collector electrode polycrystalline silicon film 13, respectively. Finally Al
After a metal such as is sputtered, a photoresist pattern is formed, and anisotropic etching is performed using the photoresist pattern as a mask to form a base electrode 26, an emitter electrode 27, and a collector electrode 28, as shown in FIG. As shown, the semiconductor device according to the second embodiment is obtained.

[Third Embodiment] FIGS. 8A to 9
(D) is sectional drawing of the order of a manufacturing process of the semiconductor device for demonstrating 3rd Embodiment of this invention. First, as shown in FIG. 8A, an n ⁺ -type collector buried layer 2 is formed on a p-type silicon substrate 1 by arsenic ion implantation, and an n ⁻ -type epitaxial layer having a thickness of about 1 μm is formed thereon. 3
To form Next, a silicon oxide film 9 having a thickness of about 4000 ° embedded in the substrate is formed by the improved LOCOS method. Then, a silicon oxide film 4 having a thickness of about 600 °, a polycrystalline silicon film 5 having a thickness of about 500 ° and a silicon oxide film 6 having a thickness of about 400 ° are formed thereon. Next, a photoresist pattern is formed on the surface of the silicon oxide film 6 by photolithography, and the silicon oxide film 6, polycrystalline silicon film 5, and silicon oxide film 4 other than the base region formation region are formed by anisotropic etching. Selectively remove.

Next, as shown in FIG. 8B, a collector contact opening 10 for extracting a collector electrode is formed in the silicon oxide film 9. Then, phosphorus is ion-implanted through the collector contact opening 10 to form a collector extraction region 11, and thereafter, a polycrystalline silicon film is deposited on the entire surface to about 2000 ° by LPCVD. Next, the polycrystalline silicon film is selectively p-type and n-type using photolithography and ion implantation.
Then, the polycrystalline silicon film is patterned by photolithography and anisotropic etching to form a base-leading polycrystalline silicon film 12 and a collector electrode polycrystalline silicon film 13. Furthermore, LPC
The silicon nitride film 14 is formed on the entire surface by the VD method.

Subsequently, as shown in FIG. 9C, after forming a photoresist pattern by photolithography, the silicon nitride film 14 and the base-leading polycrystalline silicon film 12 are selectively anisotropically etched. To form an emitter contact opening 15. Then, a silicon nitride film is formed on the entire surface, and anisotropic etching is performed using the polycrystalline silicon film 5 as an etching stopper, thereby forming a silicon nitride film side wall 16 on the side surface of the emitter contact opening 15. At this time, the silicon oxide film 6 in the emitter contact opening 15 is removed at the same time.

Next, polycrystalline silicon film 5 and silicon oxide film 4 in emitter contact opening 15 are removed by anisotropic etching. Further, by performing isotropic etching using hydrofluoric acid, the silicon oxide films 4 and 6 are removed in the lateral direction, and n ⁻ in the emitter contact opening 15 is removed.
Surface of type-type epitaxial layer 3, top and bottom surfaces of polycrystalline silicon film 5, and base-leading polycrystalline silicon film 12
Expose the bottom of

Next, as shown in FIG.
By selective epitaxial growth using CVD, a p-type base epitaxial layer 17 having a thickness of 700 ° is formed on the n ⁻ -type epitaxial layer 3 from which the silicon oxide film has been removed. A p-type polycrystalline silicon film 18 is formed between the crystalline silicon films 12. Thereafter, heat treatment is performed at 900 ° C. for about 10 minutes in a nitrogen atmosphere to diffuse boron from the base-leading polycrystalline silicon film 12 into the p-type polycrystalline silicon film 18 and the polycrystalline silicon film 5.

Next, after forming a silicon nitride film on the entire surface at about 500 °, anisotropic etching is performed to form a silicon nitride film sidewall 19 inside the silicon nitride film sidewall 16. Further, an emitter leading-out polycrystalline silicon film 20 is formed in the emitter contact opening. Thereafter, phosphorus is diffused into the p-type base epitaxial layer 17 from the emitter drawing polycrystalline silicon film 20 by heat treatment to form the emitter region 21. Further, after the insulating film 22 is formed on the entire surface, the surface of the insulating film is flattened by CMP. Then, after opening through holes 23, 24, and 25 reaching the base extraction polycrystalline silicon film 12, the emitter extraction polycrystalline silicon film 20, and the collector electrode polycrystalline silicon film 13, a metal such as Al is sputtered. This is patterned to form a base electrode 26,
An emitter electrode 27 and a collector electrode 28 are formed.

[0043]

As described above, in the semiconductor device according to the present invention, the base epitaxial layer is connected to the base drawing polycrystalline silicon film via the polycrystalline silicon film sandwiched between the oxide films. The reliability of connection between the base epitaxial layer and the base drawing polycrystalline silicon film can be ensured without increasing the thickness of the base epitaxial layer. Therefore, according to the present invention, it is possible to reduce the base parasitic resistance while reducing the thickness of the base epitaxial layer. Further, according to the present invention, the oxide film between the base-leading polycrystalline silicon film and the n ⁻ -type epitaxial layer can be made thicker, so that the collector
The parasitic capacitance between the bases can be reduced. Therefore,
According to the present invention, a semiconductor device having a high cutoff frequency and excellent high frequency characteristics can be provided.

Further, since the polycrystalline silicon film 5 can be used as an etching stopper during the anisotropic etching for forming the silicon nitride film side wall 16, it is possible to prevent the n ⁻ -type epitaxial layer surface from being damaged by etching. be able to. Therefore, a defect can be prevented from being generated in the base epitaxial layer, and at the same time, the reliability of the pn junction between the collector and the base can be improved, thereby improving the yield and providing a highly reliable semiconductor device. Can be.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view (part 1) illustrating a method of manufacturing the semiconductor device according to the first embodiment of the present invention in the order of steps.

FIG. 3 is a sectional view (part 2) illustrating a method of manufacturing the semiconductor device according to the first embodiment of the present invention in the order of steps.

FIG. 4 is a sectional view (part 3) illustrating a method of manufacturing the semiconductor device according to the first embodiment of the present invention in the order of steps.

FIG. 5 is a sectional view (part 1) illustrating a method of manufacturing a semiconductor device according to a second embodiment of the present invention in the order of steps.

FIG. 6 is a sectional view (part 2) illustrating a method of manufacturing a semiconductor device according to a second embodiment of the present invention in the order of steps.

FIG. 7 is a sectional view (part 3) illustrating a method of manufacturing a semiconductor device according to a second embodiment of the present invention in the order of steps.

FIG. 8 is a sectional view (part 1) illustrating a method of manufacturing a semiconductor device according to a third embodiment of the present invention in the order of steps.

FIG. 9 is a sectional view (part 2) illustrating a method of manufacturing a semiconductor device according to a third embodiment of the present invention in the order of steps.

FIG. 10 is a sectional view of a conventional example.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 p-type silicon substrate 2 n ⁺ -type collector buried layer 3 n ⁻ -type epitaxial layer 4 silicon oxide film 5 polycrystalline silicon film 6 silicon oxide film 7 silicon nitride film 8 silicon nitride film side wall 9 silicon oxide film 10 collector contact opening 11 collector Leading region 12 Base drawing polycrystalline silicon film 13 Collector electrode polycrystalline silicon film 14 Silicon nitride film 15 Emitter contact opening 16 Silicon nitride film sidewall 17 p-type base epitaxial layer 18 p-type polycrystalline silicon film 19 silicon nitride film sidewall 20 Emitter extraction polycrystalline silicon film 21 Emitter region 22 Insulating film 23, 24, 25 Through hole 26 Base electrode 27 Emitter electrode 28 Collector electrode 101 p ⁻ type silicon substrate 102 n ⁺ buried layer 103 n ⁻ type epitaxy Axial layers 104, 107, 110, 114 silicon oxide film 105 silicon nitride film 106 BPSG film 108 p ⁺ -type polycrystalline silicon film 109, 113 n ⁺ -type polycrystalline silicon film 111 SiGe / Si selective epitaxial growth layer 112 insulating film sidewall 115 base Electrode 116 Emitter electrode 117 Collector electrode

Continuation of the front page (56) References JP-A-7-201877 (JP, A) JP-A-5-235017 (JP, A) JP-A-9-115921 (JP, A) JP-A-4-340721 (JP) JP-A-6-168952 (JP, A) JP-A-8-334584 (JP, A) JP-A-10-41315 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB Name) H01L 29/73-29/737 H01L 21/331

Claims (5)

(57) [Claims] (1) A first silicon oxide film, a first polycrystalline silicon film, a second silicon oxide film, and a first silicon nitride film are formed on a collector region provided on a semiconductor substrate. And (2) selectively etching at least the first silicon nitride film, the second silicon oxide film, and the first polycrystalline silicon film other than the region where the base region is formed. (3) at least the first step formed in the previous step;
Forming a first nitride film sidewall on the side surfaces of the silicon nitride film, the second silicon oxide film and the first polycrystalline silicon film, and masking the first nitride film sidewall and the first silicon nitride film (4) a step of etching and removing at least the first silicon nitride film; and (5) forming a base-leading polycrystalline silicon film and forming the base. Forming a second silicon nitride film over the entire surface including on the lead-out polycrystalline silicon film; and (6) forming an emitter contact opening in the second silicon nitride film and the base lead-out polycrystalline silicon film; Forming a second nitride film sidewall on the inner wall of the emitter contact opening; and (7) forming the second silicon oxide film, the first polycrystalline silicon film, and the first silicon oxide film. Patterning into a pattern shape of the side wall of the second nitride film, and further etching a side surface of the second silicon oxide film and the side surface of the first silicon oxide film to a predetermined depth; (8) by selective epitaxial growth, Forming a base epitaxial layer on the collector region from which the first silicon oxide film has been removed, and a second polysilicon between the first polysilicon film and the base leading-out polysilicon film; Forming a film; and (9) forming an insulating film sidewall on the side surfaces of the second nitride film side wall and the first and second polycrystalline silicon films, and forming an insulating film side wall in a region surrounded by the insulating film side wall. Forming an emitter extraction polycrystalline silicon film; and (10) heat-treating impurities from the emitter extraction polycrystalline silicon film into the base epitaxial layer by heat treatment. The method of manufacturing a semiconductor device characterized by comprising a step of diffusing to form an emitter region. 2. The method according to claim 1, wherein in the step (2), the first
The method according to claim 1, wherein also the patterning of the silicon oxide film and said trenching perform further the collector region a predetermined depth at the same time. 3. A process of claim 3, claim 1, the surface height of the formed element isolation oxide film is equal to or is substantially the same as the surface height of the second silicon oxide film Or a method for manufacturing a semiconductor device according to item 2 . In the step wherein said first (4) The method of manufacturing a semiconductor device according to claim 1, wherein at least a portion of the first nitride film side wall is characterized in that to leave without etching. 5. A first silicon oxide film, a first polycrystalline silicon film, and a second silicon oxide film are formed in this order on a semiconductor substrate on which a collector region and an element isolation insulating film have been formed. (2) selectively etching away the second silicon oxide film, the first polycrystalline silicon film, and the first silicon oxide film other than the region where the base region is formed; (3) forming a base-leading polycrystalline silicon film and forming a second silicon nitride film on the entire surface including the base-leading polycrystalline silicon film; and (4) forming the second silicon nitride film and the second silicon nitride film. Forming an emitter contact opening in the base drawing polycrystalline silicon film and forming a nitride film side wall on the inner wall of the emitter contact opening; (5) the second silicon oxide film and the first silicon oxide film; Patterning a polycrystalline silicon film and a first silicon oxide film into a pattern shape of the side wall of the nitride film, and further etching the side surfaces of the second silicon oxide film and the first silicon oxide film to a predetermined depth (6) a base epitaxial layer is formed on the collector region from which the first silicon oxide film has been removed by selective epitaxial growth, and the first polycrystalline silicon film and the base extracting polycrystalline silicon film are formed. (7) forming a second polycrystalline silicon film between the first and second polycrystalline silicon films; and (7) forming an insulating film side wall on the side surfaces of the nitride film and the first and second polycrystalline silicon films. Forming a polycrystalline silicon film for extracting an emitter in a region surrounded by the above, and (8) removing impurities from the polycrystalline silicon film for extracting an emitter by heat treatment. Forming a emitter region by diffusing into the base epitaxial layer.