JP3212686B2 - Semiconductor light emitting device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a semiconductor light emitting device, and more particularly to a semiconductor light emitting device using a semiconductor porous layer.

[0002]

2. Description of the Related Art The concept of an optical / electronic integrated circuit (OEIC) that combines a semiconductor integrated circuit with light-emitting and light-receiving elements is regarded as an important functional element in constructing an optoelectronics field. In general, a compound semiconductor is used as a semiconductor crystal material constituting a light emitting element because a forbidden band width can be variously selected and light is easily emitted. On the other hand, silicon plays an important role in forming advanced integrated circuit elements.

Since the substrate material of the light emitting element and the substrate material of the integrated circuit element are different as described above, it is impossible to configure both functional elements in the same semiconductor chip. For this reason, both functional elements are formed by separate processes, and if necessary, are implemented by integrating them in a hybrid configuration. Therefore, it has not been possible to form a more sophisticated multifunctional device in which a plurality of light emitting devices are built in an electronic circuit.

By the way, it has been observed that when the structure of a semiconductor crystal is miniaturized, the emission transition becomes shorter in wavelength due to a quantum effect. Whether the phenomenon is similar or not, the light emission mechanism is currently under discussion, but the porous silicon layer formed by applying anodic etching to silicon single crystal shows bright photoluminescence in the visible region. It was also reported. However, this light emission phenomenon is caused by, for example, excitation by ultraviolet light, and it is difficult to form a functional element as it is.

[0005]

As described above, conventionally, for example, a semiconductor light-emitting element which emits light in a visible region, which has a high degree of freedom in design, is not suitable for other circuits and light-receiving elements. There was a problem that it could not be created.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor light emitting device which is compatible with a silicon process or the like based on a substrate suitable for an integrated circuit such as silicon. Is to do.

[0007]

Gist of the present invention SUMMARY OF] is to emit semiconductor porous layer by an electric field applied to the semiconductor porous layer.

[0008]

[0009]

That is, the present invention relates to a semiconductor light emitting device formed on a non-compound semiconductor substrate such as silicon and the like. Wherein a voltage is applied between the conductive layers to cause the semiconductor porous layer to emit light.

Here, the following are preferred embodiments of the present invention. (1) The semiconductor porous layer is formed by anodic etching a semiconductor crystal layer. (2) porous silicon as a semiconductor porous layer, silicon oxide, silicon nitride, high-resistance silicon or a laminated film thereof as an insulating layer or a high-resistance layer, a transparent conductive film as a conductive layer,
Silicon, metal, or a laminated film of these is used. (3) On the semiconductor substrate on which the element of the present invention is formed, an AC power supply circuit for driving the element is simultaneously formed. (4) The semiconductor substrate on which the element of the present invention is formed is an SOI substrate or a silicon substrate directly bonded via an insulating film. (5) Silicon is used as a semiconductor substrate, and light receiving elements are simultaneously formed on the silicon substrate. As the light receiving element, a photodiode structure, a PIN photodiode structure, an avalanche diode structure, a light trigger thyristor structure or a CCD structure is employed.

[0012]

[0013]

[0014]

The normal silicon single crystal is an indirect transition type semiconductor, and light emission cannot be obtained even when a voltage is applied in the configuration as in the present invention. However, it is necessary to make the single crystal silicon porous under optimal conditions. It was found that EL was obtained in the visible region. Light emission with a similar configuration can be obtained with an indirect transition semiconductor other than silicon. Therefore, according to the present invention, it is possible to obtain a light emitting element in the visible region even with a semiconductor such as silicon.

By adopting such a configuration,
All parts of the OEIC can be made based on the same semiconductor substrate, and the manufacturing process can be significantly simplified. In addition, control and calculation of input signals,
Further, a driving circuit and the like of the light emitting unit can be integrated on a substrate integrated with the light emitting unit, and the size of the system including these components can be improved.

That is, the light receiving section, the input signal processing circuit, and the light emitting section driving circuit can be formed by using, for example, silicon as a substrate and in a process compatible with each other, so that both can be integrated. Specifically, a structure in which a porous silicon layer obtained by anodically etching silicon is combined with a conductive layer for applying an electric field as a light emitting portion, and a conventionally known silicon photoelectric conversion element is used as a light receiving portion A structure or a porous silicon structure is used. Then, both are formed on the same substrate, or on an SOI substrate obtained by bonding a silicon wafer via an insulating layer, or are formed by separate wafer processes, and bonded at the wafer level, thereby achieving the purpose. Can be obtained.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be described below with reference to the illustrated embodiments.

FIG. 1 is a sectional view showing a schematic structure of a semiconductor light emitting device according to a first embodiment of the present invention. 11 in the figure
Is p ⁺ A p-type silicon layer 12, a p-type porous silicon layer (semiconductor porous layer) 13, and an n-type GaP layer (semiconductor crystal layer) 14 are laminated on the substrate 11. A p-side electrode 15 is formed on the back surface of the substrate 11, and an n-side electrode 16 is formed on a part of the GaP layer 14.

As a specific manufacturing method of each layer, the substrate 1
A p-type silicon layer 12 having a thickness of 4 to 5 μm is grown and formed on the substrate 1, and the surface of the silicon layer 12 is subjected to anodic etching to form a porous silicon layer 13 having a thickness of 1 μm. An n-type GaP layer 14 having a thickness of 3 to 5 μm was formed thereon by MOCVD.

Here, in the anodic etching process, the back surface of the substrate 11 is brought into contact with an electrode, a platinum electrode of a negative voltage is arranged on the surface of the silicon layer 12 to face it, and the surface of the silicon layer 12 is immersed in an aqueous solution of hydrofluoric acid. . Thus, electrolytic etching proceeds from the silicon surface toward the depth direction, and a porous layer is formed. The n-type GaP layer 14 may be a semiconductor crystal layer having a larger forbidden band width than the silicon porous layer 13, and may be formed of GaAs as a III-V group compound semiconductor crystal.
lInP, ZnS as II-V compound semiconductor crystal,
ZnSe, ZnSSe, or the like may be used.

With this configuration, bright red light emission with a peak wavelength of 650 nm was observed at an applied voltage of about 2.5 V. In the case where the electrode was directly attached to the porous silicon layer 13, the size was so small that light emission could be confirmed.

FIG. 2 shows a second embodiment of the present invention.
It is sectional drawing which shows the schematic structure of EIC. The same parts as those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted. The feature of this embodiment is that the light emitting element and the MOS integrated circuit element are integrally formed on the same substrate.

That is, a light emitting element similar to that of the previous embodiment is formed on the p-type silicon layer 12, and an electronic circuit composed of a MOS transistor is formed adjacent to the light emitting element. In the figure, 21 is a source, 22 is a drain, 23 is a gate insulating film, 24 is an interlayer insulating film, 25 is a gate electrode,
26 denotes a source electrode, and 27 denotes a drain electrode.
Although not shown in the figure, the substrate 11 is provided with an optical coupling section, a light receiving element, and the like, in addition to the light emitting element and the electronic circuit.

FIG. 3 shows a functional form of the above integration. 31
Denotes a semiconductor functional element chip, 32 denotes one or more light emitting elements according to the present invention, 33 denotes an optical coupling part, 34 denotes one or more light receiving elements, and 35 denotes an electronic circuit. Light emitting element 3
The integration of any one of the functional elements 33 to 35 around the periphery of 2 has made it possible to construct various functional systems.

In the light emitting devices shown in the first and second embodiments, porous silicon is used for the semiconductor porous layer. However, any material capable of forming a similar quantum structure is limited to silicon. is not. Further, although the MOCVD method is used in the embodiment as the semiconductor crystal lamination technology, the present invention is not limited to this method, and it is also possible to use an epitaxial growth method such as MBE, electrostatic bonding, direct bonding, or the like.

FIG. 4 is a sectional view showing a schematic structure of a semiconductor light emitting device according to a third embodiment of the present invention. In the figure, 41 is a low-resistance silicon substrate, 42 is a first insulating layer, 43 is a silicon crystal layer, 44 is a second insulating layer, 45 is a porous silicon layer, 46 is a third insulating layer, and 47 is a light-transmitting layer. The negative electrode 48 is a lower electrode. By forming the porous silicon layer 45 between the upper and lower insulating films as described above, a high electric field can be easily applied from the electrode or the conductive layer adjacent to the insulating film by laminating on the insulating film. Electroluminescence can be obtained.

Generally, in order to form a porous silicon layer, an electrode is provided on the back surface of a silicon crystal layer, only the surface is immersed in a hydrofluoric acid aqueous solution, and electrolytic etching is performed using a platinum electrode as a negative voltage counter electrode. . Thereby, electrolytic etching proceeds from the silicon surface in the depth direction, and a porous layer is formed. In this case, for etching, it is necessary to always connect an electrode through which a current flows to the porous silicon layer, and in the conventional method, the lower surface of the porous silicon layer as shown in the embodiment is in contact with the insulating layer Such a configuration cannot be realized.

The inventors of the present invention have conducted various studies as a method of realizing such a configuration, and as a result, have obtained a so-called SOI substrate having a silicon layer formed on an insulating film obtained by a direct bonding technique of a silicon wafer. It has been found that this can be realized by using the electrolysis in the lateral direction.

A specific manufacturing process will be described with reference to FIG. First, as shown in FIG. 5A, an element forming substrate in which a silicon crystal layer 43 is provided on a low-resistance silicon substrate 41 via an insulating layer 42 is formed. More specifically, two silicon substrates having an oxide film formed on the surface are directly bonded to each other,
The upper substrate is mechanically polished to a desired element thickness to form a silicon crystal layer 43. In this embodiment, the thickness of the silicon crystal layer 43 is set between 1 and 20 μm.

Next, as shown in FIG. 5B, a silicon oxide film as a thermal oxide film and a silicon nitride film formed by a CVD method are formed as an insulating mask layer 44, and this is patterned by well-known lithography and etched. Area 5
An opening 1 was formed. Further, an etching electrode extraction region 52, which is a feature of the production method of the present invention, was formed in an opening at another place in the wafer.

Next, as shown in FIG. 5C, an etching electrode 53 was connected to the electrode extraction region 52, and the etching region 51 was immersed in hydrofluoric acid and electrolytically etched. In this case, hydrofluoric acid (49%) was used as it is, but ethanol may be mixed to make the etched surface more uniform. Note that a platinum plate was used for the counter electrode facing the etching region 51.

Current was supplied from a constant voltage power supply with the platinum electrode side minus and the silicon side plus, to perform electrolytic etching. The current density at this time was adjusted in the range of 10 mA to 80 mA. When performing anodic etching,
In order to increase the porosity of the silicon porous layer and improve the luminous efficiency, it was also effective to irradiate a tungsten lamp from the vicinity during the etching. The etching time was determined by setting conditions so that the light emitting region of the opening was porous up to the bottom. For example, the thickness was 5 μm and the diameter of the opening was 20 μm.
, The current density is 50 mA / cm ² For about 10 to 20 minutes. This also changed depending on conditions such as lamp irradiation.

As described above, the porous silicon layer 45 was formed in the silicon crystal 43. This porous silicon layer 45
May be further immersed and etched in hydrofluoric acid after electrolytic etching. Thereafter, by adjusting the etching, current density, light irradiation, composition of the etching solution, etc., the emission wavelength and efficiency can be changed.

Next, as shown in FIG. 5D, a silicon nitride film was formed as an upper insulating layer 46 on the porous silicon layer 45 by, for example, a sputtering method. At this time, it is important to form the film at a temperature as low as possible and to lower the oxidizing atmosphere in order not to lower the light emission characteristics. Of course, the method of forming the film and the material of the film are not limited to those described above. For example, low-temperature plasma CVD or ECRC
An electron beam evaporation method or the like, such as a VD method, may be used. As a material, a silicon oxide film, an aluminum oxide film, or the like may be used, but a non-oxide material is more desirable in order to keep the light emission characteristics of the silicon porous layer good.

Thereafter, the light transmitting electrodes 47 are formed by sputtering.
By forming an ITO film on the substrate 41 and forming a metal film on the back surface of the substrate 41 as the lower electrode 48, the structure shown in FIG. 4 is realized.

When driving is performed by applying an AC voltage between the upper and lower electrodes 47 and 48 of the device thus constructed, the power conversion efficiency is improved about twice as compared with the conventional EL device, and the applied voltage is lower than that of the conventional EL device. Practically enough high luminance characteristics were obtained at the voltage. The uniformity of the luminance distribution on the light emitting surface was also good.

FIG. 6 is a circuit diagram showing an O-type oscillator according to a fourth embodiment of the present invention.
It is sectional drawing which shows the schematic structure of EIC. The same parts as those in FIG. 5 are denoted by the same reference numerals, and detailed description thereof will be omitted. In this embodiment, a light receiving element is formed on the element of the third embodiment.

A p-type silicon layer 62 is formed on a light emitting element 41 to 48 via a transparent insulating layer 61, and an insulating layer 63 is formed on the silicon layer 62. An opening is provided in a part of the insulating layer 63, and an n-type layer 64 is formed from the opening by impurity diffusion. An electrode 65 is formed on the n-type layer 64.

Here, the silicon type of the light receiving element portion may be reversed as long as a pn junction can be realized, and the material itself is not limited to single crystal but may be polycrystal or amorphous. For example, an amorphous silicon layer may be directly formed on the transparent insulating layer 61 by a plasma CVD method, and a pn junction may be formed on a part of the amorphous silicon layer. Further, the light receiving element is not limited to silicon, and may use another semiconductor material. Further, this configuration is not limited to a combination of a single light emitting / receiving section, and a plurality of each may be formed in an array or a matrix to enable multi-channel coupling. Further, the light receiving unit 1
The light emitting unit may be composed of a plurality of elements such as a matrix for the unit, and may be used for forming a logic circuit such as converting the number of light emitting elements into light receiving intensity.

In the light emitting element portion, not only a porous structure but also a circuit portion for applying an optimum AC voltage thereto may be formed at the same time. Further, each of the above-mentioned element portions may be formed on the same SOI substrate using a direct bonding technique of silicon, insulated and separated, and integrated.

FIG. 7 is a block diagram showing a fifth embodiment of the present invention.
It is sectional drawing which shows the schematic structure of EIC. In this embodiment, a silicon substrate directly bonded to a silicon substrate 71 via an insulating layer 72 is polished and adjusted to an appropriate thickness and patterned into a plurality of islands. 74, a light receiving element 75 was formed, and a wiring 76 was formed between necessary areas and connected to each other.

In this way, all the elements necessary for the optical coupling device can be integrated on the integrated silicon substrate. In addition, the light emitting and receiving elements can be completely electrically insulated.

FIG. 8 is a sectional view showing a schematic configuration of a photo-interrupter according to a sixth embodiment of the present invention. p ⁺
Type silicon substrate 81 is used as a lower conductive layer of the light emitting element portion, and a p-type silicon layer 84 is formed on the substrate 81 with an insulating layer 83 interposed therebetween.
And a porous silicon layer 85 was formed on a part of the silicon layer 84 by the method described above. Further, for a light receiving element, a part of the surface of the silicon layer 84 has n ⁺ Diffusion layer 86
Was formed. A transparent insulating layer 87 was formed thereon, and necessary portions were opened. A transparent electrode 88 was formed on the insulating layer 87, and a metal electrode 89 was formed on the back surface of the substrate 81. Also,
A light-shielding wall 91 was formed between the light-emitting element portion and the light-receiving element portion so as to protrude from the substrate surface, and light was shielded between the two.

In such a configuration, the light from the light emitting element is normally not blocked by the light shielding wall 91 and does not irradiate the light receiving element. When an object to be detected approaches, light from the light emitting element unit is reflected and reaches the light receiving element unit, causing an output change. Using this, a non-contact approaching object sensor can be realized.

[0045]

[0046]

As described above in detail, according to the present invention, a highly efficient light emitting device based on a wide range of semiconductors such as silicon, which has been difficult in the past, can be realized. In addition, a necessary electronic circuit such as a light emitting element portion and its driving circuit or a logical operation circuit can be formed over the same substrate by a similar process. In addition to the light emitting element portion, the light emitting element portion can be integrally formed with the light receiving element portion using the same material as the light emitting element portion. Furthermore, based on this basic structure, it is possible to realize an optical integrated device such as an optical coupling device and an optical interrupter, which is very small and has a high performance.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a schematic configuration of a semiconductor light emitting device according to a first embodiment;

FIG. 2 is a sectional view showing a schematic configuration of an OEIC according to a second embodiment;

FIG. 3 is a plan view showing an integrated form of the device according to the second embodiment;

FIG. 4 is a cross-sectional view illustrating a schematic configuration of a semiconductor light emitting device according to a third embodiment;

FIG. 5 is a sectional view showing a manufacturing process of the device according to the third embodiment;

FIG. 6 is a sectional view showing a schematic configuration of an OEIC according to a fourth embodiment;

FIG. 7 is a sectional view showing a schematic configuration of an OEIC according to a fifth embodiment;

FIG. 8 is a sectional view showing a schematic configuration of a photointerrupter according to a sixth embodiment.

[Explanation of symbols]

11 ... p ⁺ -Type silicon single crystal substrate, 12 ... p-type silicon layer, 13 ... p-type porous silicon layer (semiconductor porous layer), 14 ... n-type GaP layer (semiconductor crystal layer), 15 ... p-side electrode, 16 ... n-side Electrodes, 41: low resistance silicon substrate, 42: first insulating layer, 43: silicon crystal layer, 44: second insulating layer, 45: porous silicon layer, 46: third insulating layer, 47: light transmission Electrode, 48 ... Lower electrode.

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Hitoshi Yagi 1 Toshiba-cho, Komukai, Kawasaki-shi, Kanagawa Pref. JP-A-5-55627 (JP, A) JP-A-2-98093 (JP, A) JP-A-4-14215 (JP, A) JP-A-4-356977 (JP, A) JP-A-5-37012 (JP) JP-A-5-218494 (JP, A) Japanese Unexamined Patent Publication No. Hei 6-509685 (JP, U) IEEE ELECTRON DEV ICE LETTERS, VOL. 12, NO. 12 (1991) (58) Fields investigated (Int. Cl. ⁷ , DB name) H05B 33/14 H01L 27/15 H01L 33/00

Claims (2)

(57) [Claims] 1. A semiconductor porous layer comprising: a semiconductor porous layer; and a conductive layer laminated on both surfaces of the semiconductor porous layer via an insulating layer or a high-resistance layer. A semiconductor light emitting device characterized in that a semiconductor porous layer emits light. 2. The semiconductor porous layer is formed on a semiconductor substrate.
Part of the semiconductor layer formed via the edge layer or the high resistance layer
A contractor characterized in that the region is made porous.
The semiconductor light emitting device according to claim 1.