JP3207280B2 - Data carrier system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data carrier system using an electromagnetically coupled data carrier. In the present invention, a data carrier is an IC card, an industrial data tag, a name plate with an ID function, various prepaid cards, etc., and a distance of several centimeters or more from a communication terminal called a fixed facility. It refers to those that perform data communication without contact.

[0002]

2. Description of the Related Art In a data carrier system using an electromagnetic coupling type data carrier, an alternating magnetic field in a steady state generated by a fixed facility is changed on the data carrier side, and the change in the alternating magnetic field flows to an antenna of the fixed facility. Various proposals have been made for a system called a resonance condition control type that detects a change in current. Further, various methods have been devised as means for signal detection. Among them, the system disclosed in Japanese Patent Application No. 4-60917 filed by the present applicant was very excellent and effective.

Here, a method of detecting a signal transmitted from a data carrier in a conventional data carrier system of the electromagnetic coupling system will be described with reference to the drawings. FIG. 13 is a block diagram showing a circuit configuration for signal detection at a fixed facility of the data carrier system of the prior application. An IV converter as means, 6 as an antenna, 7 as a voltage adjustment circuit as an AC signal adjustment circuit, 8 as a subtraction circuit,
9 is an amplification circuit, 10 is a synchronous rectification circuit, 11 is a phase adjustment circuit, 12 is a low-pass filter, 13 is a differentiation circuit, 14 is a gate circuit, 15 is a waveform shaping circuit, and 17 is an information processing circuit.

An AC signal AC, which is a reference signal used in the above system, is transmitted from an AC signal generating means for selecting an output from the oscillator 1 or a signal supplied from the outside to an ACin terminal by connection of a switch 2, and is modulated. The circuit 3 is distributed to the voltage adjustment circuit 7 and the phase adjustment circuit 11. The modulation circuit 3 modulates the AC signal AC according to output data DATAout provided from the information processing circuit 17, that is, data to be transmitted to a data carrier. The antenna drive circuit 4 power-amplifies the output of the modulation circuit 3 and
The antenna 6 is driven via the V converter 5. The antenna 6 is constituted by a series resonance circuit of an antenna coil and a capacitor, and the resonance frequency thereof matches the frequency of the AC signal AC. From the antenna 6, an alternating magnetic field φ1
Is output, and an AC magnetic field φ2 is returned from the data carrier 16 which has received the energy. The antenna 6
Is converted into a voltage by the IV conversion circuit 5, and the received signal Vo which is the first input of the subtraction circuit 8
become.

The second input voltage of the subtraction circuit 8 is a reference signal Vs obtained by adjusting the voltage of the AC signal AC by the voltage adjustment circuit 7. When the reference signal Vs is adjusted so that the current driven by the antenna driving circuit 4 to generate the AC magnetic field φ1 in the antenna has the same amplitude as the voltage converted by the IV converter 5,
When data is not transmitted from the fixed facility, the output of the subtraction circuit 8 has only a voltage amplitude corresponding to a current induced in the antenna 6 by the AC magnetic field φ2 returned from the data carrier 16. This voltage amplitude is very small and is amplified by the amplifier circuit 9. The amplification circuit 9
Is output to the synchronous rectifier circuit 10 using the synchronous rectified clock output Vr of the phase adjustment circuit 11 as a synchronous signal, and rectified and detected.

[0006] The synchronous rectification clock signal Vr is used to eliminate the error factors of the amplifying circuit 9 and the like, and to reduce the yield of noise terms transmitted from other nearby fixed facilities to 0%. The phase is adjusted by adjusting 11. Accordingly, the output signal of the synchronous rectifier circuit 10 includes only the component induced by the data carrier.

[0007] The detection output of the synchronous rectifier circuit 10 has a carrier component removed by a low-pass filter 12, and information on the distance between the data carrier 16 and the fixed facility is removed by a differentiating circuit. Only the component is output in the form of a differential waveform. The differentiated waveform is transmitted to the waveform shaping circuit 15 via the gate circuit 14. At this time, the gate circuit 14 is controlled by a gate control signal MASK output from the information processing circuit 17, and when the fixed facility is transmitting data, that is, the information processing circuit 17 is transmitting output data DATAout. Sometimes do not let the signal pass. Thus, the signal input to the waveform shaping circuit 15 is only the signal sent from the data carrier 16. The differentiated signal is shaped into a rectangular wave data signal by the waveform shaping circuit 15 and sent to the information processing circuit 17 as DATAin.

FIGS. 3A and 3B are waveform diagrams showing the operation of the subtraction circuit 8. FIG. 3A shows the reception signal Vo output from the IV conversion circuit, and FIG. 3B shows the output signal from the voltage adjustment circuit 7. (C) is a difference signal Vc output from the subtraction circuit 8. In the waveform of (a),
A change in the voltage amplitude occurs due to a change in the alternating magnetic field φ2 caused by data transmission from the data carrier 16. The data carrier 1 is subtracted from the waveform (b) from the waveform (b) by the subtraction circuit 8.
6 can be obtained as the differential signal Vc of (c) which is the signal component of the transmission data.

[0009]

In the prior art, the subtraction circuit 8 is used as means for detecting transmission data from the data carrier 16, and a method for detecting only a change in an AC magnetic field during data transmission is used. I have. Since the output change of the subtraction circuit 8 is a very small signal,
In order to recognize it as received data, it is necessary that the difference signal Vc be sufficiently amplified by the amplifier circuit 9.

In a state where the transmission from the data carrier 16 is not performed, the voltage adjustment circuit 7 adjusts the voltage amplitude of the AC signal AC so that the reception signal Vo and the reference signal Vs have the same amplitude. With such adjustment, the difference signal Vc becomes a signal having a very small amplitude in a state where data transmission from the data carrier 16 is not performed. Therefore, the setting of the amplification factor
The determination is made in consideration of whether a change in the signal amplitude of the difference signal Vc occurring when data transmission from the data carrier 16 is being performed can be detected.

FIG. 4A shows a difference signal Vc output from the subtraction circuit 8 when the voltage adjustment circuit 7 is adjusted to the best condition. FIG. 4B shows the difference signal Vc.
Shows the amplified signal Va obtained by amplifying the above. In this case, when there is no modulation from the data carrier 16, the amplified signal Va becomes 0, and the data carrier 16
When the modulation has occurred, only the data signal component is output as an amplified signal.

However, when the data carrier system is operated for a long period of time, the characteristics of the circuit and the antenna change due to the passage of time and changes in the surrounding environment, and the reception signal Vo and the reference signal which are adjusted and matched in the initial state are matched. It is sufficiently conceivable that a deviation occurs in the amplitude of Vs. As for the phase, the phase difference between the received signal Vo and the reference signal Vs uses the AC signal AC which is a common signal, but the phases do not always match due to delay occurring on the circuit. . Furthermore, it is conceivable that a shift may occur in the case of the phase as in the case of the amplitude due to a change in the characteristics of the circuit or the antenna due to the passage of time or a change in the surrounding environment.

If the amplitude or phase of the received signal Vo and the reference signal Vs do not match, the subtraction circuit 8
The amplitude of the differential signal Vc, which is the output of the data carrier 16, becomes large even when there is no transmission from the data carrier 16. The amplification circuit 9 set to a sufficiently large amplification factor corresponding to a small signal from the data carrier 16
Then, when the differential signal Vc in such a state is amplified, the signal is saturated and the data carrier 16c is amplified.
Data cannot be detected correctly.
This means that the S / N ratio of the receiving circuit deteriorates. Therefore, in this method, it is necessary that the amplitude and the phase of the voltage signal Vo and the reference signal Vc in the steady state match each other.

FIG. 5A shows a state where data transmission from the data carrier 16 is not performed when the adjustment of the voltage adjustment circuit 7 is broken or when the characteristics of the circuit, the antenna, and the like change. 5 shows a waveform of the difference signal Vc when the output of the subtraction circuit 8 has increased. In this case, when the difference signal Vc is amplified by the amplifier circuit 9 at the same amplification factor as when the waveform is amplified from the waveforms of FIG. 4A to the waveforms of FIG. 4B, the amplified signal Va from the amplifier circuit 9 is obtained. Is saturated as shown in FIG.
Data transmission from the data carrier 16 cannot be recognized.

The characteristics of the circuit and the antenna change due to the passage of time and changes in the surrounding environment, and a certain amount of deviation occurs in the amplitude or phase of the received signal Vo and the reference signal Vs that have been adjusted and matched in the initial state. On the assumption that the output of the amplification circuit 9 is saturated, the amplification factor of the amplification circuit 9 must be suppressed. If the amplification factor is suppressed to such an extent that the amplified signal Va does not saturate, and if the data signal from the data carrier 16 is very small, detection becomes difficult. This means that the receivable distance between the data carrier 16 and the fixed facility is reduced.

In the conventional example, the data carrier 16
In order to prevent the data from being received, the amplification factor of the amplifying circuit 9 must be suppressed and the communication distance must be sacrificed, and the field of use of the data carrier system is narrowed to a specific area. .

[0017]

A feature of the present invention for solving the above-mentioned problems is a data carrier system comprising a data carrier and a fixed facility for performing two-way communication by electromagnetic coupling. AC signal generating means for generating an AC signal, an antenna for transmitting the AC signal as an AC magnetic field, and detecting, as a received signal, a change in antenna current caused by the data carrier changing the AC magnetic field transmitted from the antenna. A data carrier system comprising: a reception signal detection unit; an AC signal adjustment circuit that adjusts the amplitude of the AC signal to output a reference signal; and a subtraction circuit that extracts only a difference between the reception signal and the reference signal as a data signal. An amplitude difference detection circuit for detecting an amplitude difference between the received signal and the reference signal and outputting amplitude difference data. , The AC signal conditioning circuit is characterized in that to match the amplitude of the reference signal and the reception signal by the amplitude difference data.

Further, a phase difference detection circuit for detecting a phase difference between the received signal and the reference signal and outputting phase adjustment data is provided, and the AC signal adjustment circuit is provided with a phase adjustment circuit. The phase of the received signal and the phase of the reference signal are matched by the phase adjustment data.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram showing a circuit configuration of a fixed facility for realizing the present invention, in which a part of the circuit configuration of the conventional example shown in FIG. 13 is improved, and the same elements as those in FIG. , And overlapping description will be omitted. In FIG. 1, reference numeral 71 denotes an AC signal adjustment circuit, which corresponds to the voltage adjustment circuit 7 in FIG. 76 is a signal difference detection circuit,
The received signal Vo and the reference signal Vs are compared at two inputs, and phase adjustment data Pc and amplitude difference data Sc are output. The AC signal adjusting circuit 71 determines the phase adjustment data P
c and the amplitude difference data Sc, the AC signal AC is adjusted, and the phases of the reception signal Vo and the reference signal Vs are adjusted.
Match the amplitude.

FIG. 2 is a more detailed block diagram showing the main part of the fixed facility according to the present invention. Reference numeral 72 denotes a phase difference detection circuit, and 73 denotes an amplitude difference detection circuit, which constitutes the signal difference detection circuit 76. 74 is a phase adjustment circuit, and 75 is an amplitude adjustment circuit, which constitutes the AC signal adjustment circuit 71. The phase difference detection circuit 72 detects a phase difference between two signals of the reception signal Vo and the reference signal Vs, which are the inputs of the subtraction circuit 8,
The phase adjustment data Pc is output according to the detected amount of the phase difference. The phase adjustment circuit 74 adjusts the phase of the AC signal AC according to the phase adjustment data Pc, and outputs an in-phase signal Ss that matches the phases of the reception signal Vo and the reference signal Vs.

In the amplitude difference detection circuit 73, the reception signal Vo and the reference signal Vs which are the inputs of the subtraction circuit 8 are input.
And outputs amplitude difference data Sc according to the detected amount of the amplitude difference. The amplitude adjustment circuit 75
Adjusts the amplitude of the in-phase signal Ss according to the amplitude difference data Sc, matches the amplitude of the received signal Vo with the amplitude of the reference signal Vs, and outputs a reference signal Vs having the same phase and amplitude as the received signal Vo.

In the above system, a feedback loop for detecting and correcting the phase difference and the amplitude difference between the received signal Vo and the reference signal Vs is formed. The reaction time of this feedback loop,
That is, after the phase difference detection circuit 72 detects a phase difference between the reception signal Vo and the reference signal Vs, the phase adjustment data Pc is sent to the phase adjustment circuit 74, and the reception signal Vo and the reference signal Vs Until the phase correction is performed, and the reception signal Vo and the reference signal Vs
The amplitude difference data Sc is sent to the amplitude adjustment circuit 75 after the amplitude difference detection circuit 73 detects the amplitude shift of
The time required until the amplitude correction of the received signal Vo and the reference signal Vs is performed needs to be sufficiently longer than the data transmission speed from the data carrier 16. This is because if the reaction time of these feedback loops is too fast, the phase and amplitude of the difference output Vc of the subtraction circuit 8 caused by the change of the received signal Vo due to the data transmission from the data carrier 16 will be increased. This is because the correction follows, and the difference output Vc from the subtraction circuit 8 becomes 0, so that it becomes impossible to detect the transmission data from the data carrier 16.

In general, a change in ambient temperature or the like that affects the circuit or antenna of a fixed facility or a change in circuit characteristics with the passage of time does not rapidly change. Even when the length is increased, the function as a compensation circuit can be sufficiently performed.

With the above system, the phase and amplitude of the received signal Vo and the reference signal Vs always coincide. Therefore, it is possible to increase the amplification factor of the amplifier circuit 9 and to sufficiently detect even a small data signal from the data carrier 16, thereby increasing the communication distance between the data carrier 16 and a fixed facility. I can do it. Further, the above system also has a function of setting the difference between the amplitude of the received signal Vo and the amplitude of the reference signal Vs to 0, which is required in the conventional example, so that it is not necessary to perform the initial adjustment.

FIG. 6 is a circuit diagram showing a detailed circuit configuration of the signal difference detection circuit 76 and the AC signal adjustment circuit 71 of the present invention shown in FIG. In FIG. 6, 74 is the phase adjustment circuit, 111 is a variable resistor, 75 is the amplitude adjustment circuit,
21 is a variable resistor, 130 is a waveform shaping circuit, 131 is a comparator, 132 is a comparator, 72 is the phase difference detection circuit, 140 is a phase shift detection circuit, 141 is an RS flip-flop, 142 and 143 are NOR gates, 150
Is a phase difference-voltage conversion circuit, 151 and 152 are analog switches, 153 is a capacitor, 73 is the amplitude difference detection circuit, 160 is a difference detection circuit, 170 is a synchronization signal detection circuit, 180 is a low-pass filter, and 190 is a DC conversion circuit , 191 are comparators, 192 is a NOR gate, 1
93 is an AND gate, 194 is an analog switch, 1
95 is an analog switch, and 196 is a capacitor.

In the waveform shaping circuit 130, the reference signal Vs and the received signal Vo are respectively supplied to the comparator 13
1, 132 are converted into rectangular signals of Ds and Do, respectively. In the phase shift detection 140, the phase difference between the rectangular reference signal Vs and the received signal Vo is compared, and a detection signal corresponding to the phase shift is output. 7 and 8 are time charts showing the operation of the phase shift detection circuit 140. As shown in FIG. 7, the phase of the waveform of Do in (b) is (a).
, The Q and QB signals output from the RS flip-flop 141 are as shown in FIG.
(C) and (d). As a result, no signal is output from the NOR gate 142, and the charging signal Cs1 is output from the NOR gate 143. When the waveform of Do in (b) is delayed from the waveform of Ds in (a) as shown in FIG. 8, the Q and QB signals output from the RS flip-flop 141 are (c) in FIG. , (D). As a result, no signal is output from the NOR gate 143, and a discharge signal Ds1 is output from the NOR gate 142.

The phase difference-to-voltage conversion circuit 150 uses the charge signal Cs1 and the discharge signal Ds1 output from the phase shift detection circuit 140 to output the capacitor 1
53 is charged or discharged, and the phase shift information is converted into voltage information. That is, when the phase of the reception signal Vo is ahead of the phase of the reference signal Vs, the analog switch 151 is turned on at the timing of the "H" of the charging signal Cs1, and the capacitor 153 is charged. As a result, the voltage value of the phase adjustment data Pc, which is the output from the phase difference / voltage conversion circuit 150, increases. Further, the phase of the reception signal Vo is equal to the reference signal Vs.
, The discharge signal Ds1
The "H" timing turns on the analog switch 152 to discharge the capacitor 153. As a result,
The voltage value of the phase adjustment data Pc decreases.

The phase adjustment circuit 74 is composed of two phase shift circuits composed of operational amplifiers, each composed of a 90 ° phase delay circuit and a 90 ° phase advance circuit.
The phase shift amount is 0 ° as a whole. Here, by adding the variable resistor 111, which is a voltage control type resistor, to the circuit constant of the preceding phase delay circuit, the voltage from the phase adjustment circuit 74 is output according to the voltage value of the phase adjustment data Pc applied to the phase adjustment circuit. It is possible to change the phase of the received signal in both the positive and negative directions around 0 °.

The resistance value of the variable resistor 111 changes depending on the value of the voltage applied from the outside. The change has a negative gradient, that is, the resistance value decreases as the voltage value increases, and the resistance value increases as the voltage value decreases. In the case of using the characteristic, when the voltage of the phase adjustment data Pc increases, the phase of the output of the phase adjustment circuit 74 advances, and conversely, when the voltage decreases, the output delays. Therefore, when the phase of the reference signal Vs is ahead of the received signal Vo, the potential of the phase adjustment data Pc increases, and as a result, the phase adjustment circuit 7
4 delays the phase of the AC signal AC, so that the phase difference between the reference signal Vs and the received signal Vo matches. Further, when the phase of the reference signal Vs lags behind the reception signal Vo, the potential of the phase adjustment data Pc decreases, and as a result, the phase adjustment circuit 74 sets the AC signal A
In order to advance the phase of C, the phase difference between the reference signal Vs and the received signal Vo matches.

In the control system for matching the reference signal Vs and the received signal Vo, the difference between the amplitudes of the respective signals does not matter. That is, when the waveform shaping circuit 130 shapes the reference signal Vs and the received signal Vo into a rectangular wave, the use of a zero-cross comparator circuit makes it possible to detect a phase difference independent of the signal amplitude.

The difference detection circuit 160 is a circuit for subtracting one of two input signals from the other. Here, the reference signal Vs is used as a subtracted signal, and the received signal Vo is used as a subtracted signal. Here, the difference detection circuit 160 outputs the reference signal Vs and the reception signal Vo.
Is a sine wave having the same phase, a sine wave having a difference is output.

The synchronous signal detecting circuit 170 constitutes a synchronous rectifier using an operational amplifier. The difference signal output from the difference detection circuit 160 can detect the absolute value of the difference between the reference signal Vs and the reception signal Vo only by the amplitude value, but cannot determine whether the difference is positive or negative. However, if the phase for detecting the amplitude of the differential signal is fixed, the reference signal V
The magnitude relationship between s and the received signal Vo can be determined.

FIGS. 9 and 10 are waveform diagrams showing the operation of the difference detection circuit 160 and the synchronization signal detection circuit 170. FIG. 9 shows the case where Vs> Vo, and FIG. 10 shows the case where Vs <Vo. In the case of FIG. 9, since the magnitude relationship between the reference signal Vs and the received signal Vo is Vs> Vo, the difference signal output from the difference detection circuit 160 has the waveform shown in FIG. The synchronization signal detection circuit 170 passes the signal only at the timing when the control signal in FIG. 9D is "H", so that the output has the waveform in FIG. In the case of FIG. 10, since the magnitude relationship between the reference signal Vs and the reception signal Vo is Vs <Vo, the difference detection circuit 16
The differential signal which is the output of 0 has the waveform shown in FIG. 10C, and the output of the synchronization signal detection circuit 170 has the waveform shown in FIG.

The output from the synchronizing signal detecting circuit 170 is converted by a low-pass filter 180 into a DC voltage Dc having a positive / negative sign, and further converted by a DC converting circuit 190 into amplitude difference data Sc which is a DC signal having only a positive sign. You. The input of the DC conversion circuit 190 is the reference signal V
This is a DC signal that changes to a positive or negative potential depending on the magnitude relationship between s and the amplitude of the reception signal Vo. When a sine wave is shaped by the comparator 191 using this signal as a reference potential, as shown in FIG. 11A, when the DC voltage Dc is positive, the output of the comparator 191 is shown in FIG.
become. The output of the NOR gate 192 to which the signal of (b) of FIG. 11 and the signal of Ds of (c) of FIG. 11 are input becomes the charging signal Cs2 of (2) of FIG. As shown in FIG. 12A, when the DC voltage Dc is negative, the output of the comparator 191 becomes as shown in FIG. The output of the NOR gate 193 to which the signal of (b) of FIG. 12 and the signal of Ds of (c) of FIG. 12 are input becomes the discharge signal Cs2 of (e) of FIG.

When the amplitude of the reference signal Vs is larger than the amplitude of the received signal Vo, the discharge signal Ds2 turns on the analog switch 195 and discharges the capacitor 196. As a result, the voltage value of the amplitude difference data Sc output from the DC conversion circuit 190 decreases. Conversely, the reference signal Vs
Is smaller than the amplitude of the reception signal Vo, the analog switch 194 is turned on by the charging signal Cs2,
The capacitor 196 is charged. As a result, the voltage value of the amplitude difference data Sc output from the DC conversion circuit 190 increases.

The amplitude adjusting circuit 75 is an inverting amplifier using the same voltage-controlled variable resistor 121 as that used in the phase adjusting circuit 74 for the input resistance. Therefore, the amplification factor of the amplitude adjustment circuit 75 increases when the potential of the amplitude difference data Sc increases, and decreases when the potential decreases. Therefore, when the amplitude of the reference signal Vs is larger than the reception signal Vo, the amplification factor of the amplitude adjustment circuit 75 decreases, and as a result, the amplitude of the reference signal Vs decreases. Conversely, when the amplitude of the reference signal Vs is smaller than the reception signal Vo, the amplification factor of the amplitude adjustment circuit 75 increases, and as a result, the reference signal Vs
Decrease in amplitude. As a result, the amplitude of the reference signal Vs and the amplitude of the received signal Vo match.

[0037]

As described above, according to the present invention, a change in a signal caused by a change in the surrounding environment or a change in the circuit characteristics of a fixed facility over time is corrected by a correction circuit, and the output of the subtraction circuit is corrected. Is always output. Therefore, the amplification factor of the subsequent amplifier can be set high, and sufficient data can be recognized even for a small signal from the data carrier. In other words, this means an increase in the communication distance between the data carrier and the fixed facility, and the use of the data carrier system of the present invention expands the application range to fields that cannot be used with conventional communication performance. Can be done. In addition, since the adjustment of the voltage adjustment circuit is not required, adjustment for operation when actually operating the data carrier system,
Maintenance load can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a circuit configuration of a data carrier system of the present invention.

FIG. 2 is a more detailed block diagram showing the fixed facility of the present invention.

FIG. 3 is a waveform chart showing the operation of the subtraction circuit 8;

FIG. 4 is a waveform chart showing the operation of the amplifier circuit 9 when the voltage adjustment circuit 7 is adjusted to the best condition.

FIG. 5 is a waveform diagram illustrating an operation of the amplifier circuit when the adjustment of the voltage adjustment circuit is broken.

FIG. 6 is a circuit diagram showing a circuit configuration of a phase difference detection circuit 76 and an AC signal adjustment circuit 71 of the data carrier system of the present invention.

FIG. 7 is a time chart illustrating an operation of the phase detection circuit 140 when the phase of the waveform of the reception signal Vo is ahead of the reference signal Vs.

FIG. 8 is a time chart illustrating an operation of the phase detection circuit 140 when the phase of the waveform of the received signal Vo is delayed with respect to the reference signal Vs.

FIG. 9 is a waveform chart showing an operation of the synchronization signal detection circuit 170 when the amplitude of the waveform of the reference signal Vs is larger than the reception signal Vo.

FIG. 10 is a waveform chart showing the operation of the synchronization signal detection circuit 170 when the amplitude of the waveform of the reference signal Vs is smaller than the reception signal Vo.

FIG. 11 is a waveform diagram showing an operation of the DC conversion circuit 190 when the amplitude of the waveform of the reference signal Vs is larger than the received signal Vo.

FIG. 12 is a waveform chart showing an operation of the DC conversion circuit 190 when the amplitude of the waveform of the reference signal Vs is smaller than the received signal Vo.

FIG. 13 is a block diagram showing a circuit configuration for signal detection in a fixed facility of the data carrier system of the prior application.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 oscillator 2 switch 3 modulation circuit 4 antenna drive circuit 5 IV conversion circuit 6 antenna 7 voltage adjustment circuit 8 subtraction circuit 9 amplification circuit 10 synchronous rectification circuit 11 phase adjustment circuit 12 low-pass filter 13 differentiation circuit 14 gate circuit 15 waveform shaping circuit Reference Signs List 16 data carrier 17 information processing circuit 71 AC signal adjustment circuit 72 phase difference detection circuit 73 amplitude difference detection circuit 74 phase adjustment circuit 75 amplitude adjustment circuit 76 signal difference detection circuit

Claims (2)

(57) [Claims] 1. A data carrier system comprising a data carrier for performing bidirectional communication by electromagnetic coupling and a fixed facility, wherein the fixed facility includes an AC signal generating means for generating an AC signal, and the AC signal as an AC magnetic field. An antenna for transmitting, reception signal detecting means for detecting an antenna current including a change generated by the data carrier changing an AC magnetic field transmitted from the antenna as a reception signal, and adjusting an amplitude of the AC signal. Detecting a difference in amplitude between the received signal and the reference signal in a data carrier system comprising: an AC signal adjustment circuit that outputs a reference signal by using a subtraction circuit that extracts a difference signal between the received signal and the reference signal as a data signal. And an amplitude difference detection circuit that outputs amplitude difference data. A data carrier system wherein the amplitudes of a received signal and a reference signal are matched. 2. A phase difference detection circuit for detecting a phase difference between the received signal and a reference signal and outputting phase adjustment data, a phase adjustment circuit provided in the AC signal adjustment circuit, 2. The data carrier system according to claim 1, wherein the phase of the received signal and the reference signal are matched by the phase adjustment data.