JP3199990B2 - Information processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus having a failure recovery mechanism based on a checkpoint restart method, and more particularly to processing an I / O request to a peripheral device more quickly while ensuring fault tolerance. The present invention relates to an information processing apparatus capable of performing such operations.

[0002]

2. Description of the Related Art In recent years, information processing apparatuses have undergone tremendous development, and with the development thereof, higher fault tolerance has been required. As an information processing device that realizes such fault tolerance, there is an information processing device having a failure recovery mechanism based on a checkpoint restart method.

In an information processing apparatus having a failure recovery mechanism based on a conventional checkpoint restart method, an input / output request to a peripheral device connected to the information processing apparatus can be retried at the time of failure recovery. In addition, a failure recovery function is realized by synchronizing with a checkpoint process in the processor and holding a history of the input / output requests in a memory. For this reason, conventionally, the timing at which the checkpoint is obtained has had a great influence on the input / output processing performance of the information processing apparatus.

[0004] The timing for acquiring the checkpoint is generally at the time of a cache overflow of the processor or at a predetermined time preset in the system. Therefore, when compared with the input / output processing performance of an information processing apparatus using a normal non-checkpoint method, there is a problem that each input / output request waits until these checkpoints are acquired, thereby deteriorating the performance. Was.

[0005]

As described above, in an information processing apparatus having a failure recovery mechanism based on the conventional checkpoint restart method, the issuance of an I / O request to a peripheral device waits until the next checkpoint is acquired. Therefore, there is a problem that the input / output processing performance of the information processing apparatus based on the non-checkpoint method is inferior to the input / output processing performance.

[0006] The present invention has been made in view of such circumstances, and dynamically performs checkpoint acquisition according to the load status of each peripheral device when an input / output request occurs. It is an object of the present invention to provide an information processing apparatus capable of dramatically improving input / output performance with respect to peripheral devices without impairing a failure recovery function by a restart method.

[0007]

An information processing apparatus according to the present invention is an information processing apparatus having a failure recovery mechanism based on a checkpoint restart method .
Record I / O requests to peripheral devices generated by the processor.
Input / output management means for recording and managing, and controlling the peripheral device
That is connected to the peripheral controller and an input-output control unit which measures the load status of each of the peripheral controller, the input-output system the output request that is managed by the output management means
And output issuing means for issuing to the peripheral controller via the control device, and checkpoint acquisition means for acquiring a checkpoint cache contents and register before Kipu processor to reflect the memory, from the processor <br/> When the input / output request occurs, the input / output control device
Peripheral control with reference to the load condition measured by
The device determines whether or not the device is ready to process the input / output request immediately.When it is determined that the device is ready to process the input / output request, a checkpoint is obtained by the checkpoint obtaining means, The input / output request is issued by the issuing means to the peripheral control device via the input / output control device.
And characterized by being provided with input and output control means for issuing immediately relative location.

In the information processing apparatus according to the present invention, when the input / output control means determines that the peripheral control device is not in a state where it can immediately process the input / output request, the measurement is performed by the input / output control device. Calculating the time until the peripheral control device can process the input / output request from the load status of the peripheral control device, and obtaining a checkpoint by the checkpoint obtaining means after the elapse of the calculated time; The apparatus further comprises means for issuing the input / output request to the peripheral control device via the input / output control device.

Further, the information processing apparatus of the present invention is characterized in that
The force controller responds to the input / output request by
The load state of the edge control device is added and the information is transferred to the processor .

According to the information processing apparatus of the present invention, when the processor issues an input / output request to a peripheral device, the input / output control means causes the peripheral control device to process the input / output request.
Surrounding control location instantly whether the output request to the possible processing conditions, managed by the input-output control unit
The determination is made with reference to the load status of the device .

If the peripheral controller immediately determines that the input / output request can be processed,
The input / output control means first obtains a checkpoint by the checkpoint obtaining means, and then sends the input / output request to the peripheral device which is the request destination .
And via the peripheral controller .

That is, when a peripheral controller that processes an I / O request issued by a processor can process the I / O request immediately, a checkpoint is dynamically acquired at that time, and the I / O request is immediately sent to the peripheral controller. Issue to

As a result, an input / output request can be processed without waiting for the next checkpoint acquired at a predetermined timing (for example, at the time of the above-described cache overflow of the processor) as in the related art.

On the other hand, if the peripheral controller determines that the I / O request cannot be processed immediately, the I / O controller firstly executes the load condition of the peripheral controller managed by the I / O controller. From the time until the peripheral control device can process the input / output request.
As a method of calculating this time, for example, the time may be calculated from the number of input / output requests waiting to be processed and the average processing time per input / output request of the peripheral control device .

After the calculated time has elapsed, the input / output control means obtains a checkpoint by the checkpoint obtaining means, and inputs / outputs the input / output request.
Issued to the peripheral control device via the control device .
As a result, appropriate and quick input / output processing can be performed in consideration of the load status of the peripheral control device .

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram illustrating the overall configuration of the computer system according to the embodiment.

As shown in FIG. 1, in the information processing apparatus according to the embodiment, a processor 1, a memory 2, and an input / output control device 4 are connected via a system bus 3. The input / output control device 4 is further connected to a peripheral control device 6 via an input / output bus 5. The peripheral control device 6 is connected to a peripheral device controlled by the peripheral control device 6. 7 is connected.

On the processor 1, an input / output management unit 1
1, input / output control unit 12, checkpoint acquisition unit 13,
Each processing unit of the failure recovery unit 14 operates, and the cache memory 15 provided in the processor 1 stores the processor 1
An I / O request reservation table 16 for storing the I / O requests to the peripheral device 7 generated by the above is set.

In the memory 2, a peripheral control device load status table 21 for storing the load status of the peripheral control device 6 is set for each of the peripheral control devices 6. The unit 41 operates.

The input / output management unit 11 records and manages input / output requests to the peripheral device 7 generated by the processor 1 in an input / output request holding table 16. Also, the input / output control unit 1
2 is notified from the peripheral control device input / output unit 41 of the input / output control device 4 and, based on the information indicating the load status of the peripheral control device stored in the peripheral control device load information table 21, the pending input It is determined whether an I / O request including an output request is immediately issued to the I / O controller (whether the peripheral controller is in a status capable of immediately processing the I / O request), and the I / O request is determined. When it is determined that the I / O request should be issued immediately, the I / O request is issued to the I / O controller 4 after the checkpoint is acquired by the checkpoint acquisition unit 13. At this time, if an input / output request already held in the input / output request holding table 16 exists, the request is issued including this.

The checkpoint acquisition unit 13 writes the contents of the cache and the register of the processor 1 and the input / output request for the peripheral device recorded by the input / output management unit 11 to the memory 2. Further, the failure recovery unit 14
When a failure occurs in the computer system, a failure recovery process is performed from the data written to the memory 2 by the checkpoint acquisition unit 13 and the contents of the register.

On the other hand, the peripheral control unit input / output unit 41 of the input / output control unit 4 performs an operation on the peripheral control unit 6 based on the input / output request issued by the input / output control unit 12, and Measure the load situation of 6,
The measured load information is returned to the peripheral control device load information table 21 on the memory 2 as one of additional information of the input / output response to the input / output request from the input / output control unit 12.

The input / output request holding table 16
Are provided for each peripheral control device, and input / output requests for each peripheral control device are individually managed in these individual tables. Further, the peripheral control device input / output unit 41 also exists corresponding to each peripheral control device 6, and measures the load status of each peripheral control device 6, respectively.

FIG. 2 shows the contents of the input / output request suspension table 16 according to the embodiment. As shown in FIG. 2, the input / output request holding table 16 stores input / output commands for the peripheral controller 6, entries including information such as data addresses on the memory 2 for the input / output requests, and empty entry pointers. Be composed. When the entry of the I / O request to be held cannot be accommodated, a checkpoint is acquired by the checkpoint acquisition unit 13 at that time, and the I / O control unit 12 issues an I / O request to the I / O control device 4. Is done.

FIG. 3 shows the contents of the peripheral control device load status table 21 according to the embodiment. As shown in FIG. 3, the peripheral control device load status table 21 includes parameters indicating the load status of the peripheral control device 6 managed by the peripheral control device input / output unit 41 (for example, the length of the input / output queue, Information including parameters converted from the average waiting time required for individual input / output requests, an entry including information such as the time when the parameter indicating the load status is recorded in the peripheral control device load information table 21, and an empty entry. It is composed of a pointer and the like, and is used as a ring buffer.

Next, the operation of this embodiment will be described with reference to FIG. In the information processing apparatus of the embodiment, when the processor 1 generates an input / output request for the peripheral device 7 (step S1 in FIG. 4), the input / output management unit 11 executes the input / output request on the peripheral device 7 Is recorded in the input / output request suspension table 16 corresponding to the peripheral control device 6 that controls (step S2 in FIG. 4).

Next, the input / output control unit 12 refers to the peripheral control device load status table 21 corresponding to the peripheral control device 6 in the memory 2 and calculates a parameter indicating the load status relating to the peripheral control device and the current time. , The peripheral control device 6
Determines whether or not is ready to process this input / output request (step S3 in FIG. 4).

Here, when the peripheral control device 6 determines that the input / output request is not ready to be processed immediately (FIG. 4).
(N in step S3), the input / output control unit 12 suspends the input / output request (step S4 in FIG. 4). The suspended input / output request is processed together with the normal checkpoint acquisition timing (step S5 in FIG. 4) or the input / output request processing for another input / output request generated after the generation of the input / output request. Become.

On the other hand, when the peripheral controller 6 determines that the input / output request can be processed immediately (Y in step S3 in FIG. 4), the input / output controller 12 A checkpoint is acquired and the input / output request is issued to the input / output control device (step S6 in FIG. 4). Then, the peripheral controller input / output unit 41 that has received the input / output request issues an input / output request to the peripheral controller 6 (step S7 in FIG. 4).

The peripheral control device input / output unit 41 measures the load status of the peripheral control device 6 (the length of the input / output queue, the average waiting time required for individual input / output requests, etc.). When returning a response to the output request to the processor 1 and the memory 2, the measured load status is returned as one of the additional information of the response (step S8 in FIG. 4). This load status is stored in the peripheral control device load status table 21 of the memory 2.

Therefore, if the peripheral control device 6 that processes the input / output request issued by the processor 1 can process immediately, a checkpoint is dynamically acquired at that time,
The I / O request is immediately issued to the peripheral controller 6 that processes the I / O request , so that the performance of the I / O to the peripheral controller 6 can be significantly improved without impairing the failure recovery function by the checkpoint restart method. it can.

As a process of the suspended input / output request, a time until the peripheral control device 6 can process the input / output request is calculated from a parameter indicating a load status of the peripheral control device 6. It is also effective to acquire a checkpoint by the checkpoint acquisition unit 13 after the calculated time has elapsed and issue the input / output request to the input / output control device 4 , whereby the load status of the peripheral control device 6 is reduced. Considerable and prompt input / output processing can be performed.

As described in detail above, according to the information processing apparatus of the present invention, in the information processing apparatus having the failure recovery mechanism based on the checkpoint restart method, the peripheral control device
Together to dramatically improve the performance of input and output relating to location, it becomes possible to construct a highly reliable system.

[Brief description of the drawings]

FIG. 1 is a diagram showing a schematic configuration of an information processing apparatus according to an embodiment of the present invention.

FIG. 2 is an exemplary view showing the configuration of an input / output hold table according to the embodiment;

FIG. 3 is an exemplary view showing the configuration of a peripheral control device load information table according to the embodiment;

FIG. 4 is a flowchart for explaining the operation of the embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Processor, 2 ... Memory, 3 ... System bus, 4 ...
Input / output control device, 5: input / output bus, 6: peripheral control device,
7 peripheral device, 11 input / output management unit, 12 input / output control unit, 13 checkpoint acquisition unit, 14 failure recovery unit, 15 cache memory, 16 input / output request pending table, 21 peripheral control device Load status table, 41 ...
Peripheral control device input / output unit.

Claims (3)

(57) [Claims] 1. An information processing apparatus having a failure recovery mechanism based on a checkpoint restart method, comprising: an input / output management unit that records and manages an input / output request to a peripheral device generated from a processor of the information processing apparatus; An input / output control device that is connected to a peripheral control device that controls a peripheral device and measures the load status of each of the peripheral control devices; and the input / output request managed by the input / output management unit is transmitted through the input / output control device. An input / output issuing unit for issuing to the peripheral control device, a checkpoint acquiring unit for acquiring a checkpoint by reflecting the contents of a cache and a register of the processor in a memory, and generating the input / output request from the processor. When you do
With reference to the load status measured by the input / output control device, it is determined whether or not the peripheral control device is ready to process the input / output request, and it is determined that the peripheral control device is ready to process the input / output request. Input / output control for obtaining a checkpoint by the checkpoint obtaining means and immediately issuing the input / output request to the peripheral control device via the input / output control device by the input / output issuing means. And an information processing apparatus. 2. The load status of the peripheral control device measured by the input / output control device, when the input / output control means determines that the peripheral control device is not in a state capable of immediately processing the input / output request. Calculates the time until the peripheral controller becomes able to process the input / output request, obtains a checkpoint by the checkpoint obtaining means after the calculated time has elapsed, and transmits the input / output request to the input / output request. 2. The information processing apparatus according to claim 1, further comprising means for issuing to the peripheral control device via a control device. 3. The apparatus according to claim 1, wherein the input / output control device adds a load status of the peripheral control device to a response to the input / output request and transfers the response to the processor.
An information processing apparatus according to claim 1.