JP3197291B2 - TAB package - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a TAB (Tape Automated) of a package of a semiconductor integrated circuit device (hereinafter referred to as an IC).
Bonding) type mounting body.

[0002]

2. Description of the Related Art In a TAB mounting body, a tape carrier on which an IC chip is mounted has an inner lead for connecting the IC chip to a flexible polyimide or other base film and an outer lead for connecting to an external circuit. A device hole for connecting an IC chip is formed in a region where the lead is provided. TAB
In the mounted body, the inner leads are thermocompression-bonded to the bumps of the bonding pads of the IC chip by a bonding tool to simultaneously connect all the inner leads for one IC chip. FIG. 5 shows an example of the TAB mounting body. An inner lead 6 is formed on the tape carrier 2 so as to protrude from the outer lead and the device hole 4. The IC chip 8 is mounted in the device hole 4 by thermocompression bonding between the bump of the bonding pad and the inner lead 6. Reference numeral 10 denotes a hole for transferring the tape carrier by a sprocket.

[0003] In the TAB package, since the base film is a flexible film, stress acts on the inner leads. For this reason, there may be a problem in reliability such that the inner leads connected to the IC chip, particularly the inner leads connected to the bumps at the corners of the IC chip are cut. As a method of preventing the bonding failure between the IC chip and the inner lead, a method of not making the shape of the inner lead straight or a method of bending the inner lead are adopted.

[0004]

On the other hand, in the inner bonding step in TAB mounting, a short circuit may occur when the inner leads are shifted from the corresponding bump positions of the IC chip. Since the bonding process of TAB mounting is automated, it is difficult to detect even if a continuous deviation occurs due to, for example, erroneous recognition under a certain condition. Therefore, there is a problem that a large number of defective products are generated.

SUMMARY OF THE INVENTION It is an object of the present invention to prevent continuous occurrence of defective products due to a short circuit due to a displacement between a bump of an IC chip and an inner lead.

[0006]

According to the present invention, in order to prevent the continuous occurrence of defective products due to a short circuit, the present invention provides a dummy bump for detecting a short circuit on an array of bumps on a surface of an IC chip on which bonding pad bumps are formed. And its I
As an inner lead connected to the C chip, a short lead detecting dummy lead connected to the dummy bump is provided in addition to the inner lead connected to the bump of the bonding pad to form an electric circuit. It is preferable that the interval between the short-circuit detection dummy lead and the inner lead adjacent thereto is set smaller than the pitch of the inner leads forming the electric circuit. Further, it is preferable to provide two or more short-circuit detection dummy leads in one IC chip in different directions.

FIG. 1 shows a reference example for improving the reliability of bonding between an IC chip and inner leads. Reference numeral 12 denotes a base film of the tape carrier, which is made of, for example, a polyimide film. The base film 12 is provided with a device hole 14 as an opening for mounting an IC chip. The tape carrier leads include an inner lead 16 projecting into the device hole, and an inner lead 16.
And an outer lead connected to the outside of the tape carrier. The inner leads 16 are arranged along the four sides of the device hole 14, and one end is provided at the end of each arrangement.
A dummy lead 18 for each book is provided. The dummy lead 18 does not constitute an electric circuit, but absorbs stress at the time of bonding. The inner lead 16 for electric circuit and the dummy lead 18 are made of the same material and are formed simultaneously.

Reference numeral 20 denotes an I mounted on the tape carrier.
It is a C chip, in which a bump 22 of an electric circuit bonding pad connected to the inner lead 16 and a dummy bump 24 connected to the dummy lead 18 are formed. The bumps 24 are connected to the dummy leads 18 to absorb stress at the time of bonding, and do not constitute an electric circuit. The dummy bumps 24 are arranged at corners of the IC chip 20.

As shown in FIG. 1, the dummy bumps 24 are provided at the corners of the IC chip 20, and the dummy leads 18 to be bonded thereto are provided on the tape carrier. The load on the inner lead 16 for the electric circuit is reduced, and the reliability of cutting the inner lead is improved.

Further, since the inner leads and the bumps of the IC chip are connected by the collective bonding method, if the bonding tool and the bump surface of the IC chip and the plane of the inner leads are not always parallel, the inner leads and the bumps may be connected. It causes a bonding failure that is not joined. Therefore, by providing the dummy bumps 24 and the dummy leads 18 connected to the corners of the IC chip as shown in FIG. 1, the parallelism of the bonding tool can be easily managed. In other words, if the parallelism of the bonding tool goes out of order, the dummy leads connected to the dummy bumps at the corners of the IC chip cause bonding failures first. Therefore, if the bonding state of the dummy leads is managed, the bonding of the inner leads for the electric circuit is managed. can do. Even if the bonding failure between the dummy lead and the dummy bump occurs, there is no relation to the original electric circuit, so that the parallelism of the bonding tool can be corrected or adjusted before the bonding failure forming the electric circuit occurs. .

[0011]

FIG. 2 shows an embodiment having a dummy lead and a dummy bump for detecting a short circuit. (A) shows a state where an IC chip is mounted on a tape carrier, and (B) shows an arrangement of inner leads of the tape carrier. In FIG.
Outer leads and inner leads are provided on the base film 32 of the tape carrier, and the inner leads 36 are formed so as to project into the device holes 34. The inner leads 36 are arranged at regular intervals in each arrangement, and dummy leads 38 for detecting a short circuit are formed at the ends of the arrangement at intervals smaller than the pitch of the arrangement. Device hole 34
The IC chip 40 is mounted inside the IC chip 4.
At 0, bonding pad bumps 42 and 44 are formed corresponding to the positions of the inner lead 36 and the dummy lead 38. The bump 42 is connected to the inner lead 36 to form an electric circuit.
Are short-circuit detection bumps connected to the dummy leads 38. Reference numeral 39 denotes a hole for transferring the tape carrier by a sprocket. Assuming that the pitch of the inner leads 36 necessary for the electric circuit is, for example, 100 μm as shown in FIG.
Dummy lead 38 and inner lead 36 adjacent thereto
Is set to a value smaller than the pitch of 100 μm.

As shown in FIG. 3, when the IC chip and the tape carrier are correctly aligned and bonded, no short circuit occurs as shown in FIG. However, when the bonding is performed with the position shifted, the dummy lead 38 and the inner lead 36 are short-circuited via the bump 42 as shown in FIG. Therefore,
By detecting this short circuit and feeding it back to the positioning device for the tape carrier and the IC chip, it is possible to prevent the short circuit from occurring continuously.

In only one place, the dummy lead 38 for detecting a short circuit and the dummy bump 44 of the IC chip may cause relative rotation between the IC chip and the tape carrier and displacement in an arrangement direction different from the arrangement in which the dummy lead is provided. Since it cannot be detected, it is preferable to provide two or more dummy leads and dummy bumps in different directions.

(Reference Example) FIG. 4A shows a reference example for absorbing the stress of the tape carrier and improving the reliability of the bonding of the inner leads. The most common defect in TAB bonding is floating of the inner leads. In particular, the lift is large at both ends of the arrangement of the inner leads (that is, the inner leads connected to the bumps at the corners of the IC chip).
The cause is that the tape itself flexes due to the bonding of the inner lead and the outer lead because the flexible polyimide film etc. is used as the base film of the tape carrier, and the stress acts most on both ends of the inner lead arrangement. Because you do. Therefore, in the reference example of FIG. 4, an electrically floating island-shaped conductor dummy pattern 58 is provided around the device hole 54 in order to reduce the stress acting on the inner lead. The dummy pattern 58 may be located in the vicinity of the device hole 54, but is preferably disposed at the four corners of the device hole 54 where stress acts greatly. 52 is a base film, 56 is an inner lead, and 62 is a hole for transferring the tape carrier by a sprocket.

The island pattern 58 in FIG. 4A is made of the same material as the electrode pattern such as the inner lead 56. More specifically, the island pattern 58 is formed simultaneously with the electrode pattern using an electric field copper foil. is there. The island pattern 58 is
If the bonding tool is formed in a region where the bonding tool hits, it will hinder the bonding. Therefore, as shown in FIG. 4B, a notch 60 is formed in the island-shaped pattern 58 in the region where the bonding tool is pressed. Is provided.

In the above description, the tape carrier is provided with the dummy leads 18, 38 and the dummy pattern 58 in addition to the inner leads and outer leads required for the electric circuit, but all the conductor patterns on the tape carrier are formed in the same step. Can be manufactured. Specifically, it is manufactured by the following manufacturing process. After forming an opening of a device hole in a base film such as a polyimide with a mold, an adhesive is applied to the base film and an electric field copper foil is attached. As the adhesive, for example, an epoxy-based adhesive is used. The back side of the opening is filled with a resist, and the copper foil on the front side is patterned by photolithography and etching. In this step, dummy leads and dummy patterns are simultaneously formed in addition to the outer leads and inner leads required for this step. The resist on the front side for patterning and the resist on the back side filling the opening are both removed. After that, the conductor pattern is subjected to electroless plating such as tin or solder. The method of mounting an IC chip on a tape carrier in the present invention is the same as the conventional method, and sealing with a resin or the like can be performed as in the conventional method.

[0017]

According to the first to third aspects of the present invention, continuous occurrence of short circuits due to misalignment between the IC chip and the tape carrier can be prevented, work efficiency is improved, and manufacturing cost is reduced.

[Brief description of the drawings]

FIG. 1 is a plan view showing the vicinity of an IC chip of a reference example.

FIGS. 2A and 2B are diagrams showing an embodiment including a dummy lead and a dummy bump for preventing short circuit, FIG. 2A is a plan view, and FIG. 2B is a partially enlarged view showing an inner lead arrangement.

FIG. 3 is a main part plan view showing the operation of the embodiment in FIG. 2;

FIG. 4 is a view showing a reference example, (A) is a schematic plan view,
(B) is a partial plan view showing a cutout portion of the dummy pattern.

FIG. 5 is a schematic plan view showing a conventional TAB package.

[Explanation of symbols]

 12, 32, 52 Base film 14, 34, 54 Device hole 16, 36, 56 Inner lead 18, 38 Dummy lead 20, 40 IC chip 22, 42 Bump for electric circuit 24, 44 Dummy bump

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-4-127445 (JP, A) JP-A-4-188740 (JP, A) JP-A-63-124433 (JP, A) JP-A-62-1987 113459 (JP, A) JP-A-1-111344 (JP, A) JP-A-2-155248 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/60 311

Claims (3)

(57) [Claims] 1. A semiconductor integrated circuit device chip in which a dummy bump for detecting a short circuit is formed on an array of bumps on a surface on which a bonding pad bump is formed, and an inner lead connected to the semiconductor integrated circuit device chip. A TAB package comprising: a tape carrier having dummy leads connected to the dummy bumps in addition to the inner leads connected to the bumps of the bonding pads to form an electric circuit. 2. The TAB package according to claim 1, wherein a distance between the dummy lead and an inner lead adjacent to the dummy lead is smaller than a pitch of an inner lead forming an electric circuit. 3. The TAB package according to claim 1, wherein two or more dummy leads are provided in one semiconductor integrated circuit device chip in different directions.