JP3194310B2 - Antenna switch circuit - Google Patents
Antenna switch circuitInfo
- Publication number
- JP3194310B2 JP3194310B2 JP05381893A JP5381893A JP3194310B2 JP 3194310 B2 JP3194310 B2 JP 3194310B2 JP 05381893 A JP05381893 A JP 05381893A JP 5381893 A JP5381893 A JP 5381893A JP 3194310 B2 JP3194310 B2 JP 3194310B2
- Authority
- JP
- Japan
- Prior art keywords
- antenna
- reception
- turned
- system circuit
- transmission
- Prior art date
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- Variable-Direction Aerials And Aerial Arrays (AREA)
- Transceivers (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、通信機のアンテナスイ
ッチ回路に関する。The present invention relates to an antenna switch circuit of communication machine.
【0002】[0002]
【従来の技術】図2はTDD(時分割複信)方式におけ
るディジタル移動帯通信端末機の構成を概略的に示すも
のである。同図において、1は送受信用のアンテナ、2
はアンテナ1を送信系回路側または受信系回路側のいず
れかに切り換え設定するためのアンテナスイッチ回路
(その構成は図3により後述する)である。2. Description of the Related Art FIG. 2 schematically shows a configuration of a digital mobile band communication terminal in a TDD (time division duplex) system. In the figure, 1 is a transmitting / receiving antenna, 2
Is an antenna switch circuit for switching and setting the antenna 1 to either the transmission system circuit side or the reception system circuit side (its configuration will be described later with reference to FIG. 3).
【0003】上記アンテナスイッチ回路2の受信系回路
側端子RXには、受信帯域通過フィルタ(以下、BPF
という)3が接続され、その後段には受信低雑音増幅器
(以下、LNAという)4が接続されている。そして、
このLNA4を通過した受信信号は受信部へと送られ
る。[0005] A reception band-pass filter (hereinafter referred to as a BPF) is provided at a reception circuit side terminal RX of the antenna switch circuit 2.
), And a receiving low-noise amplifier (hereinafter, LNA) 4 is connected to the subsequent stage. And
The received signal that has passed through the LNA 4 is sent to the receiving unit.
【0004】また、アンテナスイッチ2の送信系回路側
端子TXには、低域通過フィルタ(以下、LPFとい
う)5が接続され、その後段には送信電力増幅器(以
下、PAという)6が接続されている。そして、送信部
からの送信信号がこれらPA6、LPF5を通過してア
ンテナ1より発信させられるようになっている。[0004] A low-pass filter (hereinafter, referred to as LPF) 5 is connected to a transmission circuit side terminal TX of the antenna switch 2, and a transmission power amplifier (hereinafter, referred to as PA) 6 is connected to a subsequent stage. ing. Then, a transmission signal from the transmission unit passes through the PA 6 and the LPF 5 and is transmitted from the antenna 1.
【0005】このようなディジタル移動帯通信端末にお
いて、アンテナスイッチ回路2は、従来、図3のような
構成となっていた。図3において、Aはアンテナ1が接
続される端子であり、この端子Aと上記受信系回路側端
子RXとの間にはスイッチング素子として、例えば電界
効果トランジスタ(以下、FETという)11が接続さ
れ、また、受信系回路側端子RXと接地間にはFET1
2が接続されている。In such a digital mobile band communication terminal, the antenna switch circuit 2 has conventionally been configured as shown in FIG. In FIG. 3, A is a terminal to which the antenna 1 is connected, and a field effect transistor (hereinafter, referred to as FET) 11 as a switching element is connected between the terminal A and the receiving system side terminal RX. An FET1 is provided between the receiving circuit side terminal RX and the ground.
2 are connected.
【0006】一方、端子Aと上記送信系回路側端子TX
との間にはFET13が接続され、また、送信系回路側
端子TXと接地間にはFET14が接続されている。そ
して、上記FET11のゲ−ト端子Gには抵抗R1を介
して受信モ−ド信号C1が入力され、FET14のゲ−
ト端子Gには抵抗R4を介して受信モ−ド信号C1が入
力されるようになっている。また、上記FET12のゲ
−ト端子Gには抵抗R2を介して送信モ−ド信号C2が
入力され、FET13のゲ−ト端子Gには抵抗R3を介
して送信モ−ド信号C2が入力されるようになってい
る。On the other hand, a terminal A and the transmission system circuit side terminal TX
An FET 13 is connected between the terminal and the transmission system circuit side terminal TX, and an FET 14 is connected between the transmission system circuit side terminal TX and the ground. The reception mode signal C1 is input to the gate terminal G of the FET 11 via the resistor R1.
The receiving mode signal C1 is input to the G terminal G via a resistor R4. The transmission mode signal C2 is input to the gate terminal G of the FET 12 via the resistor R2, and the transmission mode signal C2 is input to the gate terminal G of the FET 13 via the resistor R3. It has become so.
【0007】このような構成において、受信モ−ド信号
C1が与えられると、FET11,FET14がオンと
なり、このときFET12,FET13はオフとなって
いるので、受信系回路側端子RXは端子Aに接続され、
送信系回路側端子TXは接地される。In such a configuration, when the reception mode signal C1 is supplied, the FET 11 and the FET 14 are turned on and the FET 12 and the FET 13 are turned off at this time. Connected
The transmission circuit side terminal TX is grounded.
【0008】また、送信モ−ド信号C2が与えられる
と、FET12,FET13がオンとなり、このときF
ET11,FET14はオフとなっているので、送信系
回路側端子TXは端子Aに接続され、受信系回路側端子
RXは接地される。When the transmission mode signal C2 is given, the FETs 12 and 13 are turned on.
Since the ET 11 and the FET 14 are off, the transmission circuit side terminal TX is connected to the terminal A, and the reception circuit side terminal RX is grounded.
【0009】今、受信モ−ド信号C1が与えられた状態
で、アンテナ1から強電界の大信号を受信すると、LN
A4や受信部のミキサ(図示せず)にその大信号がその
まま入力され、歪みを起こして受信状態を悪化させるこ
とになる。Now, when a large signal of a strong electric field is received from the antenna 1 in a state where the reception mode signal C1 is given, LN
The large signal is directly input to A4 and a mixer (not shown) of the receiving unit, causing distortion and deteriorating the receiving state.
【0010】これを防ぐために、従来では、大信号受信
状態ではアンテナスイッチ2を、受信系回路側への切り
換えを行わず、送信系回路側に切り換えたままの状態で
受信し、端子Aと受信系回路側端子RXとの間のアイソ
レ−ション(ISO)による減衰で歪みを改善すること
が行われている。In order to prevent this, conventionally, in the large signal receiving state, the antenna switch 2 is not switched to the receiving system circuit, but is received in the state of being switched to the transmitting system circuit. The distortion has been improved by attenuation due to isolation (ISO) between the system circuit side terminal RX.
【0011】[0011]
【発明が解決しようとする課題】しかしながら、上記の
ように送信系回路側に切り換えた状態は、図3のFET
12がオンの状態となるために、受信系回路側端子RX
に接続されたBPF3はその入力端子がショ−ト(この
場合は接地)した状態となる。通常、アンテナ1やアン
テナスイッチ回路2のインピダンスは50オ−ム程度あ
るので、FET12により受信系回路の入力端子が接地
されると、インピーダンスが不整合となりフィルタ特性
が劣化する。However, the state of switching to the transmission system circuit side as described above is the state shown in FIG.
12 is turned on, the receiving circuit side terminal RX
The input terminal of the BPF 3 connected to the terminal is shorted (grounded in this case). Normally, the impedance of the antenna 1 and the antenna switch circuit 2 is about 50 ohms. Therefore, if the input terminal of the receiving system circuit is grounded by the FET 12, the impedance will be mismatched and the filter characteristics will be degraded.
【0012】これを解決するための対策として、図4に
示すように、受信系回路側端子RXと接地間に接続され
たFET12のソ−スSと接地間に50オ−ム程度の抵
抗R5を介在させる方法がある。As a countermeasure for solving this, as shown in FIG. 4, a resistor R5 of about 50 ohm is connected between the source S of the FET 12 connected between the receiving circuit side terminal RX and the ground and the ground. There is a method to intervene.
【0013】これにより、BPF3の適正な特性を保持
するに必要なインピダンスが得られ、BPF3の特性の
劣化を防止することができるが、この方法では、送信時
にFET11のオフ時のドレイン、ソース間抵抗と抵抗
R5との分圧比で決まる電圧が受信系回路側端子RXに
印加され、端子Aと受信系回路側端子RXとの間のアイ
ソレ−ションが悪化してしまうという問題が生じる。As a result, the impedance required to maintain the proper characteristics of the BPF 3 can be obtained, and the deterioration of the characteristics of the BPF 3 can be prevented. A voltage determined by the voltage dividing ratio of the resistor and the resistor R5 is applied to the receiving system circuit side terminal RX, which causes a problem that the isolation between the terminal A and the receiving system circuit side terminal RX deteriorates.
【0014】このように、従来の方式では、端子Aと受
信系回路側端子RXとの間のアイソレ−ションの確保
と、適正な入力インピーダンスの確保とを両立させるこ
とが困難であった。As described above, in the conventional method, it is difficult to achieve both the securing of the isolation between the terminal A and the terminal RX on the receiving circuit side and the securing of an appropriate input impedance.
【0015】本発明の目的は、アイソレ−ションを悪化
させず、入力インピーダンスを整合させ、かつ大信号受
信時に受信信号を適正に減衰させることのできるアンテ
ナスイッチ回路を提供することである。An object of the present invention is to provide an antenna switch circuit capable of matching input impedance without deteriorating isolation and appropriately attenuating a received signal when a large signal is received.
【0016】[0016]
【課題を解決するための手段】送受信共用のアンテナを
受信系回路側または送信系回路側に切り換えて送受信を
行う通信機のアンテナスイッチ回路において、前記アン
テナを送信系回路側または受信系回路側に切り換える第
1のスイッチ手段と、前記受信系回路の入力端子とアー
ス間に接続され、送信時にオンされ、大信号受信時にオ
フされる第2のスイッチ手段と、前記受信系回路の入力
端子とアースとの間に接続され、大信号受信時にオンし
て受信系回路の入力インピーダンスを所定値に終端させ
る第3のスイッチ手段とを有している。[Means for Solving the Problems] An antenna for both transmission and reception is used.
In the antenna switch circuit of the reception system circuit side or switch to transmitting circuit side communication apparatus for performing transmission and reception, a first switching means for switching said Ann <br/> antenna to the transmitting system circuit side or the receiving system circuit side, the The input terminals and
Is connected between the scan is turned on at the time of transmission, and second switching means to be turned off when a large signal reception, is connected between the input terminal and the ground of the reception system circuit, the receiving system is turned on when a large signal reception And third switch means for terminating the input impedance of the circuit to a predetermined value.
【0017】[0017]
【作用】本発明では、大信号入力時には、例えば第1の
スイッチ手段によりアンテナが送信系回路側に切り換え
られ、その第1のスイッチ手段で減衰された信号が受信
系回路に入力する。このとき、第3のスイッチ手段がオ
ンして受信系回路の入力インピーダンスを所定値に終端
するので、受信信号を適正レベルで、かつ受信系回路の
入力インピーダンスをアンテナのインピーダンスにマッ
チングさせた状態で受信することができる。According to the present invention, when a large signal is input, for example, the antenna is switched to the transmission system circuit side by the first switch means, and the signal attenuated by the first switch means is input to the reception system circuit. At this time, the third switch is turned on to terminate the input impedance of the receiving circuit to a predetermined value, so that the received signal is at an appropriate level and the input impedance of the receiving circuit is matched with the antenna impedance. Can be received.
【0018】また、送信時には、第2のスイッチ手段が
オンして受信系回路の入力端子がアースされるので、送
信系回路と受信系回路とのアイソレーションを充分確保
することができる。Further, at the time of transmission, the second switch means is turned on and the input terminal of the receiving system circuit is grounded, so that sufficient isolation between the transmitting system circuit and the receiving system circuit can be ensured.
【0019】[0019]
【実施例】以下、本発明の実施例を説明する。図1は本
発明に係るディジタル移動通信端末のアンテナスイッチ
回路の構成を示す図である。Embodiments of the present invention will be described below. FIG. 1 is a diagram showing a configuration of an antenna switch circuit of a digital mobile communication terminal according to the present invention.
【0020】図1のアンテナスイッチ回路は、図3に示
したアンテナスイッチ回路2の受信系回路側端子RXと
接地間に、スイッチング素子としてのFET15と、こ
のFET15に直列接続された抵抗R6を付加し、さら
にFET15のゲ−トGに抵抗R7を介して大信号受信
時にオンとなる大信号受信制御信号C3を与える構成と
なっている。さらに、受信系回路RXと接地間に接続さ
れたFET12のゲートGに、送信時にオンとなり、大
信号受信時にオフとなる制御信号C4を与えている。In the antenna switch circuit of FIG. 1, an FET 15 as a switching element and a resistor R6 connected in series to the FET 15 are added between the receiving circuit side terminal RX of the antenna switch circuit 2 shown in FIG. Further, a large signal reception control signal C3 which is turned on when a large signal is received is supplied to the gate G of the FET 15 via a resistor R7. Further, a control signal C4 which is turned on at the time of transmission and turned off at the time of receiving a large signal is given to the gate G of the FET 12 connected between the reception system circuit RX and the ground.
【0021】なお、大信号を受信したか否かの判定は、
図1には特には示していないが、受信部において受信信
号のエラーの有無を検出し、さらにLNA4において受
信信号レベルと基準レベルとを比較し、信号レベルが基
準レベルより大きく、かつエラーが発生してとき大信号
を受信したものと判断している。It should be noted that whether or not a large signal has been received is determined by:
Although not particularly shown in FIG. 1, the receiving unit detects the presence or absence of an error in the received signal, and further compares the received signal level with the reference level in the LNA 4 to find that the signal level is higher than the reference level and an error occurs. Then, it is determined that a large signal has been received.
【0022】なお、上記以外の部分は図3と同一である
ので、同一部分には同一符号を付けてそれらの説明は省
略する。このような構成において、次にその動作を図1
および既に説明した図2を参照して説明する。Since the other parts are the same as those in FIG. 3, the same parts are denoted by the same reference numerals and their description is omitted. In such a configuration, the operation is described next with reference to FIG.
A description will be given with reference to FIG.
【0023】まず、送信時および通常レベルの信号受信
時には、大信号受信時制御信号C3はオフとなり、FE
T15はオフ状態を保持している。この状態において、
送信時には、送信モ−ド信号C2がオン、受信モード信
号C1がオフ、制御信号C4がオンとなり、FET1
2,FET13がオン、FET11,FET14がオフ
状態となる。これにより、アンテナ端子AはFET13
を介して送信系回路側端子TXと接続され、送信が可能
となる。First, at the time of transmission and reception of a signal of a normal level, the large signal reception control signal C3 is turned off, and the FE
T15 holds the off state. In this state,
At the time of transmission, the transmission mode signal C2 is turned on, the reception mode signal C1 is turned off, the control signal C4 is turned on, and the FET1
2. FET 13 is turned on, and FET 11 and FET 14 are turned off. As a result, the antenna terminal A is connected to the FET 13
Is connected to the transmission system circuit side terminal TX via the terminal, and transmission becomes possible.
【0024】この場合、FET12がオンして受信系回
路側端子RXは接地されるので、送信信号が受信系回路
にまわりこむことがなく、アンテナ端子Aと受信系回路
側端子RXとの間のアイソレーションは充分確保され
る。In this case, since the FET 12 is turned on and the reception circuit side terminal RX is grounded, the transmission signal does not flow to the reception system circuit, and the connection between the antenna terminal A and the reception circuit side terminal RX is prevented. Isolation is sufficiently ensured.
【0025】一方、通常レベルの信号受信時において
は、受信モ−ド信号C1がオン、送信モード信号C2が
オフ、制御信号C4がオフとなり、FET11,FET
14がオン、FET12,FET13がオフとなる(こ
のときFET15はオフ状態を保持)。これにより、ア
ンテナ端子Aは受信系回路側端子RXに接続され、受信
が可能となる。この場合、FET12はオフ状態となっ
ているので、BPF3のインピーダンスは整合してい
る。On the other hand, at the time of receiving a signal of the normal level, the reception mode signal C1 is turned on, the transmission mode signal C2 is turned off, the control signal C4 is turned off, and the FETs 11, 11
14 is turned on, and the FETs 12 and 13 are turned off (at this time, the FET 15 keeps the off state). As a result, the antenna terminal A is connected to the reception system circuit side terminal RX, and reception becomes possible. In this case, since the FET 12 is in the off state, the impedance of the BPF 3 matches.
【0026】そして、このような受信時において、大信
号が入力されると、前述したように、このアンテナスイ
ッチ回路は受信系回路に対して減衰器としての機能をも
たせることが必要となってくる。When a large signal is input during such reception, as described above, it is necessary for the antenna switch circuit to have a function as an attenuator in the reception system circuit. .
【0027】この場合、送信モード信号C2がオン、受
信モード信号C1がオフ、制御信号C4がオフ、大信号
受信制御信号C3がオンとなり、FET13,FET1
5がオン、FET11,FET12,FET14がオフ
となる。In this case, the transmission mode signal C2 is turned on, the reception mode signal C1 is turned off, the control signal C4 is turned off, the large signal reception control signal C3 is turned on, and the FET13, FET1
5 turns on, and FET11, FET12, and FET14 turn off.
【0028】このように、大信号受信時には、FET1
1がオフし、FET15がオンして受信系回路側端子R
Xに接続されているBPF3が抵抗R6(50オ−ム程
度の抵抗値を有する)で終端されるので、BPF3はア
ンテナ1やアンテナスイッチ回路2の持っている50オ
−ム程度のインピーダンスとマッチングする。As described above, when a large signal is received, the FET 1
1 turns off, the FET 15 turns on, and the receiving system circuit side terminal R
Since the BPF 3 connected to X is terminated by a resistor R6 (having a resistance value of about 50 ohms), the BPF 3 matches the impedance of about 50 ohms of the antenna 1 and the antenna switch circuit 2. I do.
【0029】すなわち、大信号受信時にFET15をオ
ンして受信系回路の入力インピーダンスを、アンテナ1
の持っているインピーダンスと整合させることにより、
大信号入力時におけるBPF3の特性を劣化させずに、
適正レベルで信号を受信することができる。That is, when a large signal is received, the FET 15 is turned on to change the input impedance of the receiving system circuit to the antenna 1
By matching the impedance of
Without deteriorating the characteristics of BPF3 at the time of large signal input,
A signal can be received at an appropriate level.
【0030】なお、上記実施例では、大信号受信時にお
けるFET11〜FET15のオン・オフの設定を、F
ET13,FET15をオン、FET11,FET1
2,FET14をオフとするようにしたが、これに限ら
れること無く、たとえば、FET14,FET15をオ
ン、FET11,FET12,FET13をオフとする
ように制御しても上記実施例同様の効果が得られる。In the above embodiment, the on / off setting of the FETs 11 to 15 at the time of receiving a large signal is determined by F
Turn on ET13, FET15, FET11, FET1
2. Although the FET 14 is turned off, the present invention is not limited to this. For example, even if the FET 14 and the FET 15 are turned on and the FET 11, FET 12, and the FET 13 are turned off, the same effect as the above embodiment can be obtained. Can be
【0031】また、上記実施例では、スイッチング素子
として電界効果トランジスタを用いた例を示したが、電
界効果トランジスタだけに限られるものでなく他のスイ
ッチ素子を用いてもよい。In the above embodiment, an example in which a field effect transistor is used as a switching element has been described. However, the present invention is not limited to the field effect transistor, and another switching element may be used.
【0032】[0032]
【発明の効果】本発明によれば、大信号受信時も受信系
回路の入力インピーダンスが適正な値に終端されるの
で、入力信号を減衰させ、かつインピーダンスを整合さ
せた状態で受信することができる。さらに、送信時に送
信系回路と受信系回路とのアイソレーションを充分に確
保することができる。According to the present invention, even when a large signal is received, the input impedance of the receiving system circuit is terminated to an appropriate value, so that the input signal can be attenuated and received with the impedance matched. it can. Further, sufficient isolation between the transmission circuit and the reception circuit at the time of transmission can be ensured.
【図1】本発明の一実施例のアンテナスイッチ回路の構
成図である。FIG. 1 is a configuration diagram of an antenna switch circuit according to an embodiment of the present invention.
【図2】ディジタル移動帯通信端末機の概略的な構成図
である。FIG. 2 is a schematic configuration diagram of a digital mobile band communication terminal.
【図3】従来のアンテナスイッチ回路の構成図である。FIG. 3 is a configuration diagram of a conventional antenna switch circuit.
【図4】従来のアンテナスイッチ回路の他の構成例を示
す図である。FIG. 4 is a diagram illustrating another configuration example of a conventional antenna switch circuit.
1・・・アンテナ 2・・・アンテナスイッチ回路 11〜15・・・FET R1〜R7・・・抵抗 C1・・・受信モ−ド信号 C2・・・送信モ−ド信号 C3・・・大信号受信時制御信号 C4・・・制御信号 DESCRIPTION OF SYMBOLS 1 ... Antenna 2 ... Antenna switch circuit 11-15 ... FET R1-R7 ... Resistance C1 ... Reception mode signal C2 ... Transmission mode signal C3 ... Large signal Control signal at reception C4 ... Control signal
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H04B 1/44 H01P 1/15 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H04B 1/44 H01P 1/15
Claims (2)
たは送信系回路側に切り換えて送受信を行う通信機のア
ンテナスイッチ回路において、 前記アンテナを送信系回路側または受信系回路側に切り
換える第1のスイッチ手段と、 前記受信系回路の入力端子とアース間に接続され、送信
時にオンされ、大信号受信時にオフされる第2のスイッ
チ手段と、 前記受信系回路の入力端子とアースとの間に接続され、
大信号受信時にオンして受信系回路の入力インピーダン
スを所定値に終端させる第3のスイッチ手段と、 からなることを特徴とするアンテナスイッチ回路。1. An antenna for a communication device that performs transmission and reception by switching an antenna shared for transmission and reception to a reception system circuit side or a transmission system circuit side.
In an antenna switch circuit , a first switch means for switching the antenna to a transmission system circuit side or a reception system circuit side, connected between an input terminal of the reception system circuit and the ground, turned on when transmitting, and turned off when receiving a large signal A second switch means, which is connected between an input terminal of the receiving system circuit and ground,
3. An antenna switch circuit, comprising: third switch means for turning on when a large signal is received and terminating the input impedance of the reception system circuit to a predetermined value.
たは送信系回路側に切り換えて送受信を行う通信機のア
ンテナスイッチ回路において、 前記アンテナを送信系回路に接続する第1のスイッチ手
段と、 前記アンテナを受信系回路に接続する第2のスイッチ手
段と、 前記受信系回路の入力端子とアースとの間に接続され、
送信時にオンされ、大信号受信時にオフされる第3のス
イッチ手段と、 前記受信系回路の入力端子とアースとの間に接続され、
大信号入力時にオンされる第4のスイッチ手段と、 前記第4のスイッチ手段に直列に接続された抵抗とから
なり、 大信号受信時に、前記第2のスイッチ手段をオフして入
力信号を減衰させ、かつ前記第4のスイッチ手段をオン
して受信系回路の入力インピーダンスを所定値に終端さ
せることを特徴とするアンテナスイッチ回路。2. An antenna for a communication device that performs transmission and reception by switching an antenna shared for transmission and reception to a reception system circuit side or a transmission system circuit side.
In the antenna switch circuit , first switch means for connecting the antenna to a transmission system circuit, second switch means for connecting the antenna to a reception system circuit, and between an input terminal of the reception system circuit and ground. Connected
A third switch unit that is turned on at the time of transmission and turned off at the time of receiving a large signal;
A fourth switch means that is turned on when a large signal is input; and a resistor connected in series with the fourth switch means. When a large signal is received, the second switch means is turned off to attenuate an input signal. And turning on said fourth switch means to terminate the input impedance of the receiving circuit to a predetermined value.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP05381893A JP3194310B2 (en) | 1993-03-15 | 1993-03-15 | Antenna switch circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP05381893A JP3194310B2 (en) | 1993-03-15 | 1993-03-15 | Antenna switch circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH06268552A JPH06268552A (en) | 1994-09-22 |
JP3194310B2 true JP3194310B2 (en) | 2001-07-30 |
Family
ID=12953375
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP05381893A Expired - Fee Related JP3194310B2 (en) | 1993-03-15 | 1993-03-15 | Antenna switch circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3194310B2 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11239048A (en) * | 1998-02-20 | 1999-08-31 | Sony Corp | Antenna switch circuit |
US20070030095A1 (en) | 2005-08-05 | 2007-02-08 | Mitsutaka Hikita | Antenna duplexer and wireless terminal using the same |
US8036622B2 (en) * | 2005-09-28 | 2011-10-11 | Qualcomm, Incorporated | DC offset cancellation circuit for a receiver |
JP2012222490A (en) * | 2011-04-06 | 2012-11-12 | Hitachi Metals Ltd | High-frequency circuit |
-
1993
- 1993-03-15 JP JP05381893A patent/JP3194310B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH06268552A (en) | 1994-09-22 |
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