JP3183969B2 - 4-port reactance matching circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a four-port reactance matching circuit, and more particularly to a four-port reactance matching circuit and a coplanar waveguide which can be used for a microwave or millimeter-wave low noise amplifier constituted by a microstrip line circuit. A 4-port reactance matching circuit that can be used for a configured MMIC low-noise amplifier or a microwave (millimeter-wave) hybrid IC low-noise amplifier, and a microwave (millimeter-wave) low-noise amplifier using a multilayer wiring structure or an aerial wiring structure The present invention relates to an improvement of a four-port reactance matching circuit used in the present invention.

[0002]

2. Description of the Related Art In recent years, microwave and millimeter-wave devices related to satellite broadcasting have become widespread.
There has been an active movement to reduce the noise of the two-port amplifying element itself by ET or the like and to form a matching circuit on a microstrip line substrate to achieve a desired noise reduction.

Therefore, a matching circuit for a two-port amplifying element as a conventional two-port reactance circuit is disclosed in, for example,
As disclosed in Japanese Unexamined Patent Publication (Kokai) No. -271502 or JP-A-63-264893, a two-port reactance circuit is simply connected to the input and output ports of the port amplifying element. That is, in FIG.
The two source leads 2 are soldered to two ground patterns 4 on the dielectric substrate, respectively, and the gate lead 5 and the drain lead 6 are connected to the signal source (input side) and load end (output side) of the microstrip line 7. Are soldered and fixed respectively. The input side open stub 8 having a length L1 is located at a position L2 from the base of the gate lead 5, and the output side open stub 9 having a length L3 is located at a position L4 from the base of the drain lead 6.
Are connected to each other. In addition, each stub has a DC
The bias supply circuit 10 is connected. X indicated by a dashed line indicates an input-side two-port reactance circuit, and Y indicates an output-side two-port reactance circuit.

Here, the four parameters S of the two-port reactance circuit can be arbitrarily set over the entire range satisfying the unitary condition by changing L1 and L2 on the input side. Regarding the input-side two-port reactance circuit, a state in which L1 and L2 are set so that the reflection coefficient when the signal source 11 is viewed from the two-port amplification element 1 becomes the optimum signal source reflection coefficient Γopt is a power matching state. Become. Similarly, for the output two-port reactance circuit, the reflection coefficient when viewing the load side 12 from the two-port amplifier 1 and the reflection coefficient when viewing the two-port amplifier from the load 12 are defined as complex conjugate. When L3 and L4 are set so as to satisfy this condition, this state becomes a power matching state. Therefore, when the two-port reactance circuits on the input side and the output side are respectively set as described above, the amplifying section D shown by the two-dot chain line temporarily has the minimum noise figure or the associated gain under the minimum noise condition in the conventional sense. Will be presented.

A method of providing a feedback circuit in addition to the above-mentioned matching circuit to lower the noise figure in the conventional sense (Japanese Patent Laid-Open No. 02-113610) is also known. Japanese Patent Application No. 03-91754 proposes a 4-port reactance matching circuit based on a new concept.

The basic configuration of the conventional two-port reactance matching circuit shown in FIG. 17 will be described. X is an input-side two-port reactance matching circuit, Y is an output-side two-port reactance matching circuit, and S is a two-port amplifying element 1. A, B are the 2 × 2 scattering matrices of the input and output 2-port reactance matching circuits, respectively, and bq
Assuming that 1 and bq2 are the input and output noise power waves, respectively, this noise power wave can be represented by a complex quantity having a phase term and an amplitude term. In this figure, when a two-port reactance matching circuit is used, When the six complex parameters are defined as A11, A12, A22, B11, B12, and B22, respectively, A12 = A2 from the reversibility of the reactance circuit.
Assuming that the components A of the matrix satisfy the unified condition, the noise figure and the gain of the amplifier can be determined for the time being.

[0007]

However, the former 2)
In the port reactance circuit, S that can be set
Since the number of parameters is as small as 6 and the degree of freedom in designing an amplifier is small, even if a noise matching state in the conventional sense can be realized, the noise figure cannot be improved more strictly. In addition, there arises a problem that the output port becomes unstable when power matching is performed. In the latter method of improving the noise figure provided with the feedback circuit, since it is different from a general design method using S-parameters, not only must the design be repeated by trial and error each time, but also the feedback There remains a difficult problem how to accurately realize an inductance component and a capacitance component which are treated as a lumped constant as a circuit on a microstrip line substrate.

An object of the present invention is to realize a matching circuit for a two-port amplifying element by a four-port reactance circuit on a microwave circuit board to solve the above-mentioned conventional problems.

[0009]

In order to achieve the above object, the first and second inventions of the present application provide a matching circuit for a two-port amplifying element on a microstrip line substrate by using four matching circuits .
With ports, port 1 and port 4, port 2 and port
3 are arranged at opposing positions, respectively, and are to be realized by a 4-port reactance circuit. To eliminate the conventional obstacle, a microstrip line circuit formed on a dielectric substrate or a semiconductor substrate is used. configured, between ports 1 and 2, between ports 1 and 3, between the ports 2 and 4 are two-port reactance circuit respectively scattering matrix at a desired frequency can be arbitrarily set is connected, or The gist is to connect a two-port reactance circuit between port 1 and port 3, between port 2 and port 4, and between port 3 and port 4, which can arbitrarily set a scattering matrix at a desired frequency.

Further, the four-port reactance matching circuit according to the third to fifth aspects of the present invention has four ports ,
Positions where port 1 and port 4 and port 2 and port 3 face each other
And is configured using a coplanar waveguide formed on a dielectric substrate or a semiconductor substrate, between port 1 and port 2, between port 1 and port 3, between port 2 and port 4, A two-port reactance circuit in which one or a plurality of capacitor components and inductor components are disposed between the signal line of the coplanar waveguide or the signal line in the middle of the coplanar waveguide and the ground plane, respectively, between the port 3 and the port 4. Connected. Alternatively, between the port 1 and the port 2, between the port 1 and the port 3, and between the port 2 and the port 4, the capacitor component and the inductor component are respectively connected to the signal in the signal line of the coplanar waveguide or the signal in the One or more two-port reactance circuits are connected between the line and the ground plane. Alternatively, between port 1 and port 3, between port 2 and port 4, and between port 3 and port 4.
In the space between the two, one or a plurality of capacitor components and inductor components are disposed between the signal line in the middle of the signal line of the coplanar waveguide or the signal line in the middle of the coplanar waveguide and the ground plane, respectively.
The point is that they are connected by a port reactance circuit.

Further, the four-port reactance matching circuit according to the sixth and seventh aspects of the present invention has four ports, and the ports 1 and 4 and the ports 2 and 3 are arranged at positions facing each other. It is configured using a microwave circuit formed on a substrate or a semiconductor substrate, and at least one between port 1 and port 2 and between port 3 and port 4
The first is composed of aerial wiring means such as a bonding wire, a bonding ribbon or an air bridge, respectively .
Are connected by two-port reactance circuit, between port 1 and port 3, between the ports 2 and 4, each desired frequency in the scattering matrix can be arbitrarily set the second 2-port reactance circuit is connected, The first and second two ports
The S of the reactance matching circuit is determined by the reactance circuit.
Set the parameters within the range that satisfies the unitary conditions
You . Alternatively, at least one of between the port 1 and the port 2 and between the port 3 and the port 4 is an aerial wiring means such as a bonding wire, a bonding ribbon or an air bridge, and a conductor pattern for landing at both ends thereof. It is connected by the first 2-port reactance circuit having, between port 1 and port 3, between the ports 2 and 4, respectively settable desired arbitrary frequency scattering matrix
A second two-port reactance circuit is connected, and the first
And the second two-port reactance circuit
Satisfies the unitary condition for the S parameter of the closet matching circuit
The point is to set within the range specified .

The four-port reactance matching circuit according to an eighth aspect of the present invention has four ports ,
And port 4 and port 2 and port 3
It is arranged and configured using a microwave circuit formed on a dielectric multilayer substrate or a semiconductor multilayer substrate, and at least one between the port 1 and the port 2 and between the port 3 and the port 4 has a multilayer wiring. The two ports are connected by a two-port reactance circuit, and the ports 1 and 3 and the ports 2 and 4 are connected by a plane two-port reactance circuit whose scattering frequency can be set arbitrarily at a desired frequency. It is the gist that it is done.

[0013]

FIG. 18 shows a configuration of a 4-port reactance matching circuit Z for explaining the basic concept of the first and second inventions.
C is a 4-row, 4-column scattering matrix of the 4-port reactance matching circuit, and has 10 parameters, C11, C12, C13,
C14, C22, C23, C24, C33, C34, C
44, the noise figure and the gain of the amplifier can be determined when the matrix component of C satisfies the unitary condition.

Further, in the three or four two-port reactance circuits used in the four-port reactance matching circuits of the third to eighth aspects, the scattering matrix can be set arbitrarily at a desired frequency. By using the four-port reactance matching circuit of the present invention, the number of S-parameters of the entire matching circuit that can be set increases to ten, so that the degree of freedom in designing an amplifier increases. This allows, for example, a further reduction in the minimum noise figure in the conventional sense, an increase in the associated gain while maintaining the minimum noise figure in the conventional sense, and a stability in the case of power matching between input and output ports. Can be designed in consideration of Also, compared to the matching method using the conventional feedback circuit,
The entire matching circuit can be handled uniformly, and characteristics can be grasped by calculation before pattern design. Also, since the circuit configuration is simple on the coplanar waveguide, desired characteristics can be easily realized.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 4 show Embodiments 1 to 4 according to the first and second inventions.

Embodiment 1 In FIG. 1, Z surrounded by a three-dot chain line represents a first embodiment of the present invention.
FIG. 4 is a circuit configuration diagram showing an embodiment of the present invention, and is a four-port reactance matching circuit. The input and output ports of the two-port amplifying element 1 are connected to port 1 13 and port 2, respectively, the signal source 11 is connected to port 3 15, and the load 12 is connected to port 4 16. As a two-port reactance circuit connecting port 1 and port 2, port 1 and port 3, port 2 and port 4, and port 3 and port 4, a microstrip line 17 having a characteristic impedance of 50Ω is connected. A stub 18 is provided on the way. The stub may be an open type or a short type (the same applies to the following embodiments). In the figure, when the dimensions of L5A to L5L are changed, ten S-parameters C11, C12, C13,
C14, C22, C23, C33, C34, Yu the C44
It can be set arbitrarily within a range that satisfies the common condition.

Embodiment 2 FIG. 2 is a circuit diagram showing a second embodiment, in which a connection is made between port 1 and port 2 and between port 3 and port 4, respectively.
Characteristic impedance 50Ω in port reactance circuit
A λ / 2 resonator insertion type filter 19 is formed in the middle of the microstrip line 17 of FIG. 2 and a two-port reactance circuit connecting port 1 and port 3 and port 2 and port 4 respectively has characteristic impedance. A stub 18 is connected in the middle of a 50 Ω microstrip line 17. In the drawing, only by changing the dimensions of L6A to L6L, ten S-parameters C11, C12, C13, C14,
Unitary C22, C23, C33, C34, C44
It can be set arbitrarily within a range that satisfies the requirements. What
Note that the center frequency of the circuit (bandpass filter) in FIG.
Is the same as the operating frequency.

Embodiment 3 FIG. 3 is a circuit diagram showing a third embodiment, in which a connection between port 1 and port 2 and between port 3 and port 4 is made.
The characteristic impedance of the port reactance circuit is 50
A ring filter 20 is formed in the middle of the microstrip line 17 of Ω.
During this period, a stub 18 is provided in the middle of a microstrip line 17 having a characteristic impedance of 50Ω in the two-port reactance circuit connecting each of the ports 2 and 4. In the figure, by changing the dimensions of L7A to L7L, ten parameters S of the four-port reactance matching circuit, that is, C11, C12, C13, C14, C
Unitary conditions for 22, C23, C33, C34 and C44
Optionally setting becomes possible within a range satisfying. The figure
The center frequency of the circuit 3 (bandpass filter)
Same as frequency.

Embodiment 4 FIG. 4 is a circuit diagram showing a fourth embodiment of the present invention, in which a connection is made between port 1 and port 2 and between port 3 and port 4, respectively.
As a port reactance circuit, microstrip lines 21 and 22 having characteristic impedances of Z1 and Z2, respectively.
A stub 18 is provided in the middle of a microstrip line 17 having a characteristic impedance of 50Ω as a two-port reactance circuit for connecting between port 1 and port 3 and between port 2 and port 4, respectively. In the figure, when the dimensions of L8A to L8H and Z1 and Z2 are respectively changed, ten parameters S of the four-port reactance matching circuit, ie, C11, C12, C13, C14, C2
2, C23, C33, C34, and C44 can be arbitrarily set within a range that satisfies the unitary condition .

FIGS. 5 to 8 show Embodiments 5 to 8 according to the third to fifth aspects of the present invention.

Embodiment 5 FIG. 5 is a view showing Embodiment 5 of the present invention. Port 1 (2
2), the input port and the output port of the 2-port amplifying element are connected to the port 2 (23), respectively, and the port 3 (24)
To the signal source (20) and port 4 (25) to the load (2
1) are respectively connected. In this embodiment, port 1 (2
2) and port 2 (23), between port 1 (22) and port 3 (24), port 2 (23) and port 4 (2
During 5), as a two-port reactance circuit connecting port 3 (24) and port 4 (25), a short stub (27) is connected in the middle of the signal line of the coplanar waveguide (26) having a characteristic impedance of 50Ω. What is being adopted. The type of stub may be an open stub (the same applies to the following embodiments). Three air bridges (28) are formed at the branch point by the short stub connection. By changing the dimensions of L5A to L5L in the figure, ten S-parameters of the four-port reactance matching circuit, C11, C12, C13, C14, C22, C
23, C33, C34, and C44 can be arbitrarily set within a range that satisfies the unitary condition.

Embodiment 6 FIG. 6 is a view showing Embodiment 6 of the present invention. In the present embodiment, a coplanar waveguide (26) having a characteristic impedance of 50Ω is used as a two-port reactance circuit connecting port 1 (22) and port 2 (23) and connecting port 3 (24) and port 4 (25). ) In which an interdigital capacitor (19) is formed in the middle of the signal line. An MIM capacitor may be used instead of the interdigital capacitor. Port 1 (2
As a two-port reactance circuit that connects between 2) and port 3 (24), and between port 2 (23) and port 4 (25), it is shorted in the middle of the signal line of the coplanar waveguide (26) having a characteristic impedance of 50Ω. The one to which the stub (27) is connected is adopted. Three air bridges (28) are formed at the branch point by the short stub connection. By changing the dimensions L6A to L6J and the capacitances Ca and Cb in the figure, one of the four-port reactance matching circuits can be changed.
0 S-parameters, C11, C12, C13, C1
4, C22, C23, C33, C34, and C44 can be arbitrarily set within a range that satisfies the unitary condition.

Seventh Embodiment FIG. 7 is a view showing a seventh embodiment of the present invention. In this embodiment, as a two-port reactance circuit connecting between port 1 (22) and port 2 (23) and between port 3 (24) and port 4 (25), a coplanar waveguide (26 ) In which an interdigital capacitor (29) is formed between the signal line and the ground plane. An MIM capacitor may be used instead of the interdigital capacitor. Further, as a two-port reactance circuit connecting between port 1 (22) and port 3 (24) and between port 2 (23) and port 4 (25), in the middle of a coplanar waveguide (26) having a characteristic impedance of 50Ω. Short stub (2
7) is used. 3 air bridges (28) at the branch point with short stub connection
Individually formed. L7A to L7J dimensions and capacitance C in the figure
By changing c and Cd, ten S parameters C11, C12, and C1 of the four-port reactance matching circuit are changed.
3, C14, C22, C23, C33, C34, C44
Can be arbitrarily set within a range satisfying the unitary condition.

Eighth Embodiment FIG. 8 is a view showing an eighth embodiment of the present invention. In this embodiment, as a two-port reactance circuit that connects between port 1 (22) and port 2 (23), and between port 3 (24) and port 4 (25), the characteristic impedance is Z.
1, Z2 coplanar waveguides (30) and (31) are employed. Port 1 (22) and port 3 (24)
Between the ports 2 (23) and 4 (25), a two-port reactance circuit in which a short stub (27) is connected in the middle of a coplanar waveguide (26) having a characteristic impedance of 50Ω. Has adopted. Three air bridges (28) are formed at the branch point by the short stub connection. By changing the dimensions of L8A to L8H and Z1 and Z2 in the figure, ten S-parameters C11 and C1 of the 4-port reactance matching circuit
2, C13, C14, C22, C23, C33, C3
4. C44 can be arbitrarily set within a range satisfying the unitary condition.

In addition to the above-described embodiment, any reactance two-port circuit for connecting the ports can be employed as long as the scattering matrix can be set arbitrarily at a desired frequency. In addition, four or three combinations thereof can be freely selected.

FIGS. 9 to 12 show Embodiments 9 to 12 according to the sixth and seventh aspects of the present invention.

Embodiment 9 FIG. 9 is a view showing Embodiment 9 of the present invention. Port 1 (4
3), the input port and the output port of the two-port amplifying element are connected to the port 2 (44), respectively, the signal source (41) to the port 3 (45), and the load (42) to the port 4 (46).
Are connected respectively. In this embodiment, between port 1 (43) and port 2 (44), port 3 (45) and port 4
A bonding wire (47) is employed as a two-port reactance circuit connecting between (46). A microstrip line (48) having a characteristic impedance of 50Ω is used as a two-port reactance circuit for connecting between port 1 and port 3 and between port 2 and port 4.
A stub (49) is connected midway. The type of the stub may be an open stub or a short stub (the same applies to the following embodiments). By changing the dimensions of L5A to L5F and the length and shape of the wire (47) in the figure, ten S-parameters of the four-port reactance matching circuit, C11, C12, C13, C
14, C22, C23, C33, C34, and C44 can be arbitrarily set within a range that satisfies the unitary condition.

Embodiment 10 FIG. 10 is a view showing Embodiment 10 of the present invention. In the present embodiment, an island-shaped conductor pattern (50) is used as a two-port reactance circuit for connecting between port 1 (43) and port 2 (44) and connecting between port 3 (45) and port (46).
And two bonding wires (47) for connecting the respective ports via the. Also, port 1 (43)
And port 3 (45), port 2 (44) and port 4
As the two-port reactance circuit connecting between (46), a two-port reactance circuit in which a stub (49) is connected in the middle of a microstrip line (48) having a characteristic impedance of 50Ω is employed. By changing the dimensions of L6A to L6F and the length and shape of the wire (47), ten S-parameters of the four-port reactance matching circuit, C
11, C12, C13, C14, C22, C23, C2
4, C33, C34 and C44 can be arbitrarily set within a range satisfying the unitary condition.

Embodiment 11 FIG. 11 is a view showing Embodiment 11 of the present invention. In this embodiment, as a two-port reactance circuit connecting between port 1 (43) and port 2 (44) and between port 3 (45) and port 4 (46), a spiral inductor formed on the substrate plane (51) and air bridge (52)
Are connected in series. Also, between port 1 (43) and port 3 (45), port 2 (44)
As a two-port reactance circuit that connects between the microstrip line (48) having a characteristic impedance of 50Ω, a stub (49) is connected in the middle of the microstrip line (48). L7A to L7F in the figure
, The inductor component of the spiral inductor (51), and the length and shape of the air bridge (52) to change the ten S-parameters of the four-port reactance matching circuit, C11, C12, C13, and C14. , C2
2, C23, C24, C33, C34 and C44 can be arbitrarily set within a range satisfying the unitary condition.

Embodiment 12 FIG. 12 shows a twelfth embodiment of the present invention. In this embodiment, as a two-port reactance circuit connecting between port 1 (43) and port 2 (44) and between port 3 (45) and port 4 (46), a micro-circuit having a gap (53) in the middle is provided. A strip line (48) and a bonding ribbon (54) arranged so as to have an effective capacitance in the gap are employed. Also, between port 1 (43) and port 3 (45),
2 to connect between port 2 (44) and port 4 (46)
Characteristic impedance 5 as port reactance circuit
A stub (49) is connected in the middle of a 0Ω microstrip line (48). By changing the dimensions of L8A to L8J and the length and shape of the ribbon in the figure, ten S-parameters of the 4-port reactance matching circuit, C11, C12, C13, C14, C2
2, C23, C24, C33, C34 and C44 can be arbitrarily set within a range satisfying the unitary condition.

Next, FIGS. 13 to 15 show Embodiments 13 to 15 according to the eighth invention.

Embodiment 13 FIG. 13 is a view showing Embodiment 13 of the present invention. Port 1
The input port and output port of the two-port amplifying element are connected to (63) and port 2 (64), respectively, and port 3 (6
A signal source (61) is connected to 5), and a load (62) is connected to the port 4 (66). In this embodiment, port 1
A through-hole (67) and a lower metallized wiring (68) are used as a two-port reactance circuit connecting between (63) and port 2 (64) and between port 3 (65) and port 4 (66). are doing. Port 1 (6
As a two-port reactance circuit connecting between 3) and port 3 (65) and between port 2 (64) and port 4 (46), a stub (70) is provided in the middle of a microstrip line (69) having a characteristic impedance of 50Ω. Are connected. The type of stub may be an open stub or a short stub (the same applies to the following embodiments). By changing the dimensions of L5A to L5H and the thickness of each layer in the figure, ten S parameters of the 4-port reactance matching circuit, C11, C12, C13,
C14, C22, C23, C24, C33, C34, C
44 can be arbitrarily set within a range satisfying the unitary condition.

Embodiment 14 FIG. 14 is a view showing Embodiment 14 of the present invention. In this embodiment, as a two-port reactance circuit connecting port 1 (63) and port 2 (64), and connecting port 3 (65) and port 4 (66), a through-hole (67) and an upper layer The metallized wiring (71) is employed. Also,
Port 2 between port 1 (63) and port 3 (65)
As a two-port reactance circuit that connects between (64) and port 4 (66), a stub (7) is provided in the middle of a microstrip line (69) having a characteristic impedance of 50Ω.
0) is used. L6 in the figure
By changing the dimensions of A to L6H and the thickness of each layer, 4
10 S-parameters of the port reactance matching circuit, C11, C12, C13, C14, C22, C2
3, C24, C33, C34 and C44 can be arbitrarily set within a range satisfying the unitary condition.

Embodiment 15 FIG. 15 is a view showing Embodiment 15 of the present invention. In this embodiment, as a two-port reactance circuit connecting between port 1 (63) and port 2 (64) and between port 3 (65) and port 4 (66), the side metallization (72) and the upper layer The metallized wiring (71) is employed. Also, as a two-port reactance circuit connecting between port 1 (63) and port 3 (65) and between port 2 (64) and port 4 (71), a halfway of a microstrip line (69) having a characteristic impedance of 50Ω. Stub (7
0) is used. L7 in the figure
By changing the dimensions of A to L7H and the thickness of each layer, 4
10 S-parameters of the port reactance matching circuit, C11, C12, C13, C14, C22, C2
3, C24, C33, C34 and C44 can be arbitrarily set within a range satisfying the unitary condition.

In addition to the above embodiment, any two-way reactance circuit that connects the ports can be used as long as it is an aerial wiring circuit that can arbitrarily set a scattering matrix at a desired frequency. In addition, four or three combinations thereof can be freely selected.

[0036]

As described above, by using the four-port reactance matching circuit of the present invention, the number of S parameters that can be set is increased to ten, so that the degree of freedom in designing an amplifier is increased. growing. This allows, for example, a further reduction in the minimum noise figure in the conventional sense, an increase in the associated gain while maintaining the minimum noise figure in the conventional sense, and a stability in the case of power matching between input and output ports. Can be designed in consideration of Further, as compared with a conventional matching method using a feedback circuit, the entire matching circuit can be handled in a unified manner, and characteristics can be grasped by calculation before pattern design. Also, since the circuit configuration is simple on the microwave circuit board, desired characteristics can be easily realized.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of Embodiment 1 of the present invention.

FIG. 2 is a circuit configuration diagram according to a second embodiment of the present invention.

FIG. 3 is a circuit configuration diagram according to a third embodiment of the present invention.

FIG. 4 is a circuit configuration diagram according to a fourth embodiment of the present invention.

FIG. 5 is a circuit configuration diagram according to a fifth embodiment of the present invention.

FIG. 6 is a circuit configuration diagram according to a sixth embodiment of the present invention.

FIG. 7 is a circuit configuration diagram according to a seventh embodiment of the present invention.

FIG. 8 is a circuit configuration diagram of Embodiment 8 of the present invention.

FIG. 9 is a circuit diagram of a ninth embodiment of the present invention.

FIG. 10 is a circuit configuration diagram according to a tenth embodiment of the present invention.

FIG. 11 is a circuit diagram of an eleventh embodiment of the present invention.

FIG. 12 is a circuit configuration diagram according to a twelfth embodiment of the present invention.

FIG. 13 is a circuit configuration diagram according to a thirteenth embodiment of the present invention.

FIG. 14 is a circuit diagram of a fourteenth embodiment of the present invention.

FIG. 15 is a circuit configuration diagram according to Embodiment 15 of the present invention.

FIG. 16 is a specific configuration diagram of a conventional two-port reactance matching circuit.

FIG. 17 is a specific configuration diagram of a conventional two-port reactance matching circuit.

FIG. 18 is a circuit configuration diagram illustrating a basic concept of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 2-port amplification element 2 Source lead 3 Dielectric substrate 4 Ground pattern 5 Gate lead 6 Drain lead 7 Microstrip line 8 Open stub (input side) 9 Open stub (output side) 10 DC bias supply circuit 11 Signal source 12 Load 13 Port 1 14 Port 2 15 Port 3 16 Port 4 17 Microstrip line (characteristic impedance 50Ω) 18 Stub 19 λ / 2 resonator insertion filter 20 Ring filter 21 Microstrip line (characteristic impedance Z1) 22 Microstrip line (characteristics) Impedance Z2) D amplifying section X 2-port reactance circuit (input side) Y 2-port reactance circuit (output side) Z 4-port reactance circuit

────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-63-227202 (JP, A) JP-A-62-245804 (JP, A) JP-A-62-143306 (JP, U) US Patent 4492939 (US , A) (58) Fields surveyed (Int. Cl. ⁷ , DB name) H01P 5/02 603 H01P 5/22 H03F 3/60 JICST file (JOIS)

Claims (8)

(57) [Claims] 1. A semiconductor device formed on a dielectric substrate or a semiconductor substrate.
Of four microstrip line circuits
Port 1 and port 4, port 2 and port
Reactance matching in which the sensors 3 are arranged at positions facing each other
In the circuit, between port 1 and port 2 and between port 1 and port
Between port 3 and port 2 and port 4
2-port reactor with scattering matrix arbitrarily settable by wave number
4 ports characterized by being connected by a switch circuit
Reactance matching circuit. 2. The method according to claim 1, wherein the substrate is formed on a dielectric substrate or a semiconductor substrate.
Of four microstrip line circuits
Port 1 and port 4, port 2 and port
Reactance matching in which the sensors 3 are arranged at positions facing each other
In the circuit, between port 1 and port 3, port 2 and port
Between port 3 and port 3 and port 4
2-port reactor with scattering matrix arbitrarily settable by wave number
4 ports characterized by being connected by a switch circuit
Reactance matching circuit. 3. A semiconductor device formed on a dielectric substrate or a semiconductor substrate.
Ports configured using coplanar waveguides
Port 1 and port 4 and port 2 and port 3
Reactance matching circuits located at opposing positions
Between port 1 and port 2 and between port 1 and port 3.
Between, between port 2 and port 4, between port 3 and port 4
Coplanarize the capacitor and inductor components, respectively.
Signals in the middle of the signal line of the waveguide or in the middle of the coplanar waveguide
2-port with one or more between the line and the ground plane
4 points connected by a triactance circuit
-Reactance matching circuit. 4. A semiconductor device formed on a dielectric substrate or a semiconductor substrate.
Ports configured using coplanar waveguides
Port 1 and port 4 and port 2 and port 3
Reactance matching circuits located at opposing positions
Between port 1 and port 2 and between port 1 and port 3.
Between the ports 2 and 4, the capacitor components and
Inductor component in the middle of signal line of coplanar waveguide or
1 between the signal line in the middle of the coplanar waveguide and the ground plane
Connected by two or more two-port reactance circuits
Four-port reactance matching circuit
Road. 5. A semiconductor device formed on a dielectric substrate or a semiconductor substrate.
Ports configured using coplanar waveguides
Port 1 and port 4 and port 2 and port 3
Reactance matching circuits located at opposing positions
Between port 1 and port 3, port 2 and port 4,
Between the port 3 and the port 4
The inductor component is placed in the middle of the coplanar waveguide signal line or
One between the signal line and the ground plane in the middle of the waveguide
Are connected by a two-port reactance circuit
A four-port reactance matching circuit. 6. A reactance matching circuit having four ports formed on a dielectric substrate or a semiconductor substrate, wherein a port 1 and a port 4 and a port 2 and a port 3 are arranged at positions facing each other. At least one of between port 1 and port 2 and between port 3 and port 4 is a bonding wire, a bonding ribbon, or an air wire.
Consists of one or more aerial wiring means such as a bridge
Connected by a first two-port reactance circuit,
And between ports 3, between the ports 2 and 4, each desired frequency in the scattering matrix are connected arbitrarily settable second 2-port reactance circuit, the first and second 2 port
-The reactance matching circuit by the reactance circuit
S parameter within the range that satisfies the unitary condition
4-port reactive matching circuit, characterized in that the. 7. A reactance matching circuit having four ports formed on a dielectric substrate or a semiconductor substrate, wherein a port 1 and a port 4 and a port 2 and a port 3 are arranged at positions facing each other. At least one of between port 1 and port 2 and between port 3 and port 4 is a bonding wire, a bonding ribbon, or an air wire.
One or more aerial wiring means such as a bridge and both ends thereof are connected by a first two-port reactance circuit having a conductor pattern for landing, between port 1 and port 3, between port 2 and port 4 the respectively desired second 2-port reactance circuit frequency scattering matrix is arbitrarily set is connected, it said first and second 2-port reactor
The S parameter of the reactance matching circuit
A four-port reactance matching circuit, wherein the parameters are set within a range satisfying a unitary condition . 8. A multi-layer dielectric substrate or a multi-layer semiconductor substrate.
Has four ports, port 1 and port 4,
Ports 2 and 3 are located at positions facing each other.
In the actance matching circuit, port 1 and port 2
And at least one between port 3 and port 4 is respectively
Two-port reactance circuit configured using multilayer wiring
Between port 1 and port 3 and between port 2 and port 3.
The scattering matrix is set arbitrarily at the desired frequency between
Connected by a possible planar 2-port reactance circuit
A four-port reactance matching circuit, characterized in that: