JP3174843B2 - Grid-connected inverter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a grid-connected inverter configured to convert DC power output from a DC power supply such as a solar cell into AC power and supply the AC power to a commercial power system.

[0002]

2. Description of the Related Art In a conventional grid-connected inverter, a PWM inverter circuit composed of switching elements is used to convert DC to AC, and is used as a gate pulse signal for controlling ON / OFF of the switching elements. By outputting a pulse train in which the pulse width and the positive and negative polarities are controlled, DC power is converted into AC power of a commercial frequency and sent to an existing commercial power system.

FIG. 7 shows an example of a grid-connected solar power generation system to which a conventional grid-connected inverter is applied. In this system, DC power of a solar cell 2 is converted into AC power by a grid-connected inverter 1 controlled by PWM (pulse width modulation), and an output terminal of the grid-connected inverter 1 is connected to a conventional transformer 3 via a commercial transformer 3. It is connected to the commercial system power supply 4.

The system interconnection inverter 1 includes a backflow prevention diode 5, a noise filter 6, an input capacitor 7, an FE
It comprises a T-bridge 8, an output choke coil 9 having the function of an output filter and converting a rectangular wave into a sine wave, a smoothing capacitor 10, an interconnection relay 11, a noise filter 12, and a control circuit 13. The interconnection relay 11
After detecting that the voltage of the system interconnection inverter 1 has been established, the inverter output is supplied to the commercial system power supply 4 via the commercial transformer 3. The control circuit 13 includes a DC voltage constant control unit 14, a DC reference voltage source 15, a multiplier 1
6, an output current detector 17, an error amplifier 18, a PWM modulation control unit 19, and a gate drive signal generation circuit 20 for driving the FET bridge 8.

The control circuit 13 includes a DC voltage constant control unit 14
To generate an error voltage signal S3 between the _VDC input voltage signal S1 from the solar cell 2 and the _VREF reference voltage signal S2 from the DC reference voltage source 15, and this error amplifier 18 is connected to one input of a multiplier 16. And

The output voltage signal S 4 of V _CS on the output side of the interconnection relay 11 is used as the other input of the multiplier 16. The multiplier 16 receives the input error voltage signal S3 and the output voltage signal S4.
To generate a sinusoidal voltage signal S5.

The error amplifier 18 outputs the sine wave voltage signal S 5 from the multiplier 16 and the I _OUT detected by the output current detector 17.
, And outputs a sine wave error signal S7 obtained by amplifying the difference between the two to the PWM modulation control unit 19 as an output current command value of the inverter 1. The PWM modulation control unit 19 performs PWM based on the input sine wave error signal S7.
The control is performed, and the switching pattern signal S8 whose pulse width and positive / negative polarity are determined is output to the gate drive signal generation circuit 20. The gate drive signal generation circuit 20 outputs a gate pulse signal S9 based on the signal to drive the FET bridge 8, thereby controlling the input voltage _VDC that matches the reference voltage _VREF .

In the FET bridge 8, when the switching transistors Q1 and Q2 are simultaneously turned on, the switching transistors Q3 and Q4 are simultaneously turned off. Conversely, when the switching transistors Q3 and Q4 are simultaneously turned on, the switching transistors Q1 and Q4 are turned off. Q2 is simultaneously turned off.

As described above, in order to obtain the sine wave error signal S7 as an output current command value (waveform pattern) to be given to the PWM modulation control unit 19 in the grid interconnection inverter 1, the input voltage signal S1, the output voltage signal S4 and the output current signal S6 were used.

The sine wave error signal S7 has been used as a feedback signal for controlling the system interconnection inverter 1. In other words, this conventional example adopts a method of controlling the input voltage of the inverter 1 (that is, the output voltage of the solar cell 2) _VDC to a predetermined constant voltage value _VREF .

In practice, the voltage at the operating point at which the maximum power is extracted from the solar cell varies every moment depending on weather conditions such as the amount of solar radiation and the element temperature. By the way, the feature of the above-mentioned conventional method is that the solar cell is simulated to operate at the maximum power point of the solar cell, assuming that the voltage can be approximated to an almost constant voltage regardless of the amount of solar radiation and the element temperature.

Thus, in the above-described conventional method, open-loop control is performed in terms of control, and the constant voltage value predicted in advance does not always match the actual operating voltage value at which the maximum output can be obtained. Naturally expected. In this case, it will operate at a point deviated from the optimal operating point,
The maximum power cannot be output. If the operating point deviates even slightly from the optimal operating point due to the characteristics of the solar cell, the amount of wasted power increases, especially when the amount of solar radiation increases to some extent. In addition, since the optimum operating point changes depending on the season, considering the heating in winter and dehumidification during the rainy season throughout the year, complicated operations such as the need to frequently change the preset constant voltage value in the conventional method are required. Otherwise, a significant amount of solar cell output power will be wasted throughout the year, which is inefficient and not very usable.

In order to generate a sine wave error signal S7 as an output current command signal necessary for feedback control of the system interconnection inverter 1 and for determining the inverter output current quality, a sine wave voltage source is used. The inverter output voltage signal (V _CS ) at the inverter output end where the waveform quality is not sufficient is used as a basic signal.
Since the analog signal processing is frequently used such as using the analog multiplier 16 in the control signal processing process, the circuit is complicated, and the sine wave error signal S7 is also a sine wave signal containing many harmonics. ing. As a result, the waveform distortion rate of the inverter output current also becomes a large value, making it difficult to improve a circuit complicated for analog signal processing.

[0014]

As described above, in the conventional system interconnection inverter 1, the control circuit 13 is constituted by an analog circuit even though the power generated from the solar cell changes every moment. Therefore, a circuit for obtaining better control characteristics is complicated, and adjustment of circuit constants is complicated. Furthermore, the maximum power of the solar cell cannot be efficiently extracted, and it is almost impossible to actively control the output power by arbitrarily changing the operating point on the characteristic curve of the solar cell. Had a problem.

[0015] In addition, in regard to power quality, which is the most important problem in linking with an existing commercial power system, control is also performed to control the output current distortion factor to be sufficiently low. Since the circuit 13 is constituted by an analog circuit, there are many difficult parts such as adjustment of circuit constants.

The present invention has been made in view of such circumstances, and aims to simplify a control circuit.
It is an object of the present invention to ensure that the maximum output power can be accurately and efficiently extracted, and that the distortion rate of the output current waveform is suppressed to a small value to ensure the power quality of the system.

[0017]

The present invention has the following configuration to achieve the above object. The greatest feature is that a plurality of types of waveform patterns for generating a sinusoidal waveform pattern signal based on pulse width modulation are stored in a memory in advance. That is, the grid-connected inverter according to the present invention turns ON / OFF the bridge of the switching element based on the switching pattern signal.
Means for controlling and converting DC power input from a DC power supply such as a solar cell to AC power and supplying the AC power to a commercial system power supply; and means for generating the switching pattern signal by pulse width modulation based on a sine wave error signal. Means for detecting a zero cross point of the system voltage and generating a synchronization signal,
Sinusoidal waveform data having a plurality of types of amplitude values proportional to the amplitude value of the rated output current waveform of the inverter. Each of the amplitude values has a waveform number in the order of the magnitude of the amplitude value. Waveform pattern storage means which stores in advance digital value data having individual quantized amplitude values at time positions equally divided into a large number in the time axis direction for each sine wave waveform, and an inverter detected at an arbitrary cycle. A means for digitally calculating and storing a power value based on an input current, an input voltage or an output current, and an output voltage, and comparing the previous power value with the current power value. Means for designating a waveform number at which the amplitude value is increased by one step, and specifying a waveform number at which the amplitude value is decreased by one step when the power value is decreasing, and providing the waveform number as a read signal to the waveform pattern storage means At the timing of the synchronizing signal, reading of the sine waveform pattern signal is started from the waveform pattern storage means based on the read signal, and the quantized amplitude value of the determined sine waveform pattern is continuously changed at a predetermined minute cycle. Means for changing and reading as a sinusoidal waveform pattern signal; and means for generating the sinusoidal error signal from an error between the sinusoidal waveform pattern signal read from the waveform pattern storage means and the detected inverter output current signal. It is characterized by:

[0018]

The waveform pattern storage means has a plurality of types of amplitude values proportional to the amplitude value of the rated output current waveform of the inverter. Each amplitude value has a waveform number in the order of the magnitude of the amplitude value. Sine wave waveform data is stored in advance as digital value data having individual quantized amplitude values at time axis positions for each sine wave waveform of the number. Then, the calculation of the power value which is the basis of the designation of the waveform number for determining the sine wave waveform data of which amplitude value is to be read from the waveform pattern storage means is also performed digitally. Thus, the ratio of digital processing is large.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a system interconnection type inverter according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a configuration diagram of a grid-connected solar power generation system to which a grid-connected inverter according to an embodiment of the present invention is applied. In this system, the solar cell 32 is connected to a grid-connected inverter 31, and the grid-connected inverter 31 is connected to an existing commercial power supply 34 via a commercial transformer 33. The grid interconnection inverter 31 converts the DC power generated by the solar cell 32 into 60/50 Hz AC power by PWM (Pulse Width Modulation) control and supplies the AC power to the commercial power supply 34.

The system interconnection inverter 31 includes a backflow prevention diode 35, a noise filter 36, an input capacitor 37 for suppressing fluctuations in input power from the solar cell 32, and an FET bridge 38 comprising a bridge of four switching power MOS-FETs. , An output choke coil 39 having a function of an output filter and converting a rectangular wave into a sine wave, a smoothing capacitor 40, an interconnection relay 41, a noise filter 42, an input current detection current transformer (CT) 43, and an output current detection current And a control circuit 45. The noise filters 36 and 42 are inserted in the input / output part to prevent the noise generated in the inverter 31 from flowing out. Interconnection relay 41
Is to supply the inverter output to the commercial system power supply 34 via the commercial transformer 33 after detecting that the voltage of the system interconnection inverter 31 has been established.

A flywheel diode is connected to each of the four switching transistors Q1 to Q4 in the FET bridge 38 in reverse polarity. The FET bridge 38 is connected to a gate drive signal generation circuit 5 described later.
, The transistors Q1 and Q2 are simultaneously turned on.
Then, the transistors Q3 and Q4 are simultaneously turned off, and conversely, when the transistors Q3 and Q4 are simultaneously turned on, the transistors Q1 and Q2 are simultaneously turned off.

The control circuit 45 includes a signal operation processing section 46, a synchronization signal detection section 47, a sine wave waveform pattern storage section 48,
Gate drive signal generation circuit 51 for driving error amplifier 49, PWM modulation control unit 50, and FET bridge 38
It is composed of

FIG. 2 is a block diagram showing a detailed internal configuration of the waveform pattern storage section 48. The main element of the signal processing unit 46 is the CPU 60. Waveform pattern storage unit 48
Are an address setting switch 61, an address decoder circuit 62, OR gates 63 and 64, a latch circuit 65, a clock / frequency dividing circuit 66, a counter circuit 67, and a memory 68.
It is composed of 69 is an address bus, 70 is a data bus.

Next, the operation of the grid-connected solar power generation system having the above configuration will be described.

Basically, based on a gate pulse signal S19 output from the gate drive signal generation circuit 51 after being subjected to PWM control by a sine wave in the PWM modulation control section 50, a pair of switching transistors Q1, Q2 and a pair of switching transistors Q3 and Q4 are alternately turned ON / OFF to perform switching, thereby connecting this system interconnection inverter 31.
Is controlled so that a sine wave current flows as the output current of the solar cell 32, and the output power of the solar cell 32 is supplied to the commercial system power supply 34.

In this case, the sinusoidal waveform pattern signal S15 read from the waveform pattern storage unit 48 and the inverter output current signal S15 detected by the output current detection current transformer 44.
14 is input to an error amplifier 49, and the difference between the two is amplified and converted into a sine wave error signal S17 by a PWM modulation control unit 50.
Is input to The PWM modulation control unit 50 generates a switching pattern signal S18 by PWM modulation based on the sine wave error signal S17, and outputs it to the gate drive signal generation circuit 51. Switching pattern signal S18
, The gate drive signal generation circuit 51 outputs the gate pulse signal S19 to the FET bridge 38, and sets the transistors Q1 and Q2 and the transistors Q3 and Q4 to O.
N / OFF to generate a rectangular wave. The rectangular wave is converted into a sine wave current by an output filter including an output choke coil 39 and a smoothing capacitor 40, and is supplied to a commercial system power supply 34 via an interconnection relay 41. As a result, feedback control is realized such that the output current of the grid interconnection inverter 31 matches the sinusoidal waveform pattern signal S15 read from the waveform pattern storage unit 48.

As for the sine wave waveform pattern stored in the waveform pattern storage section 48 in advance, a plurality of sine wave waveform patterns having different amplitude values are prepared in order to directly affect the output current waveform of the inverter 31. That is, the amplitude value of the sine wave waveform pattern is proportional to the magnitude of the inverter output current, and reading a sine wave waveform pattern with a large amplitude value increases the inverter output current, and reading a sine wave waveform pattern with a small amplitude value. And the inverter output current is reduced.

For example, as shown in FIG. 3, 256 kinds of sine wave waveform patterns from No. 0 to No. 255 having different amplitude values are prepared. When the waveform pattern having the smaller amplitude value is sequentially read, the output current of the grid interconnection inverter 31 increases in accordance with the amplitude value of the read waveform pattern. Waveform numbers are assigned to the 256 sine wave waveform patterns in the order of magnitude of amplitude value. The waveform number of the waveform pattern having the minimum amplitude value is “0”, and the waveform number of the waveform pattern having the maximum amplitude value is “255”.

However, the input power supply of the grid interconnection inverter 31 is not a power supply capable of supplying arbitrary power, such as a power system or a storage battery, but a solar battery. This solar cell
As is well known, this is a special power supply in which the electric power that can be supplied according to the amount of solar radiation changes every moment. Therefore, regarding the reading of the sine wave waveform pattern in the control circuit 45, a waveform pattern having an arbitrary amplitude value is read out from the above-described waveform patterns having 256 amplitude values, and an arbitrary inverter output corresponding to the amplitude value is read. Even when trying to obtain a current value, the input from the solar cell 32 which is the power supply of the inverter 31
It is conceivable that there is a shortage depending on the output current of the inverter 31 to be obtained. In such a case, the control circuit 45 falls out of control.

Accordingly, in reading the sine wave waveform pattern for determining the output current of the grid interconnection inverter 31, the output of the solar cell 32 is detected, and a waveform that can output the inverter output current corresponding to the output of the solar cell 32 is output. It is necessary to control the control circuit 45 to read out the pattern.

As a practical example of the reading control of the sine wave waveform pattern, first, when the waveform pattern of the waveform number 0 having the minimum amplitude value is read, the output of the inverter 31 becomes minimum. The input voltage V _DC and the input current I _DC to the inverter 31 are detected, the output power of the solar cell 32 is calculated from the product thereof, and the values are temporarily stored using a memory or the like. Then, the solar cell 32 at the time of reading out the waveform pattern of the waveform number 1 whose amplitude value is one step larger than the waveform pattern of the waveform number 0
Output power is detected and stored in the same manner. Then
The previous output power value is compared with the current output power value. If the current output power value is larger, the larger current output power value is stored in place of the previous output power value, and A waveform pattern having a large amplitude value by one stage is read. Then, the output power at this time is detected,
The same processing as described above is repeatedly executed. Conversely, the previous output power value is compared with the current output power value, and if the current output power value is smaller, a waveform pattern having one step smaller amplitude value is read. Then, the output power at this time is detected, and the same processing as described above is repeatedly executed.

As described above, defective control such as requesting the output current of the inverter 31 to exceed the output power of the solar cell 32 can be avoided, and the inverter output current control at that time can be avoided. The output current value can be controlled to an appropriate value corresponding to the power of the solar cell 32.

On the other hand, the waveform number of the sine wave waveform pattern needs to be defined in advance from the relationship among the waveform pattern, the amplitude value, and the rated output current of the inverter. That is, in this embodiment, the inverter rated output current is 0 to 30 A.
(Effective value), the magnitude of this rated output current value is 2
When divided into 56 stages, 2 for each output current
Waveform patterns having 56 amplitude values are defined as waveform numbers 0 to 255 in ascending order of amplitude value. By setting in advance as described above, the amplitude value of the waveform pattern increases as the waveform number increases, and the output current also increases in proportion to this.

Next, storage of the sine wave waveform pattern will be described in detail with reference to the block diagram of the waveform pattern storage unit 48 shown in FIG.

Here, for one cycle of a sine wave waveform pattern having an arbitrary amplitude value, time is taken on the X-axis, the scalar amount of the waveform pattern is shown on the Y-axis, and one cycle in the X-axis direction is represented. A scalar amount in the Y-axis direction, that is, a quantized amplitude value for each 1/256 cycle when 256 is equally divided is stored in the memory 68 in advance as a digital value. Therefore, one cycle of sine wave waveform data having an arbitrary amplitude value is configured as digital value data representing 256 quantized amplitude values (scalar amounts). That is, one by one
Each of the sine wave waveform data according to the two sine wave waveform patterns is composed of 256 digital value data (quantized amplitude values).

In this embodiment, a 1-Mbit memory 68 having a data bit width of 16 bits is used as a storage element for the sine wave waveform data. Part 1
Using the lower 8 bits of the memory address specified by the 6-bit width, the sine wave
It is stored as digital value data of six quantized amplitude values (scalar amounts). Further, a waveform number (0 to 255) for determining the amplitude value of the sine wave waveform pattern is stored using the remaining upper 8 bits of the memory address.
As described above, the waveform numbers are 256 types of waveform patterns having different amplitude values from No. 0 to 25 in ascending order of amplitude value.
Numbered up to No. 5.

As described above, 256 digital value data are stored for each of the 256 types of waveform patterns. That is, a total of 256 × 256 =
65,536 data (16-bit length) are stored.

As described above, at each address (16 bits long) in the memory 68, the scalar amount forming the sine wave waveform pattern is stored as a 16-bit digital value. Here, the waveform number data (0 to 255) specified by the upper 8 bits of the memory address is converted into digital value data of the quantized amplitude value (scalar amount) for one cycle of the sine wave waveform pattern specified by the lower 8 bits. All have the same number. Thus, one cycle of the sine waveform pattern indicates a sine waveform pattern having an arbitrary amplitude value defined by the waveform number data. More specifically, for example, 256 data of one cycle of a sine wave waveform pattern having the smallest amplitude value defined by the waveform number data 0 are stored at addresses 0000H to 00FFH of the memory 68. become. Hereinafter, data of one cycle of the sine wave waveform pattern is stored in the memory space as follows.

0000H to 00FFH: one cycle of sine waveform data of waveform number 0 (minimum amplitude value) 0100H to 01FFH: one cycle of sine waveform data of waveform number 1 0200H to 02FFH: sine of waveform number 2 One cycle of wave waveform data 0300H to 03FFH ... one cycle of sine waveform data of waveform number 3 FE00H to FEFFH ... one cycle of sine waveform data of waveform number 254 FF00H to FFFFH ... waveform One cycle of sine wave waveform data of number 255 (maximum amplitude value) As described above, the amplitude value of the sine wave waveform pattern is proportional to the amplitude value of the inverter output current waveform, that is, the inverter output. Therefore, when determining the magnitude of the amplitude value of the waveform pattern, the inverter output is obtained as a result of performing PWM control based on the waveform pattern.
Here, the amplitude value of the waveform pattern from which the rated output of the inverter is obtained is defined as the maximum value of the amplitude value (the amplitude value of the sine wave waveform pattern with the waveform number 255). Then, the maximum value of the amplitude value is defined as a sine wave waveform pattern of waveform number 0 as a minimum value of the amplitude values obtained by dividing the maximum value into 256.

Further, doubling the amplitude value of the waveform number 0 is the amplitude value of the waveform number 1, doubling the amplitude value of the waveform number 2,... The multiplied value is used as the amplitude value of the waveform number 255. As described above, 256 sine wave waveform patterns represented by digital value data of quantized amplitude values (scalar amounts) obtained by dividing one cycle into 256 are stored in the 1-Mbit memory 68. The 256 waveform patterns have different amplitude values.

Next, a method for reading the sine wave waveform data stored in the memory 68 will be described.

As described above, the sine wave waveform data in the memory 68 is stored as a quantized amplitude value (scalar amount) at each specified address, and when reading out the sine wave waveform data, this address is used. The sine wave waveform data is formed by sequentially designating the data at the fixed time intervals and reading out the data stored at the respective addresses at the fixed time intervals.

Here, when specifying the memory address, the lower 8 bits (A0 to A7) of the address indicate the storage location of the digital value data of the quantized amplitude value (scalar amount) constituting one cycle of the waveform pattern. Decided, Top 8
As described above, the bits (A8 to A15) determine the storage location of the waveform number indicating the magnitude of the amplitude value of the waveform pattern. From the above, the input terminals A0 to A7 for determining the lower 8-bit address of the memory 68
When values from 0 (00H) to 255 (FFH) are sequentially input at a fixed time interval, digital value data of a quantized amplitude value (scalar amount) having a resolution of 16 bits for each input address. Are the output terminals Q0
It is output to Q15 at regular time intervals. Then, the sinusoidal waveform pattern signal S15 is output from the output terminals Q0 to Q15 in the form of an aggregate of these output digital value data of the quantized amplitude value (scalar amount).

Here, it is further added that input terminals A8 to A1 for determining the address of the upper 8 bits of the memory 68.
When a value of 0 (00H) is input to 5, the amplitude value of the sine wave pattern signal S15 output to the output terminals Q0 to Q15 is the minimum value, and a value of 255 (FFH) is input. At this time, the amplitude value of the output sine wave pattern signal S15 is the maximum value.

It is the counter circuit 67 that supplies the address of the lower 8 bits to the memory 68.

The counter circuit 67 receives an arbitrary frequency clock output from the clock / frequency dividing circuit 66 and functions as an 8-bit binary counter. Therefore, for example, (60 × 2
When a clock having a frequency of 56 × １ ／) Hz is input to the counter circuit 67, 1 / (60 × 25)
6) The output terminals Q0 to Q of the counter circuit 67 every second
7 changes so as to add the contents one by one.

The output terminals Q0 to Q7 of the counter circuit 67 are connected to the input terminals A0 to A7 for determining the lower 8-bit address of the memory 68. Therefore, the contents of the output terminals Q0 to Q7 of the counter circuit 67 are 1 / (60 × 25
6) The fact that 1 is added every second means that the lower 8-bit address of the memory 68 is 1 / (60 × 256).
That is, the count is incremented by 1 from 0 to 255 every second and changes, and as a result, the memory 68 stores 1 /
Addresses XX00H to XXFFH are designated at intervals of 1 / (60 × 256) sec during 60 sec. Then, 256 digital value data of the quantized amplitude value (scalar amount) stored in each address are sequentially read from the output terminals Q0 to Q15 of the memory 68,
One cycle of the sinusoidal waveform pattern signal S15 of Hz is constituted.

Here, the lower 8 bits clear terminal CLR
Synchronization signal detection unit 47 synchronization signal has been detected zero-cross point of the detected system voltage V _CS (see FIG. 1) S1
0 is input via the CPU 60 of the signal processing unit 46. Since the count operation of the counter circuit 67 is cleared each time the synchronization signal S10 is input, the read operation of the sine wave waveform data is reset every cycle of the system voltage _VCS , and the read operation of the above-described waveform pattern is performed. Will be repeated. Therefore, the system voltage V
An inverter output current having the same phase as _CS (no phase shift) can be supplied to the commercial system power supply 34 via the commercial transformer 33.

A case where the maximum power point tracking control is satisfactorily performed so that the maximum power can always be taken out even if the voltage-current characteristics of the solar cell 32 fluctuate will be described. When using the system interconnection inverter 31 as described above in combination with a solar cell 32, the action of the signal processing unit 46, an input voltage signal V _DC from a solar cell 32 S11 and I
_After sampling the _DC input current signal S12 at an arbitrary cycle and converting these analog signals into digital quantities, the product of the two digital quantities is calculated to obtain the DC input power value, that is, the solar cell output power value. At this time, sampling intervals of the input voltage signal S11 and the input current signal S12 are arbitrary. The power value may be obtained using output voltage signal S13 and output current signal S14 instead of input voltage signal S11 and input current signal S12 for inverter 31.

The obtained power value is always stored once in the memory. Then, the power value, which is the result of the current calculation by the next sampling, is compared with the previous power value stored in the memory. Based on the magnitude relationship, it is determined whether the waveform number described above is increased by one or decreased by one. Then, the current power value is stored in the memory in place of the previous power value, and is compared with the next power value obtained by the next sampling.

By repeating the above operation, the waveform numbers are increased until the maximum power of the solar cell 32 is obtained, and the output of the grid-connected inverter 31 is
2 to a value commensurate with the maximum output.

Of course, the waveform number is 0 because the soft start control must be performed when the inverter 31 is started.
(The amplitude value is the minimum value of 1/256 of the rated output). At this time, the signal calculation processing unit 46 calculates the input power value when the waveform number is set to 0, but sets the initial value 0 W as the previous power value to be compared and performs control at the time of starting without any trouble. It is like that.

Memory 6 for determining amplitude value of waveform pattern
The 8-bit data bus 70 of the CPU 60 constituting the signal operation processing unit 46
(D0-D7) directly. Hereinafter, a specific description will be given.

The CPU 60 outputs an I / O request signal I
The ORQ and the write signal WR are output, and the logical sum of these signals is input to the enable terminal E of the latch circuit 65 as a latch signal. As a result, the CPU 60
Are latched from input terminals D0 to D7 of latch circuit 65 to output terminals Q0 to Q7. Then, the data is input from the output terminals Q0 to Q7 of the latch circuit 65 to the input terminals A8 to A15 of the upper eight bits of the memory 68.

As described above, the 8-bit data on the data bus 70 when the CPU 60 accesses the address of the waveform pattern storage unit 48 by the write command is stored in the memory 68.
Are input to the upper 8-bit addresses A8 to A15 of FIG. That is, the 8-bit data (one of 0 to 255) written from the CPU 60 to the upper 8-bit addresses A8 to A15 of the memory 68 of the waveform pattern storage unit 48 is the magnitude of the amplitude of the sine wave waveform pattern signal S15 ( (One of 256 patterns) is determined. The 8-bit data output from the CPU 60 to the data bus 70 is determined depending on whether the current power value has increased or decreased from the previous power value.

[0057] In the above, the synchronization signal S10 output from the synchronization signal detector 47, a detection signal of the zero-cross point of the sinusoidal waveform of the voltage V _CS of the power system as shown in FIG. The synchronization signal S10 is input from the CPU 60 to the clear terminal CLR of the counter circuit 67, and the counter circuit 67 is reset by the synchronization signal S10. This is because the inverter 31 can always output a current having the same phase as the voltage waveform of the commercial system power supply 34 by resetting the reading count of the sine waveform data for each cycle of the sine wave voltage waveform of the commercial system power supply 34. It is to control as follows. The timing of reading the sine wave data is taken by the synchronization signal S10. In the present embodiment, the synchronization signal S1 is read.
Reading of the sine wave waveform data is started for one cycle from the zero cross point with 0 as a trigger. And repeat that. As a result, the system interconnection inverter 31 can supply the commercial system power supply 34 with an output current having the same phase as the system voltage.

FIG. 5 shows the output characteristics of the solar cell 32. Voltage is plotted on the horizontal axis and current is plotted on the vertical axis. Insolation intensity (E1,
E2, E3) as parameters. The output characteristics change every moment due to changes in solar radiation intensity and element temperature. Here, assuming that an output characteristic curve at a solar radiation intensity of E1 (1 kW / m ² ) and an element temperature of 25 ° C. is a in FIG.
The output voltage value and output current value of the solar cell are determined by the output characteristic curve a according to the impedance of the load provided on the output side of the solar cell.
Change on. Therefore, the output power value of the solar cell also changes.

Here, assuming that the impedance of the load provided at the output terminal of the solar cell is R, the output voltage value and output current value of the solar cell at this time are represented by a point p which is an intersection of the characteristic curve a and the load impedance straight line R. It becomes the value in. This point p
Is called the operating point of the solar cell.

By changing the load impedance R, the operating point p of the solar cell moves on the output characteristic curve a, and the output voltage value and output current value of the solar cell change.

The grid-connected inverter 31 is provided as a load of the solar cell 32 itself. Changing the impedance R of the system interconnection inverter 31 means that
That is, it can be realized by changing the above-mentioned waveform number (the amplitude value of the sine wave waveform data). This is because the duty ratio of the switching pattern signal S18, which is the source of the gate pulse signal S19 for switching the FET bridge 38 in the inverter 31, can be changed by changing the waveform number.

Thus, by changing the waveform number, the operating point p on the output characteristic curve a of the solar cell 32 can be controlled to an arbitrary point as shown in FIG. That, p the operating point the load impedance is changed from R ₀ to R ₁ by increasing the amplitude value of the sinusoidal wave pattern signal S15 coming read from the waveform pattern storage unit 48 in the system interconnection inverter 31 from p _{0 1} To reduce the operating point voltage of the solar cell 32 from V ₀ to V ₁ (the current increases), or
Sinusoidal waveform pattern signals V ₂ a load impedance by decreasing the amplitude value operating point voltage of the solar cell 32 by changing the operating point is changed to R ₂ from p ₀ from R ₀ to p ₂ from V ₀ at S15 (Current decreases). Note that R ₁ <R ₀ <R ₂ , V
₁ <a V ₀ <V _2. The output voltage of the solar cell 32 decreases as the amplitude value increases, and the output voltage increases as the amplitude value decreases. As described above, by controlling the amplitude value of the sine waveform pattern signal S15, the output power value of the solar cell 32 can be arbitrarily adjusted.

Next, a detailed operation example of the maximum power point tracking control will be described with reference to FIG. FIG. 6 shows a solar cell output characteristic curve in which the horizontal axis represents voltage and the vertical axis represents power.

As described above, the system interconnection inverter 31
Basically controls the duty ratio of the gate pulse signal S19 of the FET bridge 38 so that the output current of the inverter 31 becomes equal to the current value given by the amplitude value of the sine wave waveform data defined by the waveform number. That is.
Here, when determining the waveform number of the sine waveform data, the signal arithmetic processing unit 46 determines the waveform number of the sine waveform pattern corresponding to the maximum output power of the solar cell 32.
That is, as shown in FIG. 6, the output power P _B (input power of the inverter 31) of the solar cell 32 at the current waveform number X _B and the stored previous waveform number X _A (X _A <X
Comparing the value of the output power P _A in _B).

[0065] For voltage, although lower the current of the voltage V _B as compared to previous voltage V _A, since the present output power P _B is larger than the output power P _A of the previous, only one waveform number larger, and X _C. Although the voltage drops to V _C, the output power P _C of the solar cell 32 is higher than the previous power P _B. Therefore further waveform number as large as one to X _D. Voltage drops to V _D. However, since the current output power P _D is smaller than the stored previous output power P _C , the waveform number is reduced by one. Then, the operating voltage returns to V _C , and the output power becomes P _C
Return to

As described above, the waveform number is changed from X _A → X _B → X
_By changing _C → X _D → X _C in this order, the solar cell 32
Output power changes in the order of P _A → P _B → P _C → P _D → P _C. The operating point of the solar cell 32 moves toward A → B → C → D → C toward the maximum power point. In FIG. 6, the movement amount is set large for easy understanding,
If the amplitude value of one step of the waveform number changed by one control is made as small as possible as long as the control speed and the control accuracy are allowed, the control characteristic of the maximum power point tracking control is improved.

As described above, the control for following the waveform number (sinusoidal waveform pattern proportional to the amplitude value of the output current) of the grid-connected inverter 31 that maximizes the output power of the solar cell 32 is performed. In this embodiment, this control is realized by software control using a microcomputer in the signal operation processing unit 46 shown in FIG.

By the above series of operations, the grid interconnection inverter 31 can determine the solar cell operating point at an arbitrary point on the solar cell output characteristic curve by controlling the waveform number. Inverter 31 can always operate by tracking the maximum power point that can be extracted from solar cell 32.

Further, the system interconnection inverter 31 can control not only to track the maximum point of the solar cell output but also to take out an arbitrary solar cell output by the above control method. This corresponds to the following. When the solar radiation intensity and the element temperature change, the characteristic curve of the solar cell itself changes, so that the operating point p of the solar cell moves even if the impedance R of the load does not change. Further, even if the solar radiation intensity and the element temperature are constant, if the impedance R of the load is changed, the operating point p of the solar cell moves. Therefore, the signal operation processing unit 46 sends the
Specifies the output power value, by determining the waveform number to match this power value, the input impedance of the inverter 31 takes the impedance R _X commensurate with the waveform number, as desired, with the specified power value It can be controlled by the operating point p _X at which a coincident solar cell output is obtained.
Hereinafter, a specific description will be given.

When the operating point of the solar cell 32 is positively moved on the output characteristic curve to freely adjust the inverter output power at a point smaller than the maximum power point, the CPU 60
The address of the waveform pattern storage unit 48 as viewed from above is set in advance to an arbitrary value determined by 8-bit data using the address setting switch 61. Then, when the CPU 60 accesses the preset address of the waveform pattern storage unit 48 by a write command using the 8-bit address bus 69 (A0 to A7), the address coincidence is performed from the P = Q terminal of the address decoder circuit 62. Signal is output,
Also, the CPU 60 outputs an I / O request signal IORQ.
And the write signal WR are output, and the logical sum of these signals is input to the enable terminal E of the latch circuit 65 as a latch signal. As a result, 8-bit data on the data bus 70 (D0 to D7) designated by the CPU 60 is latched from the input terminals D0 to D7 of the latch circuit 65 to the output terminals Q0 to Q7. Then, the data is input from the output terminals Q0 to Q7 of the latch circuit 65 to the input terminals A8 to A15 of the upper eight bits of the memory 68.

As described above, the 8-bit data on the data bus 70 when the CPU 60 accesses the address of the waveform pattern storage unit 48 by the write command is stored in the memory 68
Are input to the upper 8-bit addresses A8 to A15 of FIG. That is, the 8-bit data (one of 0 to 255) written from the CPU 60 to the upper 8-bit addresses A8 to A15 of the memory 68 of the waveform pattern storage unit 48 is the magnitude of the amplitude of the sine wave waveform pattern signal S15 ( (One of 256 patterns) is determined. Which one to use depends on 8-bit data, which can be arbitrarily determined.

By using the above method, the CPU
Numeral 60 designates a waveform number indicating the magnitude of the amplitude value in the address setting switch 61 of the waveform pattern storage section 48 and writes the address of the waveform number to the address decoder circuit 62 via the address bus 69. Sine wave waveform data having different amplitudes can be read freely. For this reason, about 8 bits are sufficient for the arithmetic processing capability of the CPU 60, and there is no need to use an expensive CPU capable of high-speed processing. Further, since the amplitude value of the read sine wave waveform data is proportional to the amplitude value of the output current waveform of the inverter 31 and the inverter output power, the upper 8-bit addresses A8 to A15 of the memory 68 of the waveform pattern storage unit 48, the sine wave By writing a waveform number from 0 to 255 (00H to FFH) indicating the amplitude value of the waveform data, it is possible to realize a grid-connected current control type inverter that can freely control the inverter output power.

In the above embodiment, the data of the sinusoidal waveform pattern is stored in units of one cycle. However, the data may be stored in units of 周期 cycle or １ ／ cycle and corrected after reading. Good.

As described in detail above, according to the present invention,
The output power control in the grid interconnection inverter 31 can be easily performed, and the maximum power point tracking control of the solar cell 32 can be easily realized. Since many parts of the signal processing are digitally processed, the control circuit 45 can be simplified and a high-quality output current waveform with small harmonic distortion can be obtained. In addition, various household appliances such as an air conditioner and a refrigerator can be driven by effectively utilizing the natural energy of the solar battery 32. When the natural energy is low, it is supplemented with power from the grid power supply,
If there are many, return the power to the system power supply. Alternatively, by appropriately controlling the power, the user can be provided with the same convenience as before without being aware of the distinction between the power from the solar cell and the power from the system power supply, and also provides a more comfortable living environment. . Even from the power supply side, the widespread use of this system has the effect of suppressing peak power consumption especially during the daytime in summer. This is extremely effective for both power consumers and suppliers. In addition, great effects can be expected on the global environment by using environmentally friendly natural energy.

[0075]

As described above, according to the present invention, a sinusoidal waveform pattern signal to be compared with an inverter output current signal to generate a sinusoidal error signal based on a pulse width modulation switching pattern signal. The sine wave waveform data as digital value data is stored in advance in the waveform pattern storage means, and is read and used.
Since the calculation of the power value for determining the waveform number to be read is also performed digitally, the control circuit is simplified, and the distortion rate of the output current waveform of the inverter can be suppressed to ensure good power quality.

Further, not only can accurate maximum power point tracking control corresponding to the current output power of a DC power supply such as a solar cell be performed, but also it is possible to derive an arbitrary amount of power within a range below the maximum power point. It can be easily realized.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a grid-connected solar power generation system to which a grid-connected inverter according to an embodiment of the present invention is applied.

FIG. 2 is a block diagram illustrating a detailed internal configuration of a waveform pattern storage unit according to the embodiment.

FIG. 3 is a waveform diagram of 256 (mostly omitted) sinusoidal waveform patterns having different amplitude values.

FIG. 4 is a waveform diagram showing a relationship between a power system voltage and a synchronization signal.

FIG. 5 is a view showing an output characteristic curve of a solar cell.

FIG. 6 is an explanatory diagram showing a detailed operation of the maximum power point tracking control.

FIG. 7 is a block diagram showing a grid-connected solar power generation system to which a conventional grid-connected inverter is applied.

[Explanation of symbols]

31 ... system interconnection inverter 32 ... solar cell 33 ... commercial transformer 34 ... commercial system power supply 35 ... backflow prevention diode 36 ... noise filter 37 ... input capacitor 38 ... FET bridge 39 ... output choke coil 40 Smoothing capacitor 41 Interconnection relay 42 Noise filter 43 Input current detection current transformer 44 Output current detection current transformer 45 Control circuit 46 Signal operation processing unit 47 ... Synchronous signal detection unit 48... Waveform pattern storage unit 49... Error amplifier 50... PWM modulation control unit 51... Gate drive signal generation circuit 60... CPU 61... Address setting switch 62. ... Latch circuit 66 ... Clock / frequency dividing circuit 67 ... Counter circuit 68 ... Memory 69 ... Address Bus 70 Data bus S10 Synchronization signal S11 Input voltage signal S12 Input current signal S13 Output voltage signal S14 Output current signal S15 Sine waveform pattern signal S17 Sine error signal S18: Switching pattern signal S19: Gate pulse signal

──────────────────────────────────────────────────続 き Continuation of front page (72) Inventor Hiroshi Nakada 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (56) References JP-A-5-46265 (JP, A) JP-A-7- 194134 (JP, A) (58) Field surveyed (Int. Cl. ⁷ , DB name) G05F 1/67 H02M 7/48

Claims (1)

(57) [Claims] A means for controlling ON / OFF of a bridge of a switching element based on a switching pattern signal to convert DC power input from a DC power supply such as a solar cell into AC power and supply the AC power to a commercial power supply; Means for generating the switching pattern signal by pulse width modulation based on a wave error signal, means for detecting a zero cross point of the system voltage to generate a synchronization signal, and a plurality of means in proportion to the amplitude value of the rated output current waveform of the inverter. Sine wave waveform data having different amplitude values, each waveform value having a waveform number in the order of the magnitude of the amplitude value, and a large number of sine wave waveforms of each waveform number in the time axis direction. Waveform pattern storage means pre-stored digital value data having individual quantized amplitude values at divided time positions, and detection at any cycle Means for digitally calculating and storing the power value based on the input current, input voltage or output current, and output voltage of the inverter, and comparing the previous power value with the current power value to determine whether the power value has increased. When the power value is decreasing, a waveform number whose amplitude value is decreased by one step is designated, and when the power value is decreasing, a waveform number whose amplitude value is decreased by one step is designated as a read signal to the waveform pattern storage means. Means for providing, and starting reading a sine wave pattern signal from the waveform pattern storage means based on the read signal at the timing of the synchronization signal, and setting the quantized amplitude value of the determined sine wave pattern to a predetermined minute period. Means for continuously changing the waveform pattern signal as a sinusoidal waveform pattern signal; Means for generating the sine wave error signal from an error with respect to the output current signal.