JP3108797B2 - Method for manufacturing high dielectric constant dielectric thin film - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates relates to a method of manufacturing a high-k dielectric thin film, and more particularly SrTiO ₃ system manufacturing method of the high-k dielectric thin film.

A dielectric film has an insulating property and is used as a medium for transmitting an electric field. For example, a capacitor dielectric film of a dynamic random access memory (DRAM) or an insulated gate field effect transistor (IGF)
ET) is used as a gate insulating film.

[0003] In these applications, it is desired that the dielectric film has a dielectric constant as high as possible. As a dielectric film in a semiconductor device, SiO ₂ , Si ₃ N ₄ or the like has been usually used. However, the dielectric constant of these dielectric films is not always high, and a dielectric film with a higher dielectric constant is required.

[0004]

2. Description of the Related Art For example, DRAMs have been increasingly integrated. With a 64 Mbit memory currently under development, the memory cell area is about 1.5
μm ² and to suppress the increase in power consumption,
Low voltage operation is also required. In order to accumulate a desired amount of electric charge with a small area and a low voltage, it is desired to increase the capacitor capacitance obtained with the same substrate surface area.

In a DRAM, it is necessary to prevent soft errors due to α rays. Since the amount of charge generated by the incidence of α rays is constant, the capacitance of a DRAM capacitor cannot be reduced significantly even if the cell area is reduced. The amount of signal charge that can be stored in the capacitor is the product of the capacitance and the operating voltage.
It is necessary to further increase the capacitance.

The capacitance C of a capacitor is determined by the electrode area S of the capacitor, the thickness d of the dielectric film, and the relative permittivity ε _{d of the} dielectric.
And the following relationship. C = ε _o ε _d S / d (1) where ε _o is the dielectric constant of a vacuum. In this specification, the term “permittivity” simply refers to the relative permittivity.

In order to increase the capacitance of the capacitor, it is necessary to increase the electrode area S, decrease the thickness d of the dielectric film, and increase the relative permittivity ε _d of the dielectric. Conventionally, mainly
SiO ₂ or Si ₃ N ₄ has been used as the dielectric, and the capacitance of the capacitor has been increased by increasing the electrode area S of the capacitor and decreasing the thickness d of the dielectric film.

However, thinning of the capacitor dielectric film is facing physical limitations. The Si ₃ N ₄ / SiO ₂ multilayer films conventionally used, 5 of SiO ₂ film equivalent
When the thickness is reduced to less than nm, the leak current increases. Therefore, it is extremely difficult to further reduce the dielectric film of the capacitor.

For this reason, a capacitor dielectric film which can be made as thin as 4 nm or less in terms of SiO ₂ film is desired. Based on this request, PZT, CaTiO ₃ , SrTiO
₃ , PbTiO ₃ , BaTiO ₃ , Bi ₄ Ti ₃ O ₁₂ ,
High dielectric constant thin films such as Sr ₂ Bi ₄ Ti ₄ O ₁₈ have been developed. Hereinafter, the SrTiO ₃ based dielectric thin film will be described.

The dielectric constant of a SrTiO ₃ thin film formed on a Si substrate by MOCVD (metal organic chemical vapor deposition) or the like is significantly lower than that of bulk SrTiO ₃ . This is the process of depositing SrTiO ₃ -based high dielectric constant oxide,
Low dielectric constant (3.8 to 3.9) SiO _{2 on} Si substrate surface
Is considered to be formed. To avoid this,
There has been proposed a method of interposing a barrier metal such as Pt which has an action of preventing reaction with Si.

When a barrier metal layer is formed on a Si substrate, since the barrier metal layer is conductive, the barrier metal layer must be separated to separate each element. If the barrier metal layer is patterned before the formation of the dielectric film, a step occurs due to the barrier metal layer.

Since the SrTiO ₃ dielectric has low step coverage, it is difficult to sufficiently cover the steps of the barrier metal layer. When the dielectric film and the barrier metal layer are patterned together after the formation of the dielectric film, the side surfaces of the barrier metal layer are exposed. When further forming an electrode layer on this,
It becomes necessary to form another insulating film in order to insulate the side surface of the barrier metal layer.

[0013]

As described above,
If an attempt is made to form a SrTiO ₃ based dielectric film on a Si substrate, the dielectric constant of the obtained SrTiO ₃ based dielectric film will be lower than that in a bulk state. Attempting to obtain a high dielectric constant complicates the manufacturing process.

An object of the present invention is to provide Sr having a high dielectric constant.
An object of the present invention is to provide a novel method for producing a TiO ₃ -based dielectric thin film.

[0015]

According to the present invention, there is provided a method for producing a high dielectric constant dielectric thin film, comprising the steps of: depositing an amorphous SrTiO ₃ -based thin film on a base at a temperature lower than 400 ° C .; Obtaining a SrTiO ₃ -based thin film by crystallizing the SrTiO ₃ -based thin film by laser annealing.

[0016]

The amorphous Sr is formed on the underlayer at a temperature lower than 400.degree.
When a TiO ₃ -based thin film is deposited, the reaction between the SrTiO ₃ -based dielectric and the base during deposition can be sufficiently suppressed.

However, in this state, the amorphous SrTiO ₃
The system dielectric thin film shows only a low dielectric constant. Amorphous S
By subjecting the rTiO ₃ -based thin film to laser annealing to crystallize SrTiO ₃ , a high dielectric constant can be obtained. According to laser annealing, SrTiO ₃
It is possible to reduce the reaction between the thin film and the base.

[0018]

FIG. 1 shows a SrTi according to a basic embodiment of the present invention.
1 schematically illustrates a method for producing an O ₃ -based thin film.

As shown in FIG. 1A, first, an underlayer 1 is prepared, and an SrTiO ₃ -based thin film 2 is deposited thereon at a temperature of 400 ° C. or less in an amorphous state. The base 1 is made of, for example, Si
A substrate, having a conductive surface. Base 1 has S
The Si substrate on which the i-compound thin film 4 is formed may be used.

By depositing the SrTiO ₃ -based thin film 2 at a low temperature, the reaction between the SrTiO ₃ -based dielectric and the underlayer 1 can be minimized. However, according to such deposition, the SrTiO ₃ -based thin film 2 cannot be sufficiently crystallized and becomes amorphous.

[0021] In this specification, the term "amorphous state" refers to a state having no sufficient crystallinity, and does not necessarily indicate a completely amorphous state. For example, this includes a state in which some low-order peaks are obtained by X-ray diffraction, but other peaks are not obtained.

As shown in FIG. 1B, the SrTiO ₃ -based thin film 2 deposited at a low temperature is annealed by laser annealing from the surface side to form an amorphous SrTiO ₃ -based thin film 2.
Is crystallized to obtain a polycrystalline SrTiO ₃ -based thin film 2a.

In place of laser annealing, rapid thermal annealing by infrared heating using an infrared lamp or the like may be performed. According to the annealing using such light, only the surface portion can be rapidly heated and the cooling can be rapidly performed, so that the reaction between the SrTiO ₃ -based thin film 2a and the underlayer 1 can be reduced. The crystallized and high-quality SrTiO ₃ -based thin film 2a shows a high dielectric constant.

Next, referring to FIG. 2, the film forming temperature is set to SrT
The effect on the iO ₃ -based thin film and the effect on the interface will be described. SrTiO ₃ thin films were formed on Si substrates at various substrate temperatures, and their X-ray diffraction and the thickness of the SiO ₂ layer generated at the interface were measured. Figure 2 (A) shows the data of X-ray diffraction of the SrTiO ₃ film obtained and the film forming temperature of SrTiO ₃ film. The case where the film formation temperature is changed from 200 ° C. to 600 ° C. every 100 ° C. is shown.

As is apparent from FIG.
In the case of ° C., the (100) peak and the (200) peak are clearly observed. Also, the (110) peak is sharply generated.

When the substrate temperature is lowered to 500 ° C. or 400 ° C., the (100) peak disappears and the (200) peak sharply decreases. The (110) peak sharply decreases in height, but is clearly present. Conversely, 600
The presence was almost unknown at a substrate temperature of 11 ° C. (11
1) The peak is growing.

When the substrate temperature is set to 300 ° C., (200)
The peaks also disappear almost completely. The (110) peak hardly changes, and the (111) peak grows slightly. If the substrate temperature is further reduced to 200 ° C,
Although traces of the (110) peak and the (111) peak are observed, most of the X-ray diffraction peaks disappear.

From the results of such X-ray diffraction, it can be seen that in order to obtain a SrTiO ₃ thin film having good crystallinity, it is preferable to set the substrate temperature to about 600 ° C. or higher. At 400 ° C. or lower, for example, at 300 ° C., the obtained SrTiO ₃ thin film does not have sufficient crystallinity and becomes amorphous.

FIG. 2B is a diagram showing a case where (20) shown in FIG.
0) A graph showing the relationship between the peak intensity of the peak and the thickness of the SiO ₂ layer generated at the interface between the SrTiO ₃ thin film and the Si substrate.

When the (200) X-ray diffraction peak exists,
It is clearly shown that a SiO ₂ layer is generated.
Further, as the intensity of the (200) X-ray diffraction peak increases, the thickness of the SiO ₂ layer increases almost linearly.

From these data, it can be seen that SrT 3 was formed at the interface between the SrTiO ₃ thin film and the Si substrate without forming an SiO ₂ layer.
It can be seen that the SrTiO ₃ thin film may be deposited at a substrate temperature at which no (200) X-ray diffraction peak is generated in order to deposit the iO ₃ thin film.

That is, at a low temperature of 400 ° C. or less, SrTi
If the O ₃ -based thin film is deposited in an amorphous state, generation of a SiO ₂ layer at the interface between the SrTiO ₃ thin film and the Si substrate can be prevented.

Hereinafter, more specific embodiments of the present invention will be described. As shown in FIG. 1, an SrTiO ₃ thin film 2 is deposited on a Si substrate 3 by rf magnetron sputtering. As the target, sintered SrTiO
_{Use 3} powders.

The sputtering conditions are as follows.
00 to 400 W, supply gas flow ratio Ar / O ₂ = 4/1,
The pressure in the sputtering apparatus is 1.2 Pa, the substrate temperature is 2
The temperature is set to 00 to 300 ° C., and a 100 nm-thick SrTiO ₃ thin film is deposited. SrTiO deposited at a substrate temperature of 300 ° C.
_{The three} thin films exhibited a dielectric constant of ε = 45. This value is Sr
The dielectric constant of TiO ₃ is extremely low.

As described above, the SrTiO ₃ thin film deposited at a low temperature is annealed by using the laser annealing apparatus shown in FIG. In FIG. 3, a sample 10 includes a heater 52.
Is mounted on an XY stage 51 provided with. The laser light emitted from the multi-line continuous wave Ar laser 55 is
The mirror 57 is guided to the mirror 57 through the filter 56,
The light is reflected by the lens, and is collected by the lens 58 to irradiate the sample. By driving the XY stage 51, a laser beam is scanned on the sample.

The sample 10 on which the SrTiO ₃ thin film was formed was
The substrate is heated to a room temperature of 300 ° C. by the heater 52, irradiated with Ar laser light in the air, and laser-annealed. The irradiation conditions are, for example, a laser power of 0.5 W, a focal length of the condenser lens 58 of 25 mm, and a scan speed of 15 mm.
0 mm / sec, feed width 2 μm.

Amorphous Sr formed at a substrate temperature of 300 ° C.
Although the dielectric constant of the TiO ₃ thin film was 45, this SrTi
As a result of irradiating the O ₃ thin film with a laser at a substrate temperature of 300 ° C., the dielectric constant was improved to ε = 250.

For comparison, polycrystalline SrT is applied at a substrate temperature of 650 ° C. by rf magnetron sputtering.
The dielectric constant obtained when an iO ₃ thin film was formed was ε = 6.
It was 0.

The substrate temperature during laser irradiation was 400 ° C.
Then, the dielectric constant was reduced to ε = 200. It is considered preferable that the substrate temperature during laser irradiation should not be higher than the substrate temperature during SrTiO ₃ film formation.

As described above, the X-ray (200) peak
SrTiO at low temperature where there is no _ThreeWhen the film is formed,
Si substrate and SrTiO_ThreeSiO at the interface of the film_TwoLayer exists
No SrTiO_ThreeA film can be obtained and this SrTiO
_ThreeLaser annealing of the film promotes crystallization
And the dielectric constant can be increased.

Although the case where the annealing treatment is performed by laser annealing has been described, the same effect can be expected by rapid thermal annealing. Note that SrTiO ₃
When the film is laser-annealed, the composition of the film after the treatment is:
Ti becomes insufficient compared to Sr. This phenomenon can be considered as follows.

SrTiO_ThreeRepresents two binary oxides, Sr
O and TiO_TwoCan be thought of as a composite. But,
SrO and TiO_TwoHave different physical properties. SrO is T
iO _TwoIt has a higher melting point and a higher boiling point (mp 243 of SrO).
0 ° C, TiO_TwoM. p. 1855 ° C).

For this purpose, laser annealing or RTA
When the surface temperature of the SrTiO ₃ film rises, TiO ₂ evaporates in the annealing process, and the film composition to be SrTiO ₃ changes to Ti deficiency.

In order to prevent the film composition after annealing from shifting to a Ti deficiency, it is necessary to determine the film composition in advance by stoichiometry.
It is considered that low-temperature deposition with an excess composition is sufficient. Using a sintered SrTi _{1 + x} O ₃ powder target,
An SrTi _{1 + x} O ₃ film was rf-sputtered (low-temperature deposition) on the Si substrate 3. The substrate temperature during sputtering is 3
00 ° C, gas flow ratio Ar / O ₂ = 4/1, pressure 1.2P
a, high-frequency power of 200 to 400 W; Sr deposited
The film thickness of Ti _{1 + x} O ₃ was 100 nm. The composition of the deposited film is almost the same as the composition of the source.

Next, the sample was taken out into the atmosphere, and the SrTi _{1 + x} O ₃ film was heat-treated using the laser annealing apparatus shown in FIG. After passing through a spatial filter using a multi-line continuous wave Ar ion laser, the laser
The sample heated to 0 ° C. was irradiated. The irradiation conditions were a laser power of 0.5 W, a focal length of the condenser lens of 25 mm, a scan speed of 150 mm / sec, and a feed width of 2 μm.

FIG. 4 shows that the relative dielectric constant ε _d of the obtained sample after laser annealing is changed by the composition of the source or deposited film SrTi.
_{1 + x} O ₃ is shown as a function of Ti content (1 + x) relative to Sr1.

FIG. 4 shows that when the composition (1 + x) is about 1.1,
This shows that the relative permittivity ε _d reaches a peak value. The peak value is about 290. The rapid decrease of ε _{d in} the region of (1 + x)> 1.2 may be due to the precipitation of a rutile phase (TiO ₂ ) in addition to the SrTiO ₃ phase.

The dielectric constant ε _d of the SrTi _{1 + x} O ₃ film before laser annealing is about 100. From the X-ray diffraction data, it can be seen that the sample after laser annealing has improved crystallinity. Significant improvement in ε _d is due to low temperature deposition of SrTi _{1 + x} O ₃
It is considered that the crystallinity of the film was improved by the laser annealing. It is considered that RTA can be used instead of laser annealing.

Further, the low-temperature deposition Sr of the embodiment described above is used.
Compared to the induction ratio (250) of the TiO ₃ film after the laser annealing, the ε _d (290) of the low-temperature deposited Ti-excess SrTi _{1 + x} O ₃ film after the laser annealing was improved by evaporating during the annealing process. It is considered that the effect of preliminarily supplementing TiO ₂ appeared.

Now, the highly reactive SrTiO ₃ -based thin film 2
In order to more completely prevent a chemical reaction (SiO ₂ generation) during the film deposition between the substrate and the Si substrate 3 or during the heat treatment, it is effective to interpose a suitable Si chemical thin film 4 as a buffer layer. Si compounds are well compatible with Si, and relatively stable compounds are easily obtained. Suitable S
As the i-compound, metal silicide and bismuth silicate can be used.

As the metal for silicide, a high melting point metal which forms a relatively stable compound with Si, for example, Pt, T
a, Ti or W is preferred. When these metal layers are simply deposited on a Si substrate as a barrier metal and patterned for electrical isolation, the SrTi
Since the O ₃ high dielectric constant insulating film has poor step coverage, it is difficult to sufficiently cover the side surfaces of the barrier metal layer.

Then, there is a problem that it is necessary to further cover the side surface of the barrier metal layer with another insulating film.
Even when an SrTiO ₃ high dielectric constant insulating film was deposited on the barrier metal layer, the dielectric constant of the entire sample did not increase so much.

In this embodiment, after the barrier metal layer is once deposited, it is removed by dry etching or the like, leaving only the metal silicide layer formed at the interface between the Si substrate and the barrier metal. The thickness of these metal silicide layers is as extremely small as 10 A or less, and the presence thereof can almost completely suppress the reaction between the SrTiO ₃ -based thin film and the Si substrate.

FIG. 5 is a sectional view showing a main part of a step of forming a high dielectric constant SrTiO ₃ thin film 8 on the platinum silicide layer 6. As shown in FIG. 5A, Pt was formed by rf magnetron sputtering using a Si substrate 3 as a base.
Layer 5 is deposited. The sputtering was performed using a Pt target under the conditions of high-frequency power of 200 to 400 W, Ar atmosphere (pressure 0.5 Pa), and Si substrate temperature and normal temperature.
The thickness of the Pt layer 5 is about 10 nm. In this process, a platinum silicide layer 6 is formed at the interface between the Si substrate 3 and the Pt layer 5.

Next, as shown in FIG. 5B, the sample is transferred to an etching apparatus, plasma etching is performed by flowing an HBr gas, and the Pt layer 5 once deposited on the Si substrate 3 is removed. The platinum silicide layer 6 functions as an etching stopper, and the platinum silicide layer 6 is exposed on the surface of the Si substrate 3. The thickness of the platinum silicide layer 6 is 10 A or less.

The sample 10 on which the silicide layer was formed as described above was placed in the vacuum chamber 1 of the MOMBE apparatus shown in FIG.
2 Installed on the center susceptor 14. A heater 28 is provided in the susceptor 14, and can heat the sample to a desired temperature.

In the MOMBE apparatus schematically shown in FIG. 6, a chamber 12 is provided with a reflection high energy electron diffraction (R).
HEED) electron gun 22 and screen 23
Are provided corresponding to the position of the susceptor 14. Next to the susceptor 14, a film thickness meter 25 such as a quartz oscillator is also arranged. Further, a nuclear quadrupole mass spectrometer 26 is provided behind the susceptor 14.

In the chamber 12, the vessels 16a and 16b, the Knudsen cell 20,
A gas nozzle 18 having an ECR (Electron Cyclotron Resonance) structure is connected.

Each of the vessels 16 is provided with a heater 17 so that the inside of the vessel can be heated to a desired temperature. Although not shown, a vacuum evacuation system is connected to the chamber 12 so that the chamber 12 can be evacuated to a desired degree of vacuum.

As shown in the figure, Sr uses the elemental metal contained in the K (Knudsen) cell 20 as a source,
The i source is accommodated in the vessel 16b, and the metal complex tetraisopropoxytitanium Ti (i-
OC ₃ H ₇ ) ₄ was used.

This metal complex is heated by a heater at the time of use.
It is heated to 0 ° C. and introduced into the growth chamber with 2 sccm of Ar gas. Oxygen is supplied from an oxygen plasma using an electron cyclotron resonance (ECR) structure. In addition, the triphenylbismuth Bi (p
h) ₃ is accommodated but not used in this embodiment.

A substrate (sample) temperature of 300 ° C., an oxygen partial pressure of 1 to 9 × 10 ⁻⁵ Torr, a K cell temperature of 480 ° C., and a 100 nm thick Sr
A TiO ₃ film 7 was deposited. The film thickness was controlled using a quartz oscillator that had been calibrated in advance. Obtained SrTiO
The relative dielectric constant ε _d of the sample including the _three films 7 was 55, but the interface between the platinum silicide layer 6 and the SrTiO ₃ film 7 was SiO 2.
₂ did not generate.

Next, the sample was taken out into the atmosphere, and as shown in FIG. 5D, a laser beam 8 was irradiated to the SrTiO ₃ thin film 7 to perform laser annealing. Laser annealing may be performed using a laser annealing apparatus as shown in FIG.

The laser annealing was performed at a sample temperature of 300
Scanning speed 15 ° C with laser power 0.5W
The test was performed under the conditions of 0 mm / sec and a feed width of 2 μm. The obtained SrTiO ₃ film 7 was crystallized (high quality). When the dielectric constant of a sample including the SrTiO ₃ film 7 was measured, the relative dielectric constant ε _{d of the} dielectric region was 320.

This value is much more improved than the case of direct film formation (low-temperature deposition, laser annealing) on the Si substrate 3 described with reference to FIG. 1 (ε _d = 250). I understand.

When Ti is used as the silicide metal, the titanium silicide layer is more effective because it also functions as a source for evaporating TiO ₂ components generated in the laser annealing process, as described above.

Next, an example in which bismuth silicate is used as a buffer layer different from the metal silicide layer 6 will be described.
The Si substrate 3 is introduced into a sample position of the MOMBE apparatus shown in FIG. In this embodiment, triphenyl bismuth and Bi (ph) ₃ are used as a Bi raw material. Bi (ph) ₃ in the vessel 16 a is heated to 120 ° C., and a Bi complex is introduced into the chamber 12 using Ar gas as a carrier.

At this time, the Si substrate 3 is kept at 650 ° C. and reacted by oxygen ECR plasma, whereby
Bi the i substrate 3 on at Bi (ph) ₃ occurs by thermal decomposition
And Si and oxygen combine to form a bismuth silicate Bi ₁₂ SiO ₂₀ film on the Si substrate 3. The film thickness was 10 to 20A.

Next, the supply of Bi (ph) ₃ was stopped, the sample temperature was lowered to 300 ° C., and Ti (i) heated to 50 ° C.
Ar of 2sccm the -OC ₃ H _{7) 4} for vessel 16b
To introduce the Ti complex into the chamber 12.

Oxygen ions are generated by ECR plasma,
At the same time, when the Sr molecular beam is emitted from the K cell (480 ° C.), an SrTiO ₃ film is formed on the Bi ₁₂ SiO ₂₀ film. The film thickness was about 10 nm.

The Bi ₁₂ SiO ₂₀ film is a Si compound generated by reacting with the base, and is well compatible with the Si substrate.
In addition, since the film thickness is sufficiently thin, even if an SrTiO ₃ film is deposited thereon, there is little problem with step coverage.

The obtained SrTiO_ThreeMembrane into the device of Figure 3
Laser annealing under the same conditions as before
High quality. When the dielectric constant of this sample is measured,
Dielectric constant ε of conductor region_dOf about 290 was obtained.
Bi₁₂SiO₂₀/ SrTiO _ThreeSiO at the interface_TwoThe existence of
Not observed.

As described above, in addition to the low-temperature deposition of the SrTiO ₃ -based thin film and the optical annealing, the Si substrate and the S
It can be seen that by interposing a sufficiently thin buffer layer of a Si compound between the rTiO ₃ -based thin films, the generation of SiO ₂ can be more completely suppressed, and the dielectric constant can be more effectively improved.

As the base of Si, not only a single crystal but also a polycrystal can be used. In addition, Sr of SrTiO ₃
Is partially replaced with at least one of Ba and Ca, the dielectric constant can be further improved.

Next, with reference to FIG. 8, a description will be given of a capacitor of a planarized stack type memory cell using an SrTiO ₃ dielectric thin film obtained by a two-step processing method of low-temperature deposition and laser annealing.

On the surface of the p-type Si substrate 31, a field oxide film 32 is selectively formed. In the active region surrounded by the field oxide film 32, two MOSFETs
T is formed. That is, the polycrystalline gate electrodes 33a and 33a are formed on the region to be a channel via the gate oxide film.
b is formed, and n ⁺ -type regions 34 serving as source regions and n ⁺ -type regions 35a and 35b serving as drain regions are formed on both sides thereof.

On n ⁺ -type regions 35a and 35b, n ⁺ -type polycrystalline Si region 37 functioning as a diffusion source is formed.
n ⁺ -type region 34 on the even n ⁺ -type polycrystalline Si regions 38 are formed. On the polycrystalline Si region 38, a metal electrode 39 serving as a data line is formed.

After covering the metal electrode 39 with an insulator, an interlayer insulating film 41 is formed, and an opening is provided on the polycrystalline Si region 37. An electrode 43 serving as an extraction electrode is provided in this opening.
Is buried and planarized together with the surface of the interlayer insulating film 41.

A Pt layer 45 serving as a lower electrode is selectively formed on the flattened surface, and SrTiO ₃ is formed thereon.
The capacitor dielectric thin film 46 is formed. On these, a metal electrode 48 serving as a plate electrode is formed.

That is, in the structure shown, MOSFETs are formed on both sides of the central source region 34 and each M
The OSFET is connected to a capacitor connected to the plate electrode 48. These capacitors have high capacitance because the capacitor dielectric film is formed of an SrTiO ₃ -based dielectric exhibiting an extremely high dielectric constant.

Since a relative dielectric constant approximately two orders of magnitude higher than that of a conventional Si ₃ N ₄ / SiO ₂ dielectric can be obtained, a necessary amount of stored charge can be secured even with a two-dimensional capacitor having a small area. Therefore, the cell structure can be simplified.

Although the configuration example of the DRAM has been described, the above-described high dielectric constant thin film can be used as a gate insulating film of a thin film transistor (TFT), an electroluminescent (EL) element insulating film, or the like.

The present invention has been described in connection with the preferred embodiments.
The present invention is not limited to these. For example,
It will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.

[0084]

As described above, according to the present invention,
An SrTiO ₃ -based thin film with high quality and high dielectric constant can be formed.

Even when an SrTiO ₃ -based thin film is formed on a Si substrate, the formation of SiO ₂ can be suppressed and a high dielectric constant can be obtained. As a result, megabit integrated DRAM
For example, it is possible to form a capacitor having a large amount of accumulated charge even in a small area on a high-density mounted Si element.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a basic embodiment of the present invention. FIG.
1A shows a step of depositing an SrTiO ₃ -based thin film on a base at a low temperature, and FIG. 1B shows a step of laser annealing the SrTiO ₃ -based thin film deposited at a low temperature.

FIG. 2 is a graph showing the influence of the deposition temperature of a SrTiO ₃ based thin film. FIG. 2A shows X-ray diffraction data, FIG.
(B) shows the relationship between the (200) peak intensity of X-ray diffraction and the formation of SiO _{2 on the} surface of the Si substrate.

FIG. 3 is a perspective view illustrating a configuration of a laser annealing apparatus.

FIG. 4 shows SrT after laser annealing with respect to Ti amount (1 + x) when laser annealing a SrTi _{1 + x} O ₃ thin film.
5 is a graph showing the relationship between the relative dielectric constant ε _d of a sample including an iO ₃ -based thin film.

FIG. 5 is a cross-sectional view showing a process of forming an SrTiO ₃ thin film on a platinum silicide buffer layer according to an embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating a schematic configuration of a MOMBE apparatus.

FIG. 7 is a cross-sectional view illustrating a configuration example of a planarized stack cell using a high dielectric constant SrTiO ₃ -based thin film.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 base 2 SrTiO ₃ based thin film 3 Si substrate 4 Si compound thin film 5 Pt layer 6 platinum silicide layer 7 SrTiO ₃ based thin film 8 laser beam

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI H01L 21/822 H01L 27/04 C 27/04 (56) References JP-A-3-257020 (JP, A) JP-A-4 -2698 (JP, A) JP-A-58-131735 (JP, A) JP-A-5-235264 (JP, A) JP-A-5-299580 (JP, A) JP-A-6-5810 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/316 C01F 11/02 C01G 23/00 C01G 23/04 H01L 27/10

Claims (10)

(57) [Claims] 1. A depositing a HiAkirashitsujo SrTiO ₃ based thin at a temperature lower than 400 ° C. on the base, is crystallized by laser annealing the amorphous form SrTiO ₃ based thin film, SrTiO ₃ based thin film Obtaining a high dielectric constant dielectric thin film. 2. The high dielectric constant dielectric material according to claim 1, wherein said base is a Si substrate, and said deposition step is performed at a temperature at which substantially no SiO ₂ layer is generated at an interface between said SrTiO ₃ based thin film and said Si substrate. Manufacturing method of body thin film. 3. The method according to claim 1, wherein the underlayer has a Si compound thin film on the surface. 4. The method according to claim 3, wherein the Si compound thin film is a metal silicide layer or a bismuth silicate (Bi ₁₂ SiO ₂₀ ) layer. 5. The method according to claim 1, further comprising: depositing a metal layer on the Si substrate;
2. The method for manufacturing a high-k dielectric thin film according to claim 1, comprising: forming a metal silicide layer at an interface; and preparing the underlayer by removing the metal layer. 6. The method according to claim 5, wherein the metal layer is made of at least one selected from the group consisting of Pt, Ta, Ti, and W. 7. The method according to claim 1, wherein the SrTiO ₃ -based thin film has a composition in which a part of Sr is replaced by at least one of Ba and Ca. 8. The high dielectric constant dielectric thin film according to claim 1, wherein said SrTiO ₃ -based thin film has a Ti excess composition containing 1 to 1.2 atoms of Ti to 1 atom of Sr. Production method. 9. An electronic component comprising: a Si substrate; a silicide thin film formed on the Si substrate; and an SrTiO ₃ -based high dielectric constant thin film formed directly on the silicide thin film. 10. An electronic component comprising: a Si substrate; a bismuth silicate layer formed on the Si substrate; and an SrTiO ₃ -based high dielectric constant thin film formed directly on the bismuth silicate layer.