JP3080642B2 - Automatic equalization system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial applications]

The present invention relates to an automatic equalization system for automatically equalizing a QAM signal in a QAM (quadrature amplitude modulation) data modem receiver.

[Prior art]

In digital data transmission using a QAM data modem, amplitude distortion, delay distortion, and the like on a line cause transmission errors and cause deterioration of information transmission quality. For this reason, an automatic equalizer for equalizing line distortion using a successively adaptive FIR filter has been conventionally used in this type of QAM data modem receiver. For example, at a transmission rate of about 9600 bps, an FIR filter of about 40 stages is used as a successive adaptive FIR filter. When a characteristic change occurs in the telephone line, the automatic equalizer changes the equalization characteristic according to the characteristic change. Also, a function to temporarily stop the correction of the automatic equalizer when the error signal exceeds a certain value so that the automatic equalizer does not diverge even if sudden fluctuations such as phase fluctuation and gain fluctuation occur in the telephone line, Some devices have a so-called hold function.

[Problems to be solved by the invention]

The above-mentioned conventional automatic equalizer has a long tap of about several tens of steps, and the received signal also has white noise. Therefore, in order to keep the operation of the automatic equalizer stable, the correction speed of the filter characteristics cannot be made too high. However, when the correction speed is low, when the characteristics of the line suddenly change, the changes in the characteristics of the automatic equalizer cannot follow the change, and the quality of the received data deteriorates. When the characteristic change of the line is large, there is a problem that the automatic equalizer is in a divergent state. Further, in the device having the hold function, the correction of the automatic equalizer is stopped when the characteristic change of the line is large, so that the divergence of the automatic equalizer is temporarily stopped. However, when there is a phase change, the device having the hold function does not have a function of correcting the phase shift, so that re-equalization cannot be performed by the automatic equalizer, and the received data is deteriorated for a long time. If the amplitude fluctuates, the AGC
(Automatic gain control) Although the circuit recovers to the original reception level after a certain period of time due to the function of the circuit, there is a problem that the quality of the received data during that period is also deteriorated.

[Means for Solving the Problems]

The automatic equalization system of the present invention automatically equalizes a received signal.
In an automatic equalization system that determines and outputs received data, an automatic gain control circuit that controls the level of the received signal to be constant and outputs a gain-controlled signal, and a phase of the gain-controlled signal. Is rotated based on the phase rotation signal,
A phase rotation circuit that outputs a phase-rotated signal, and a first automatic equalizer that equalizes distortion of the phase-rotated signal while preventing divergence and outputs a first equalized signal And a second automatic equalizer for equalizing and determining distortion of the first equalized signal and outputting the received data, and determining a phase shift based on tap weights of the second automatic equalizer. A phase difference determination circuit that sends the phase rotation signal to the phase rotation circuit.

【Example】

Next, the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an automatic equalization system according to one embodiment of the present invention. The illustrated automatic equalization system receives a received signal, automatically equalizes / determines the received signal, and outputs received data. The automatic equalization system has an AGC circuit 11 which receives a received signal, makes the reception level of the received signal constant, and outputs a gain-controlled signal. The gain-controlled signal is supplied to the phase rotation circuit 12. The phase rotation circuit 12 rotates the phase of the signal whose gain has been controlled on a complex plane based on a phase rotation signal described later, and outputs a phase-rotated signal. The phase-rotated signal is supplied to a first automatic equalizer 13. The first automatic equalizer 13 equalizes the distortion of the phase-rotated signal based on a first correction signal described later, and outputs a first equalized signal. The first automatic equalizer 13 has tens of taps. The first equalized signal is supplied to the first coordinate determination circuit 14 and the first
Is supplied to the error extraction circuit 15. First coordinate determination circuit
14 determines a coordinate point on the complex plane of the first equalized signal and outputs a first reference coordinate value. The first reference coordinate value is supplied to a first error extraction circuit 15. The first error extraction circuit 15 extracts a first error between the first reference coordinate value and the first equalized signal, and outputs a first error signal representing the first error. The first error signal is supplied to a switch 16 and a level determination circuit 17. The level determination circuit 17 determines a first error level of the first error signal, and outputs an open command signal when the first error is equal to or greater than a predetermined value. When the switch 16 has not received the open command signal from the level determination circuit 17, it closes and sends the first error signal to the first automatic equalizer 13 as a first correction signal. On the other hand, when receiving the open command signal,
16 opens and stops the modification of the first automatic equalizer 13. Therefore, the first automatic equalizer 13 and the first coordinate determination circuit 1
4. The combination of the first error extraction circuit 15, the switch 16, and the level determination circuit 17 provides the distortion of the phase-rotated signal,
It functions as a first automatic equalizer that outputs the first equalized signal by equalizing while preventing divergence. The first equalized signal from the first automatic equalizer 13 is also supplied to a second automatic equalizer 18. Second automatic equalizer 18
Outputs a second equalized signal by equalizing the distortion of the first equalized signal based on a second correction signal described later. The second automatic equalizer 18 has about 10 taps. The second equalized signal is supplied to the second coordinate determination circuit 19 and the second coordinate determination circuit 19.
Is supplied to the error extraction circuit 20 of FIG. Second coordinate determination circuit 19
Determines a coordinate point on the complex plane of the second equalized signal and outputs a second reference coordinate value and received data. Second
Are supplied to the second error extraction circuit 20. The second error extraction circuit 20 extracts a second error between the second reference coordinate value and the second equalized signal, and obtains a second error signal representing the second error. This second error signal is sent to the second automatic equalizer 18 as a second correction signal. Therefore, the second automatic equalizer 18 and the second coordinate determination circuit 1
The combination of 9 and the second error extraction circuit 20 functions as a second automatic equalizer that equalizes and determines the distortion of the first equalized signal and outputs the received data. The tap weight of the second automatic equalizer 18 is determined by the phase difference determination circuit 21.
Supplied to The phase difference determination circuit 21 calculates a phase shift based on the tap weight, and sends a phase rotation signal to the phase rotation circuit 12. Hereinafter, the operation of the automatic equalization system shown in FIG. 1 will be described. First, an operation in the case where there is no sudden change in line characteristics will be described. The QAM signal is demodulated into a received signal by a demodulator (not shown). This reception signal is controlled by changing the amplification factor of the AGC circuit 11 so that the reception level becomes constant by the AGC circuit 11. In a normal state, that is, when the value of the phase rotation signal is zero, the phase rotation circuit 12 converts the gain-controlled signal from the AGC circuit 11 into a first automatically rotated signal without performing phase rotation. It is sent to the equalizer 13. The first automatic equalizer 13 equalizes the line distortion of the phase-rotated signal.
At this time, since the distortion has been sufficiently equalized, the first error of the first error signal output from the first error extraction circuit 15 is small, and the switch 16 is closed. Therefore, the first error signal is directly used as the first correction signal by the first automatic equalizer 13.
Supplied to The second automatic equalizer 18 does not particularly perform equalization because the distortion is sufficiently equalized by the first automatic equalizer 13. Also, since there is no phase shift, the phase difference determination circuit
21 outputs a phase rotation signal having a value of zero. Next, a case where a phase change (phase hit) occurs in the telephone line will be described. The first automatic equalizer 13 cannot follow the fluctuation because the correction speed of the filter characteristic is set to be small,
Of the first error signal output from the error extraction circuit 15 of FIG.
Has a large error. At this time, the first automatic equalizer 13
In order to prevent the divergence, the level determination circuit 17 sends an open command signal to the switch 16 to open the switch 16 and stops the correction of the first automatic equalizer 13. However, the second automatic equalizer 18
Since the number of taps is as small as about 10 steps and the correction speed of the filter characteristic is high, the deterioration of the received data is minimized following the phase hit. The phase difference determination circuit 21 determines the phase shift of the first equalized signal output from the first automatic equalizer 13 based on the tap weight of the second automatic equalizer 18, and sends the signal to the phase rotation circuit 12. A phase rotation signal having a value that returns this phase shift is transmitted. When the phase shift is corrected by the phase rotation circuit 12, the first error of the first error signal is reduced, the switch 16 is closed, and the first automatic equalizer 13 starts correcting again. Next, when the amplitude fluctuation (gain hit) occurs in the telephone line, the first automatic equalizer 13 cannot follow the fluctuation, as in the case where the phase hit occurs, and the switch 16 opens, The first automatic equalizer 13 stops the correction. But the second
Since the automatic equalizer 18 follows the fluctuation, the deterioration of the received data is small. The amplitude fluctuation is corrected by the AGC circuit 11, and the first
The value of the first error of the error signal becomes smaller, and the first automatic equalizer 13 starts correction.

【The invention's effect】

As described above, according to the present invention, two types of automatic equalizers having different filter characteristic correction speeds are configured in two stages.
It has a function to calculate and correct the phase shift from the tap weight of the automatic equalization unit at the stage, and the automatic equalization unit at the first stage has a function to prevent divergence, so that reception due to sudden fluctuation of the line Data deterioration can be suppressed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an automatic equalization system according to one embodiment of the present invention. 11 AGC (automatic gain control) circuit, 12 phase rotation circuit, 13 automatic equalizer, 14 coordinate determination circuit, 15 error extraction circuit, 16 switch (SW), 17 ... A level determination circuit, 18 an automatic equalizer, 19 a coordinate determination circuit, 20 an error extraction circuit, 21 a phase difference determination circuit.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04B 3/04-3/18 H04B 7/005

Claims (3)

(57) [Claims] An automatic equalization system for automatically equalizing / determining a received signal and outputting received data, wherein the automatic gain for outputting a signal whose gain is controlled by controlling the level of the received signal to be constant. A control circuit, a phase rotation circuit that rotates the phase of the gain-controlled signal based on a phase rotation signal, and outputs a phase-rotated signal, and a state in which distortion of the phase-rotated signal is prevented from diverging A first automatic equalizer for outputting a first equalized signal, and a second automatic equalizer for equalizing / determining distortion of the first equalized signal and outputting the received data. An automatic equalizer, and a phase difference determination circuit that determines a phase shift from a tap weight of the second automatic equalizer and sends the phase rotation signal to the phase rotation circuit. System. 2. The first automatic equalizer for equalizing the phase-rotated signal based on a first correction signal and outputting the first equalized signal. A first coordinate determination circuit that determines a coordinate point of the first equalized signal on a complex plane and outputs a first reference coordinate value; and A first error extraction circuit that extracts a first error from a first equalized signal and outputs a first error signal representing the first error; A level determination circuit that determines whether the error of 1 is equal to or more than a certain value, and outputs an open command signal when the first error is equal to or more than the certain value; Sends a first error signal as the first correction signal to the first automatic equalizer, and opens when receiving the open command signal A switch for stopping correction of the first automatic equalizer, wherein the second automatic equalizer equalizes the first equalized signal based on a second correction signal, A second automatic equalizer for outputting a second equalized signal; determining a coordinate point on the complex plane of the second equalized signal; a second reference coordinate value and the reception data A second error determining circuit that outputs a second error between the second reference coordinate value and the second equalized signal, and a second error representing the second error 2. The automatic equalization system according to claim 1, further comprising: a second error extraction circuit that sends a signal to the second automatic equalizer as the second correction signal. 3. 3. The first automatic equalizer has a filter characteristic of a first correction speed, and the second automatic equalizer has a filter characteristic of the first correction speed.
3. The automatic equalization system according to claim 2, wherein the automatic equalization system has a filter characteristic of a second correction speed smaller than the correction speed of the second correction speed.