JP3067359B2 - Magnetic recording / reproducing method and device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital magnetic recording / reproducing apparatus.

[0002]

2. Description of the Related Art The present invention relates to a magnetic recording / reproducing system for performing magnetic recording on a magnetic recording medium and reproducing a magnetically recorded signal in a magnetic recording apparatus having a configuration as shown in FIG. In the magnetic recording apparatus shown in FIG. 2, data bits 1 to be recorded are converted into recording code bits 3 by a modulator 2 according to an appropriate conversion rule, and then converted into a magnetic recording signal 5 through a recording amplifier 4. You.
As shown in FIG. 3, the magnetic recording signal 5 is such that the recording code bits "1" and "0" correspond to the presence or absence of the reversal of a constant current, respectively, according to the NRZI rule. The recording code bits "1" and "0" are supplied to the magnetic recording medium 7 moving at a constant speed relative to the recording head 6 by flowing the recording code bits "1" and "0" as shown in FIG. On the other hand, a magnetization pattern 8 corresponding to the presence or absence of the reversal change of the magnetization direction is recorded.

At the time of reproduction, the approaching recording medium 7 is moved with respect to the reproducing head 9 of FIG. 2 at the same speed as during recording. As a result, the reproducing head 9 detects the change in the direction of magnetization of the magnetization pattern 8 and, as shown in FIG.
Reproduction signal 1 generating a pulsed voltage at timing 0
Get 1. The role of the reproduction system is to detect the timing of the pulse of the reproduction signal 11 and to detect the magnetization reversal 1 on the magnetization pattern 8.
It is to detect the timing of 0 and convert it to recording code bit 3. The reproduction signal 11 is the reproduction amplifier 1
After being amplified by 2, the signal is restored to a reproduction code bit 16 by a discriminator 15 through a high frequency compensation circuit 13 for limiting and compensating a high frequency component of the signal. By performing the reverse operation of the modulator 2 on the reproduced code bit 16 by the demodulator 17, the original data bit 1 is obtained.

The discriminator 15 outputs a pulse voltage 14 corresponding to the magnetization reversal 10 in the input high-frequency compensated reproduction signal 19.
a, and the recording code bit “1” is detected at this timing.
And the recording code bit “0” is assigned to the timing of the other recording code bits. That is, as shown in FIG. 3, when the clock 18 supplied at the timing of the recording code bit coincides with the pulse 14a in the high-frequency compensated reproduction signal 19 , the recording code bit is determined to be "1". in this case,
In the level detector to perform identification based on the amplitude information of the signal, the high frequency compensation reproduction signal 19, and the maximum level of the constant discrimination level 14b (high frequency compensation reproduced signal 19 0
Intermediate level between levels, and high-frequency compensated reproduction signal 19
Between the minimum level and the 0 level).
If the amplitude level of the high-frequency compensated reproduction signal 19 exceeds this, it is determined that the pulse 14a exists, and this is determined as the magnetization inversion 1
It is determined that there is a recording code bit “1” where 0 exists. Also,
The amplitude level of the high-frequency compensated reproduction signal 14 is equal to the identification level 14b.
Is not exceeded, it is determined that the pulse 14a does not exist.
It is determined to be "0".

[0005]

In such a magnetic recording / reproducing system, as the recording density increases and the recording bit interval decreases, the conditions for narrowing / steeping the reproduction waveform in the high-frequency compensation circuit 13 become more severe. It will be. That is,
Under the recording / reproducing condition where the recording frequency is high, the required frequency band of the reproduced signal read from the head becomes higher, and the deterioration of the frequency characteristics and the high frequency loss of the recording / reproducing system become more remarkable. Beyond the recording frequency at which the head / medium recording / reproducing system used can maintain sufficient frequency characteristics,
When performing recording / reproduction, there is a limit in compensating the excessive high-frequency degradation of the reproduction signal observed at the time of high-density recording by the high-frequency compensation circuit 13 described above. In other words, by compensating for the extremely high frequency degradation of the reproduction signal and applying a significant high-frequency emphasis to the reproduction signal, the high-frequency component of the noise superimposed on the reproduction signal is also excessively emphasized, thereby causing an increase in superimposed noise. As a result, the signal-to-noise ratio of the compensated signal is deteriorated, and the data reproduction by the discriminator becomes more difficult.

As described above, the Nyquist waveform equalization by the high frequency compensation circuit compensates for the frequency characteristic deterioration of the recording / reproducing system,
The signal quality (signal-to-noise ratio) is reduced while relieving the decrease in the reproduced signal level at high recording density, while increasing the noise.
There is a limit to the improvement. In particular, at the recording frequency at which recording is actually performed, the frequency characteristics of the recording / reproducing system are greatly deteriorated, that is, at the time of high-density recording at a recording density far exceeding the recording / reproducing ability of the head / medium system, the noise increase is dominant, The signal quality improvement by the high-frequency compensation circuit has a problem that the effect is not substantially exhibited.

[0007]

According to the present invention, in order to solve the above-mentioned problems, waveform equalization capable of minimizing the degree of high-frequency emphasis / high-frequency compensation of a reproduced signal whose high-frequency component has been greatly attenuated. Apply the formula. Here, IEE Transactions on Communications September 1975 (IEEE TRANSACTI)
ONS ONCOMMUNICATIONS, VOL.COM-
23, No. 9, SEPTEMBER 1975) and the concept of the partial response method described in the literature described in the Nikkei Electronics April 4, 1977, etc., and applied this to the effective use of magnetic recording bandwidth. Thus, the above-described waveform equalization method is realized.

[0008] The partial response method is conventionally intentionally adding intersymbol interference which has been treated as Zaru good Mashikara in the data transmission, that is by adding the intersymbol interference of a certain rule, the transmission system As shown in FIG. 4 (b), the Nyquist rate data transmission is possible even if the entire characteristic is not set to an ideal band limiting characteristic having a flat characteristic over the entire used frequency band. By applying the concept of the partial response method to the magnetic recording / reproducing system transmission line which is naturally subjected to band limitation due to the recording / reproducing ability of the head / medium system used as described above, that is, the recording frequency characteristic, the same recording frequency is obtained. Thus, it is possible to perform waveform equalization while suppressing an increase in noise as compared with the case where Nyquist waveform equalization is performed.

As means for applying this partial response system to magnetic recording and reproduction, US Pat. No. 4,644,564 discloses:
Japanese Patent Application Laid-Open No. 60-47538 discloses the application of a waveform equalization technique based on a partial response class 4 and the configuration of a data reproduction channel using a maximum likelihood sequence estimator. In the partial response class 4 reproduction system shown here, the same level of interference as the peak is added to the subsequent adjacent bit 1 bit in the isolated reproduction waveform. That is, in the conventional Nyquist waveform equalization method in which interference is completely removed from the reproduced signal, the isolated reproduced waveform is compared with that in FIG.
(A is a reproduced waveform peak value, T is a bit interval) W (f) = AT (| f | ≦ 1 / 2T) Equation (1) Nyquist having 0 in the spectrum Time waveform 18 (FIG. 5)
(B)) S1 (t) = A sin (πt / 2T) / (πt / 2T) In contrast to obtaining equation (2), the partial response class 4
5A, a signal waveform obtained by adding the Nyquist waveform 20 itself and a waveform 21 obtained by delaying the Nyquist waveform by 1 bit is obtained as a partial response isolated reproduction waveform 19, as shown in FIG.

S2 (t) = A sin (πt / 2T) / (πt / 2T) + A sin (π (tT) / 2T) / (π (tT) / 2T) Equation (3) By using a waveform processing method that allows the subsequent one bit 21 to have the same interference amplitude 22 as the amplitude of the isolated reproduction waveform 20 for the bit position of the original isolated reproduction waveform 20, the frequency as shown in FIG. Characteristic S1 (f) = 2Acos (πf / 2 (1 / T)) Equalizes to a waveform having equation (4). Such waveform equalization can suppress the degree of signal compensation in the vicinity of the Nyquist frequency, and can prevent deterioration in quality of the equalized signal due to an increase in noise.

In the present invention, in order to further enhance the effect of suppressing the high-frequency emphasis of the signal by the partial response system, this signal and a one-bit delayed signal of the signal are further added to the partial response signal. Is performed. That is, as shown in FIG. 1, a multistage delay adder 34a in which a plurality of stages of delay addition circuits 34 for adding an input signal and a 1-bit delay signal of this signal are connected in series at the subsequent stage of the Nyquist equalization circuit 33 is connected. The output signal 36 is used as an identification signal. As described above, the operation is repeated by combining a plurality of bit delay circuits 38 for delaying the phase of an input signal by one bit timing and a delay addition circuit 34 including an addition circuit 39 for adding the output and the input signal in series. The frequency response of the partial response signal is relaxed near the Nyquist frequency.

[0012]

According to the present invention, when an isolated reproduction signal is input, the operation of adding this signal to the output signal of the Nyquist equalization circuit and its one-bit time delay signal is performed n times (n times). ≧ 1), the spectrum of the final output signal with respect to the isolated reproduction waveform is represented by a cosine exponential spectrum Sn (f) = (2Acos (πf / 2 (1 / T))) ∧n Equation (5 ). Therefore, by this operation, the energy of the signal after the operation in the vicinity of the Nyquist frequency is attenuated more steeply, and the required absolute amount of the high-frequency component is suppressed lower. On the other hand, the spectrum of the reproduced signal obtained from the head has an infinite band, and has a characteristic that the energy is rapidly attenuated toward the high frequency due to the high frequency deterioration of the recording / reproducing system. Therefore, by performing the above operation, the frequency of the reproduced signal can be completely band-limited at the Nyquist frequency, and the required band of the reproduced signal can be reduced to the theoretical equalization limit in signal reproduction defined by the recording frequency. Can be. That is, it is possible to minimize the required band of the reproduced signal that spreads with the recording frequency, minimize the high-frequency noise above this band, and improve the signal-to-noise ratio of the reproduced signal.

Further, since the spectrum of equation (5), which is the final equalization target for the isolated reproduced waveform, is a cosine power spectrum, the number of times of the delay addition operation is n
With the repetition of the above, the required absolute amount of the energy component near the Nyquist frequency is suppressed to a lower level, and the manner of the attenuation becomes sharper, and becomes closer to the shape of the reproduced signal spectrum of the head output. As a result, the emphasis on high-frequency noise near the Nyquist frequency, which has become a problem during Nyquist equalization, can be reduced, and signal quality degradation due to noise during signal waveform equalization can be suppressed.

In addition, in the reproduced signal subjected to such waveform processing, the original 1-bit isolated pulse information is read out from the subsequent bits by multistage delay addition. By performing the maximum likelihood sequence estimation in the discriminator using the property, more reliable data reproduction can be performed.

[0015]

FIG. 1 shows a basic embodiment of the present invention.
The reproduction signal 37 read from the reproduction head is input to the delay addition circuit 34 through the Nyquist waveform equalization circuit 33. The delay addition circuit 34 constitutes a multi-stage delay addition circuit 34a connected in series at a plurality of stages, and each delay addition circuit 34 comprises a 1-bit delay circuit 37 and an addition circuit 38. A desired reproduction channel signal 36 in the present invention is obtained as an output of the multi-stage delay addition circuit 34a.

FIG. 6 shows a basic apparatus configuration for carrying out the present invention. The recording data is subjected to code conversion by the precoder 50 according to an appropriate conversion rule, and then input to the recording / reproduction channel 51, where recording and reproduction are performed. In the recording / reproducing channel 51, FIG.
The waveform processing of the present invention shown in FIG. The channel output signal 53 thus obtained is converted into a digital value by an analog / digital converter, and the data is reproduced in the decision unit 52.

FIG. 7 shows examples of recording code bits, recording current to the recording head, sample values of the reproduction signal after Nyquist equalization, and sample values of the reproduction channel output.

FIG. 8 shows the precoder 5 in the embodiment of FIG.
0 shows a specific internal configuration. The precoder 50
Basically, by performing the waveform processing reverse operation in the present invention on the recording code, error propagation at the time of data identification is prevented. FIG.
Shows a precoder embodiment in which the delay / addition circuit 34 of the multistage delay / addition circuit 34a in FIG. 1 has two stages. A circuit group consisting of 1-bit delay circuits 56, 57, 59 and multiplication circuits 60, 61 of -1 and an addition circuit 58 is a circuit equivalent to the multi-stage delay addition circuit 34, as shown in FIG. The precoding can be performed by feeding back these circuit group operations by the logical adder 55. At this time, the reproducing-side determiner 52 samples the normalized signal values (0, +1,
By taking the modulo 2 of (+2, -1, -2), it is possible to reproduce the recorded data.

FIG. 9 shows a means for obtaining the sample timing in the analog / digital converter 52a in FIG. A differential signal is obtained by a differentiating circuit 62 from an intermediate signal from the output of the Nyquist equalizing circuit 33 to the multi-stage delay adding circuit 34a. From the 0 cross pulse of this differential signal,
A pulse signal matching the peak phase of the reproduction signal is generated by the pulse generation circuit 63, and a gate signal generated by slicing the intermediate signal at a constant level is generated in the gate generator 64. The AND circuit 65 generates a peak pulse train 66 by using the gate signal to remove the pseudo pulse from the pulse signal. The peak pulse train 66 is drawn into the PLL circuit 67, and generates a sample timing pulse signal 68 having a recording frequency synchronized with the peak pulse. By supplying this as a sample timing signal of the analog / digital converter 52a, analog / digital conversion can be performed at a timing synchronized with the bit timing of the reproduction signal, and data can be reproduced by the discriminator 52.

FIG. 10 shows a second embodiment for obtaining the sample timing. In the present embodiment, sampling timing is extracted from the output signal of the multi-stage delay addition circuit 34a. After the processing of the reproduction signal in the present invention, the level value of the reproduction signal at the bit timing is limited to a plurality of values and fixed, except for the fluctuation due to noise. Therefore, if a pulse signal is generated from the level cross timing by providing one or more slicers in which a slice level is set for some or all of the finite number of level values, a pulse synchronized with the bit timing is reproduced. Can be extracted from Therefore, the multi-stage delay addition circuit 34a
Is applied to the output signal of each of the above at a level corresponding to each slice level. Therefore, one or more offset circuits 69 are provided in parallel, and a zero cross pulse of each offset output signal is generated through a zero cross slicer 63. Then, these pulses are drawn into the PLL circuit 67 to obtain a sample timing pulse signal 68 for analog / digital conversion.

[0021] recorded by the conditions of regeneration, than generating a sample pulse by differentiating the signal after the Nyquist equalization as in the embodiment of FIG. 9, the timing pulse from the signal of the waveform-processing as in this embodiment In some cases, the pulse fluctuation due to noise is smaller and the time accuracy of the analog / digital conversion is improved.

In order to reduce the influence of noise fluctuation of the timing pulse, the analog / digital converter 52
A configuration in which the operation a is placed immediately after the Nyquist equalization circuit 33 is also possible. In this case, the multi-stage delay addition circuit 34a performs digital processing.

FIG. 11 shows the effect of suppressing noise enhancement by the signal processing method of the present invention. Multi-stage delay addition circuit 34a
7 shows the comparison of the amount of noise increase with respect to the half width of the isolated reproduced waveform / the recording bit interval when the number of stages of the delay adder 34 is increased. When the number of stages is increased, as the half width of the isolated reproduction waveform / recording bit interval increases, the effect of suppressing high-frequency noise increases, and the amount of noise increase is suppressed. From this result, under the recording / reproducing conditions where the half width of the isolated reproduced waveform / recording bit interval is 0.5 to 1.5, one stage is optimal, and
At 1.5 or more, two or more stages are advantageous. When the number of stages is further increased, if a maximum likelihood estimation sequencer (Viterbi decoder) is used for the classifier, the signal-to-noise ratio of the signal to the classifier is
Lower values can be tolerated, and the reliability of data reproduction can be further increased under the same recording and reproduction conditions.

FIG. 12 shows an embodiment in which the Nyquist equalizer and the multistage delay adder are realized by a transversal filter.

The analog / digital converter 52a
FIG. 13 shows an embodiment in which the present invention is provided before the signal processing of the present invention and the present invention is realized by digital processing. According to this embodiment, the signal processing operation in the present invention can be realized with higher accuracy.

[0026]

According to the present invention, data can be reproduced with a low quality reproduction signal in magnetic recording and reproduction. As a result, the data transfer speed and recording density of the device can be increased, and large-capacity storage can be performed. Further, when the present invention is applied to a magnetic disk drive, a read head / read head at the time of reproduction is used.
The distance between recording media can be made wider than before, and head crashes can be easily avoided, leading to improvement in the reliability of the apparatus.

[Brief description of the drawings]

FIG. 1 is a block diagram of a basic embodiment of the present invention.

FIG. 2 is a block diagram of a magnetic recording / reproducing apparatus for explaining a conventional technique.

FIG. 3 is a signal timing chart of each section in the conventional example of FIG. 2;

FIG. 4 is an isolated reproduction time waveform diagram.

FIG. 5 is an explanatory diagram of an isolated reproduction waveform spectrum.

FIG. 6 is an overall block diagram including a basic embodiment of the present invention.

FIG. 7 is a time chart of each part signal in FIG. 6;

FIG. 8 is a block diagram of a precoder.

FIG. 9 is a diagram illustrating a means for obtaining a sample timing.

FIG. 10 is a view for explaining a second means for obtaining a sample timing.

FIG. 11 is a view for explaining the effect of suppressing noise emphasis by the signal processing of the present invention.

FIG. 12 is a block diagram of an embodiment realized by an ideal Nyquist filter and a transversal filter of a multistage delay adder.

FIG. 13 is a block diagram of an embodiment realized by digital processing of an ideal Nyquist filter and a multistage delay adder.

[Explanation of symbols]

33 ... Nyquist equalizer circuit, 34a ... multistage delay adder circuit, 34 ... delay adder circuit, 37 ... 1 bit delay circuit, 3
8 addition circuits, 56, 57, 58 1-bit delay circuits,
60, 61 ... multiplier, 58 ... addition circuit, 55 ... exclusive OR circuit, 69 ... offset circuit, 63 ... zero cross pulser.

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G11B 5/09

Claims (4)

(57) [Claims] 1. An equalizer for performing signal equalization based on a partial response to a magnetic recording / reproducing signal read from a reproducing head, and a plurality of delay adders having an adder circuit and a 1-bit delay circuit are connected in series. A multi-stage delay adder, wherein the multi-stage delay adder performs an operation of adding a one-bit delay signal of the partial response equalized signal to the partial response equalized signal a plurality of times in series. Recording and playback device. 2. A magnetic recording apparatus comprising a reproduction signal processing system for performing signal equalization by a partial response, wherein the signal processing system performs a partial response equalization signal on the partial response equalization signal with respect to the partial response equalization signal. And a means for performing a waveform processing operation for adding the one-bit delayed signal of the partial response equalized signal to a one-bit delayed signal a plurality of times. 3. A half of an isolated reproduction signal with respect to a recording bit interval.
3. The magnetic recording / reproducing apparatus according to claim 1, wherein recording / reproducing is performed by setting a recording / reproducing condition in which a value width ratio is 1.5 or more. 4. A magnetic recording and reproducing apparatus according to claim 1, further comprising a Viterbi decoder downstream of the multistage delay adder.