JP3061282B2 - Ceramic multilayer circuit board and semiconductor module - Google Patents
Ceramic multilayer circuit board and semiconductor moduleInfo
- Publication number
- JP3061282B2 JP3061282B2 JP2112513A JP11251390A JP3061282B2 JP 3061282 B2 JP3061282 B2 JP 3061282B2 JP 2112513 A JP2112513 A JP 2112513A JP 11251390 A JP11251390 A JP 11251390A JP 3061282 B2 JP3061282 B2 JP 3061282B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- circuit board
- multilayer circuit
- strength
- low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000919 ceramic Substances 0.000 title claims description 74
- 239000004065 semiconductor Substances 0.000 title claims description 8
- 239000004020 conductor Substances 0.000 claims description 40
- 239000011521 glass Substances 0.000 claims description 29
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 23
- 239000000463 material Substances 0.000 claims description 23
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 19
- 239000000758 substrate Substances 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 11
- 239000012671 ceramic insulating material Substances 0.000 claims description 6
- 239000004005 microsphere Substances 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- 239000011256 inorganic filler Substances 0.000 claims description 2
- 229910003475 inorganic filler Inorganic materials 0.000 claims description 2
- 229910021489 α-quartz Inorganic materials 0.000 claims description 2
- -1 B 4 C Inorganic materials 0.000 claims 1
- 229910010293 ceramic material Inorganic materials 0.000 claims 1
- 239000010410 layer Substances 0.000 description 182
- 239000000843 powder Substances 0.000 description 33
- 239000002002 slurry Substances 0.000 description 26
- 239000002245 particle Substances 0.000 description 17
- 239000000835 fiber Substances 0.000 description 16
- 238000010304 firing Methods 0.000 description 16
- 239000010949 copper Substances 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 11
- 229920006267 polyester film Polymers 0.000 description 11
- 238000010030 laminating Methods 0.000 description 9
- 239000011230 binding agent Substances 0.000 description 8
- 239000000203 mixture Substances 0.000 description 8
- 239000010409 thin film Substances 0.000 description 8
- 239000000047 product Substances 0.000 description 7
- 238000007639 printing Methods 0.000 description 6
- 239000011148 porous material Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 4
- 239000000945 filler Substances 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 229920001296 polysiloxane Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000002904 solvent Substances 0.000 description 4
- VXQBJTKSVGFQOL-UHFFFAOYSA-N 2-(2-butoxyethoxy)ethyl acetate Chemical compound CCCCOCCOCCOC(C)=O VXQBJTKSVGFQOL-UHFFFAOYSA-N 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- CERQOIWHTDAKMF-UHFFFAOYSA-N Methacrylic acid Chemical compound CC(=C)C(O)=O CERQOIWHTDAKMF-UHFFFAOYSA-N 0.000 description 3
- LRHPLDYGYMQRHN-UHFFFAOYSA-N N-Butanol Chemical compound CCCCO LRHPLDYGYMQRHN-UHFFFAOYSA-N 0.000 description 3
- 238000005452 bending Methods 0.000 description 3
- 239000005388 borosilicate glass Substances 0.000 description 3
- 238000001816 cooling Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000004744 fabric Substances 0.000 description 3
- 239000011812 mixed powder Substances 0.000 description 3
- 238000002156 mixing Methods 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- 230000035882 stress Effects 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 230000032798 delamination Effects 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 239000012784 inorganic fiber Substances 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- XNGIFLGASWRNHJ-UHFFFAOYSA-N phthalic acid Chemical compound OC(=O)C1=CC=CC=C1C(O)=O XNGIFLGASWRNHJ-UHFFFAOYSA-N 0.000 description 2
- 239000002244 precipitate Substances 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 230000001902 propagating effect Effects 0.000 description 2
- 230000003014 reinforcing effect Effects 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910018068 Li 2 O Inorganic materials 0.000 description 1
- CYTYCFOTNPOANT-UHFFFAOYSA-N Perchloroethylene Chemical group ClC(Cl)=C(Cl)Cl CYTYCFOTNPOANT-UHFFFAOYSA-N 0.000 description 1
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 1
- IHWJXGQYRBHUIF-UHFFFAOYSA-N [Ag].[Pt] Chemical compound [Ag].[Pt] IHWJXGQYRBHUIF-UHFFFAOYSA-N 0.000 description 1
- 229920005822 acrylic binder Polymers 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910000272 alkali metal oxide Inorganic materials 0.000 description 1
- 229910000287 alkaline earth metal oxide Inorganic materials 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- 125000000484 butyl group Chemical group [H]C([*])([H])C([H])([H])C([H])([H])C([H])([H])[H] 0.000 description 1
- 239000002826 coolant Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000007872 degassing Methods 0.000 description 1
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000002241 glass-ceramic Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052863 mullite Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 1
- 229920000620 organic polymer Polymers 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 1
- 229920006254 polymer film Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 229950011008 tetrachloroethylene Drugs 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- UBOXGVDOUJQMTN-UHFFFAOYSA-N trichloroethylene Natural products ClCC(Cl)Cl UBOXGVDOUJQMTN-UHFFFAOYSA-N 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】 [産業上の利用分野] 本発明は、セラミック多層回路板に係り、特に機能モ
ジュールの構成に好適なセラミック多層回路板およびそ
の製法に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic multilayer circuit board, and more particularly to a ceramic multilayer circuit board suitable for a configuration of a functional module and a method of manufacturing the same.
[従来の技術] 従来、グリーンシート上に導体ペーストと絶縁ペース
トを交互に印刷等により形成し、焼成したセラミック多
層回路板が知られている(特公昭52−37588号公報)。
また、グリーンシート上にフォトリソグラフの技術を用
いて微細配線を形成し、それを積層、焼成したセラミッ
ク多層回路板が特公昭63−37518号公報に、緻密質アル
ミナセラミック層と多孔質アルミナセラミック層を組み
合わせたセラミック多層回路板が特開昭59−22398号公
報に、また、表面層にアルミナのような高強度層を設
け、内層にムライトのような低誘電率層を設けたセラミ
ック多層回路板が特開昭60−14494号公報等により知ら
れている。また、有機系の多層回路板の分野でも、異種
の有機系シートを積層した多層回路板が知られている
(特開昭61−220499号公報)。2. Description of the Related Art Conventionally, there has been known a ceramic multilayer circuit board in which a conductive paste and an insulating paste are alternately formed on a green sheet by printing or the like and fired (Japanese Patent Publication No. 52-37588).
In addition, a ceramic multilayer circuit board formed by forming fine wiring on a green sheet using photolithographic technology, laminating and firing the fine wiring is disclosed in JP-B-63-37518, a dense alumina ceramic layer and a porous alumina ceramic layer. Japanese Patent Application Laid-Open No. 59-22398 discloses a ceramic multilayer circuit board in which a high-strength layer such as alumina is provided on the surface layer and a low dielectric constant layer such as mullite is provided on the inner layer. Is known from JP-A-60-14494. Also, in the field of organic multilayer circuit boards, multilayer circuit boards in which different kinds of organic sheets are laminated are known (Japanese Patent Laid-Open No. 61-220499).
[発明が解決しようとする課題] 近年、大型電子計算機は、演算速度の高速化のために
高密度実装が要求され、これを達成するために、高密度
多層回路板が実用化されつゝある。[Problems to be Solved by the Invention] In recent years, high-density packaging has been required for large-scale computers in order to increase the operation speed, and in order to achieve this, high-density multilayer circuit boards have been put into practical use. .
そして、セラミック多層回路板においては、電気信号
の高速化のために基板材料の低誘電率化が要求される一
方、実装の信頼性の点から高強度であることも要求され
る。しかし、この二つの特性を一種の材料で両立させる
ことは困難である。In the ceramic multi-layer circuit board, a low dielectric constant of the substrate material is required to increase the speed of an electric signal, and a high strength is also required from the viewpoint of mounting reliability. However, it is difficult to make these two properties compatible with one kind of material.
上記課題の解決手段としては、例えば、特開昭60−14
494号公報に開示されるように、多層回路板の最外層を
高強度材、内層を低誘電率材で形成することが考えられ
る。しかし、このような構成では、接続ピンを有する多
層回路板のピン付け強度に対しては有効であるが、回路
板全体の強度はその大部分を占める内層の低誘電率材の
強度に左右される。また、高強度層と低誘電率層の界面
においてクラックや剥離が生じ易く、また、誘電率が高
い高強度層が信号伝達速度に影響を及ぼすという云う問
題がある。As means for solving the above problems, for example, Japanese Patent Application Laid-Open No. 60-14 / 1985
As disclosed in Japanese Patent Publication No. 494, it is conceivable to form the outermost layer of the multilayer circuit board with a high strength material and the inner layer with a low dielectric constant material. However, such a configuration is effective for the pinning strength of a multilayer circuit board having connection pins, but the strength of the entire circuit board depends on the strength of the low-permittivity material of the inner layer that occupies most of the strength. You. In addition, there is a problem that cracks and peeling are likely to occur at the interface between the high-strength layer and the low-dielectric layer, and that the high-strength layer having a high dielectric constant affects the signal transmission speed.
セラミックは、一般に焼成に伴って収縮する。特に、
異種材料を積層して焼成すると、収縮特性の違いにより
異種材料間で剥離やクラックが発生し易い。Ceramics generally shrink with firing. In particular,
When dissimilar materials are stacked and fired, peeling and cracking are likely to occur between dissimilar materials due to differences in shrinkage characteristics.
また、通常のセラミック多層回路板をグリーンシート
から製造する方法は、該シートに配線パターンを形成
後、該シートを一枚一枚検査した上で、一括積層するた
め多層化には有利であり、歩留りもよい。しかし、微細
配線が形成された高密度多層回路板を作製する場合に
は、特性インピーダンスの点から絶縁層の厚さも薄くし
なければならないため、グリーンシートも薄くなければ
ならない。しかし、このように薄いグリーンシートは、
強度も弱く、変形し易いので取扱いにくいと云う問題が
ある。In addition, a method of manufacturing a normal ceramic multilayer circuit board from a green sheet is advantageous in multilayering because after forming a wiring pattern on the sheet, inspecting the sheets one by one, and laminating them collectively, Good yield. However, when manufacturing a high-density multilayer circuit board on which fine wiring is formed, the thickness of the insulating layer must be reduced from the viewpoint of characteristic impedance, so that the green sheet must be thin. However, such a thin green sheet
There is a problem that it is difficult to handle because it is weak in strength and easily deformed.
一方、導体層(配線)と絶縁層の形成の都度、焼成す
る逐次積層法による薄膜多層回路板は、配線の微細化お
よび高密度化の点で有利であるが、一層ずつ積層,焼成
して行くため、途中で不良が発生すると全部が不良とな
ってしまい製造歩留りが悪いと云う問題がある。また、
一層毎に焼成するため工程数が多くなり、量産性が悪
い。On the other hand, the thin-film multilayer circuit board by the sequential lamination method in which the conductor layer (wiring) and the insulating layer are formed each time the firing is performed is advantageous in terms of miniaturization and high density of the wiring. Therefore, if a defect occurs in the middle of the process, there is a problem that the whole becomes defective and the production yield is poor. Also,
Since firing is performed for each layer, the number of steps is increased, and mass productivity is poor.
本発明の目的は、高強度化と信号伝播速度の高速化を
両立させたセラミック多層回路板を提供することにあ
る。また、該セラミック多層回路板の量産性の優れた製
法を提供することにある。It is an object of the present invention to provide a ceramic multilayer circuit board that achieves both high strength and high signal propagation speed. Another object of the present invention is to provide a method for producing the ceramic multilayer circuit board with excellent mass productivity.
[課題を解決するための手段] 前記目的を達成するための本発明の要旨は下記のとお
りである。[Means for Solving the Problems] The gist of the present invention for achieving the above object is as follows.
(1)セラミック絶縁材料からなる絶縁層が複数積層さ
れ、各絶縁層間には導体が形成されており、各層の導体
を電気的に接続するビアホールを有するセラミック多層
回路板において、 前記絶縁層は高強度層と低誘電率層の2種類の絶縁層
の積層体からなり、 高強度層は低誘電率層よりも高強度材で構成され、 低誘電率層には信号層を有し、該低誘電率層と前記高
強度層の間に電源層またはグランド層が設けられている
ことを特徴とするセラミック多層回路板。(1) In a ceramic multilayer circuit board having a plurality of insulating layers made of a ceramic insulating material, conductors formed between the insulating layers, and via holes for electrically connecting the conductors of the respective layers, the insulating layer is high. The high-strength layer is composed of a higher-strength material than the low-k layer, and the low-k layer has a signal layer. A ceramic multilayer circuit board, wherein a power supply layer or a ground layer is provided between a dielectric layer and the high-strength layer.
(2)また、前記セラミック多層回路板の製法におい
て、 前記高強度層用のセラミックグリーンシートを作成す
る工程、 該高強度層用のセラミックグリーンシート上に導体ペ
ーストを用いて電源層またはグランド層となる導体層を
形成する工程、 離型処理した有機高分子フィルム上に前記低誘電率層
用のセラミックグリーンシートを形成する工程、 前記低誘電率層用のセラミックグリーンシート上に導
体ペースト用いて信号層を形成する工程、 前記高強度層用のセラミックグリーンシートの導体層
を形成した側に前記低誘電率層用のセラミックグリーン
シートを位置合わせして積層し、前記高分子フィルムを
剥離する工程、 前記高強度層用と低誘電率層用の積層グリーンシート
の複数組を圧着,積層しグリーンシート積層体を形成す
る工程、 前記グリーンシート積層体のバインダ抜きおよび焼成
を行う工程を含むことを特徴とするセラミック多層回路
板の製法。(2) In the method of manufacturing a ceramic multilayer circuit board, a step of forming a ceramic green sheet for the high-strength layer; and forming a power supply layer or a ground layer on the ceramic green sheet for the high-strength layer using a conductive paste. Forming a conductive green layer, forming a ceramic green sheet for the low dielectric constant layer on the release-treated organic polymer film, and forming a signal using a conductive paste on the ceramic green sheet for the low dielectric constant layer. Forming a layer, positioning and laminating the ceramic green sheet for the low dielectric constant layer on the side on which the conductor layer of the ceramic green sheet for the high strength layer is formed, and peeling the polymer film; A process for forming a green sheet laminate by pressing and laminating a plurality of sets of laminated green sheets for the high strength layer and the low dielectric constant layer. , Preparation of the ceramic multilayer circuit board which comprises a step of performing a binder vent and firing the green sheet laminate.
基板の高強度化と信号伝播速度の高速化とを1種類の
セラミック絶縁材料で両立させることが困難なことを記
述したが、本発明では前記のような構成とすることによ
って解決した。即ち、信号配線のほとんどを低誘電率層
に形成し、また、高強度層と低誘電率層の界面には電源
またはグランド層となる導体層を形成した構造にある。
こうすることにより、信号伝播速度は高強度層の影響を
ほとんど受けなくなる。従って、信号伝播速度は信号配
線を形成する低誘電率層の比誘電率でほゞ決まり、高速
化することができる。Although it has been described that it is difficult to achieve both high strength of the substrate and high signal propagation speed with one type of ceramic insulating material, the present invention has solved the problem by adopting the above configuration. That is, most of the signal wiring is formed on a low dielectric constant layer, and a conductor layer serving as a power supply or a ground layer is formed at an interface between the high strength layer and the low dielectric constant layer.
By doing so, the signal propagation speed is hardly affected by the high-intensity layer. Therefore, the signal propagation speed is substantially determined by the relative dielectric constant of the low dielectric constant layer forming the signal wiring, and can be increased.
また、該多層回路板に加えられる機械的応力の大半
は、比較的ヤング率の高い材料で形成された高強度層に
よって受けるようにしたことにある。In addition, most of the mechanical stress applied to the multilayer circuit board is received by the high-strength layer formed of a material having a relatively high Young's modulus.
また、1層以上の高強度層と、2層以上の低誘電率層
を交互に積層することによって、焼成収縮特性の差から
生じる応力や、異種材料間で生じる熱膨張係数の差に基
づく熱応力は、各層に比較的均一にかゝるため層間剥離
やクラック等が生じにくゝなる。In addition, by alternately laminating one or more high-strength layers and two or more low-dielectric layers, a thermal stress based on a difference in firing shrinkage characteristic and a difference in thermal expansion coefficient between different materials is obtained. Since the stress is applied relatively uniformly to each layer, delamination, cracks, etc. are less likely to occur.
更にまた、焼成収縮特性が異なる高強度層と低誘電率
層を組合せた場合には、収縮開始温度の低い方が収縮を
始めても、もう一方が収縮開始温度に達していないと、
両者の接着界面で面方向の収縮が抑制され、基板の収縮
はどちらかと云うと厚さ方向に起こる。そして、次に収
縮開始温度の高い方が収縮し始める温度になると、既に
焼結されているもう一方がその収縮を抑制するため、こ
れも厚さ方向に収縮する。その結果、多層回路板全体の
面方向の収縮を小さくすることができ、焼成収縮率のば
らつきも小さいと云う効果がある。Furthermore, in the case of combining a high strength layer and a low dielectric constant layer having different firing shrinkage characteristics, even if the lower shrinkage start temperature starts shrinking, if the other has not reached the shrinkage start temperature,
Shrinkage in the surface direction is suppressed at the bonding interface between the two, and shrinkage of the substrate rather occurs in the thickness direction. Then, when the next higher shrinkage start temperature reaches the temperature at which shrinkage starts, the other sintered body also shrinks in the thickness direction, because the other shrinkage suppresses the shrinkage. As a result, the shrinkage of the entire multilayer circuit board in the plane direction can be reduced, and the variation in the firing shrinkage is small.
また、本発明は前記のように高強度層を挾んでその両
側に形成される導電層(電源層またはグランド層)間に
電位差を有しても、該高強度層は比較的誘電率が高いた
め、電圧変動を抑えて小さくする効果がある。Further, according to the present invention, even if there is a potential difference between the conductive layers (power supply layer or ground layer) formed on both sides of the high-strength layer as described above, the high-strength layer has a relatively high dielectric constant. Therefore, there is an effect that voltage fluctuation is suppressed and reduced.
前記低誘電率層と高強度層間には、層間剥離等が問題
となるが、材料の選択により解決することができる。例
えば、両者を構成するガラスに同じものを使用し、無機
フィラ(以下フィラと云う)が異なる材質のものを用い
ることによって、層間の接着強度が優れた多層回路板を
得ることができる。A problem such as delamination between the low dielectric layer and the high strength layer can be solved by selecting a material. For example, by using the same glass for both components and using a material having a different inorganic filler (hereinafter referred to as a filler), a multilayer circuit board having excellent interlayer adhesive strength can be obtained.
前記高強度層用フィラとしては、例えば、Al2O3、B
4C、SiC等のヤング率の高い材料が好ましい。As the filler for the high-strength layer, for example, Al 2 O 3 , B
Materials with high Young's modulus, such as 4 C and SiC, are preferred.
また、ガラス粉末としては、酸化物に換算してMgOを2
0〜30mol%、CaOを0.1〜3mol%、Al2O3を10〜30mol%、
B2O3を35〜45mol%、SiO2を0〜30mol%の範囲で調製し
たものが好ましい。In addition, as glass powder, MgO is converted to oxide by 2
0~30mol%, 0.1~3mol% of CaO, 10 to 30 mol% of Al 2 O 3,
B 2 O 3 to 35~45mol%, it is preferable that to prepare a SiO 2 in the range of 0~30mol%.
低誘電率層用フィラとしては、例えば、α石英、Si
O2、SiO2の中空微小球等の低誘電率フィラが好ましい。
また、ガラス粉末は、高強度層に使用したガラス粉末と
同じ組成のものを用いることができる。該ガラスは焼成
時に主に2Al2O3・B2O3の結晶を析出する結晶化ガラスが
よい。As fillers for the low dielectric constant layer, for example, α quartz, Si
A low dielectric constant filler such as hollow microspheres of O 2 or SiO 2 is preferred.
The glass powder may have the same composition as the glass powder used for the high-strength layer. The glass good crystallized glass which precipitates a main crystalline of 2Al 2 O 3 · B 2 O 3 during sintering.
また、低誘電率層として、セラミックペーパやセラミ
ッククロスまたはガラスクロスのような無機質繊維基材
の表面に、前記セラミック粉末を付着させたものを焼成
して用いることができる。これは、からみ合った無機質
繊維がセラミック粉末の内部侵入を阻止するため、表面
が緻密で内部に気孔を含むものが得られ、低誘電率化に
好ましい材料である。Further, as the low dielectric constant layer, a material in which the ceramic powder is adhered to the surface of an inorganic fiber base material such as ceramic paper, ceramic cloth or glass cloth can be used by firing. This is a material that is preferable for lowering the dielectric constant, since the entangled inorganic fibers prevent the ceramic powder from entering the inside, so that a material having a dense surface and containing pores is obtained.
ビアホールに充填する導体ペーストは、平均粒径5μ
mのガラス粉末2〜20重量%に金、銅、銀−パラジュウ
ム、銀−白金等の粉末を98〜80重量%配合し、この混合
粉末にメタクリル酸系のバインダと溶媒例えばブチルカ
ルビトールアセテート等を適量配合したものを混合し、
適当な粘度に調整して用いる。なお、該ペーストのガラ
ス粉末組成は、酸化物に換算しSiO270〜80mol%、Al2O3
10〜15mol%、Cu2O10〜15mol%配合したものが好まし
い。The conductive paste filling the via holes has an average particle size of 5μ.
98 to 80% by weight of a powder of gold, copper, silver-palladium, silver-platinum or the like is mixed with 2 to 20% by weight of a glass powder of m, and a methacrylic acid-based binder and a solvent such as butyl carbitol acetate are added to the mixed powder. Mix the appropriate amount of
Adjust to an appropriate viscosity before use. In addition, the glass powder composition of the paste is 70 to 80 mol% of SiO 2 in terms of oxide, and Al 2 O 3
Those containing 10 to 15 mol% of Cu 2 O and 10 to 15 mol% of Cu 2 O are preferable.
セラミック多層回路板は、薄いグリーンシートにビア
ホールを形成した後、信号配線または導体層を形成し、
これらを一括積層して焼成すれば、歩留りよく回路板が
形成できそうに思われるが、実際にはこうした薄いグリ
ーンシートは強度が小さいことや、グリーンシートの伸
びによるパターン変形が大きい等から高精度のものを得
ることは容易でない。After forming a via hole in a thin green sheet, a ceramic multilayer circuit board forms a signal wiring or a conductor layer,
If these are laminated and fired at the same time, it seems that a circuit board can be formed with good yield. However, in practice, such thin green sheets have high strength due to their low strength and large pattern deformation due to green sheet elongation. Getting things is not easy.
そこで、本発明では比較的厚いグリーンシート上に、
導体層または信号層と、ビアホールを形成した無機薄膜
絶縁層とを交互に数層積層したものを一組とし、これを
数組積層して焼成し多層回路板とした。Therefore, in the present invention, on a relatively thick green sheet,
A multilayer circuit board was obtained by laminating several layers of conductor layers or signal layers and inorganic thin film insulating layers having via holes formed alternately, and laminating and firing several sets.
前記無機薄膜絶縁層は、厚いグリーンシート上に直接
形成しても、また、他の基板上で作製したものを厚いグ
リンシート上に転写等によって形成してもよい。なお、
厚いグリーンシート上に逐次積層する方法で無機薄膜絶
縁層を形成するに当たってはその積層数は数層程度とす
る。こうすることによって、全層を逐次積層する従来方
式のものに比べ、その不良発生率を1/2以下とすること
ができる。The inorganic thin film insulating layer may be formed directly on a thick green sheet, or may be formed on another substrate by transfer onto a thick green sheet. In addition,
In forming the inorganic thin film insulating layer by a method of sequentially laminating on a thick green sheet, the number of laminating layers is about several layers. By doing so, the defect occurrence rate can be reduced to half or less as compared with the conventional system in which all layers are sequentially laminated.
[作用] 本発明のセラミック多層回路板が信号伝播の高速化を
図ることができるのは、信号配線の大部分が低誘電率層
に形成されており、かつ、低誘電率層と高強度層との間
に設けた電源層またはグランド層によって、誘電率の高
い高強度層の電気的影響が少ないためと考える。[Operation] The ceramic multilayer circuit board of the present invention can increase the speed of signal propagation because most of the signal wiring is formed in the low dielectric layer, and the low dielectric layer and the high strength layer are formed. It is considered that the power layer or the ground layer provided between them has little electrical influence on the high-strength layer having a high dielectric constant.
また、基板に加わる機械的応力は、少なくとも数層毎
に挿入されている高強度層が受け持つので、強度の高い
基板とすることができる。In addition, the mechanical stress applied to the substrate is at least applied to the high-strength layers inserted every several layers, so that the substrate can have high strength.
更にまた、本発明のセラミック多層回路板の製造歩留
りを向上することができるのは、比較的厚いグリーンシ
ート上に数層の薄膜多層回路を形成したものを一組とし
て、これを複数組積層する方法で作製するためである。Furthermore, the manufacturing yield of the ceramic multilayer circuit board of the present invention can be improved because a plurality of thin-film multilayer circuits formed on a relatively thick green sheet are laminated as a set. It is for producing by a method.
[実施例] 以下に、本発明の実施例を第1図〜第9図を用いて具
体的に説明する。Embodiment An embodiment of the present invention will be specifically described below with reference to FIGS. 1 to 9.
〔実施例1〕 第1図は本発明のセラミック多層回路板の概要を示す
断面図、第2図は本発明のセラミック多層回路板の転写
法による製造工程を示すフロ−図である。Embodiment 1 FIG. 1 is a cross-sectional view showing an outline of a ceramic multilayer circuit board of the present invention, and FIG. 2 is a flowchart showing a manufacturing process of the ceramic multilayer circuit board of the present invention by a transfer method.
第2図のセラミック多層回路板の高強度層用のグリー
ンシート13として、平均粒径5μmのガラス粉70重量
%、平均粒径1μmのAl2O3粉末30重量%用意する。前
記ガラス粉末は、酸化物に換算してMgO22.8mol%、CaO
1.2mol%、Al2O328mol%、B2O338.4mol%、SiO29.6mol
%配合したものである。As a green sheet 13 for a high-strength layer of the ceramic multilayer circuit board in FIG. 2, 70% by weight of glass powder having an average particle size of 5 μm and 30% by weight of Al 2 O 3 powder having an average particle size of 1 μm are prepared. The glass powder contains MgO 22.8 mol% in terms of oxide, CaO
1.2mol%, Al 2 O 3 28mol %, B 2 O 3 38.4mol%, SiO 2 9.6mol
%.
次に前記のガラス粉末およびAl2O3粉末の混合物100重
量部に、メタクリル酸系の有機バインダ20重量部、トリ
クロロエチレン99重量部、テトラクロロエチレン26重量
部、n−ブチルアルコール35重量部、フタル酸ジ−n−
ブチル1重量部を加え、ボールミルで24時間湿式混合し
てスラリを作製した。該スラリは、減圧脱気処理により
適当な粘度に調整した。Next, 20 parts by weight of a methacrylic acid-based organic binder, 99 parts by weight of trichloroethylene, 26 parts by weight of tetrachloroethylene, 35 parts by weight of n-butyl alcohol, and 35 parts by weight of phthalic acid were added to 100 parts by weight of the mixture of the above glass powder and Al 2 O 3 powder. -N-
One part by weight of butyl was added and wet-mixed with a ball mill for 24 hours to prepare a slurry. The slurry was adjusted to an appropriate viscosity by degassing under reduced pressure.
次いで、前記スラリをドクターブレードを用いて、シ
リコーンコートしたポリエステルフィルム上に1.5mm厚
さに塗布した後、乾燥しポリエステルフィルムを剥離し
てグリーンシート13を作製した。Next, the slurry was applied on a silicone-coated polyester film to a thickness of 1.5 mm using a doctor blade, dried, and the polyester film was peeled off to produce a green sheet 13.
次に、第1図のビアホール3に充填する導体ペースト
は、平均粒径5μmのガラス粉末10重量%に銅粉末を90
重量%配合し、この混合粉末100重量部に対してメタク
リル酸系の有機バインダ30重量部、ブチルカルビトール
アセテート100重量部を加えたものをらいかい機で30分
混合し、適当な粘度に調整した。なお、該ペーストのガ
ラス粉末組成は酸化物に換算し、SiO275mol%、Al2O21
2.5mol%、Cu2O12.5mol%を配合したものである。Next, the conductive paste to be filled in the via hole 3 in FIG. 1 is obtained by adding 90% copper powder to 10% by weight of glass powder having an average particle size of 5 μm.
% By weight, and 100 parts by weight of this mixed powder, 30 parts by weight of a methacrylic acid-based organic binder and 100 parts by weight of butyl carbitol acetate are mixed for 30 minutes by a triturator to adjust to an appropriate viscosity. did. The glass powder composition of the paste was converted to oxide, and SiO 2 75 mol%, Al 2 O 2 1
It contains 2.5 mol% and 12.5 mol% of Cu 2 O.
次に、前記グリーンシート13に、機械加工により直径
100μmφの穴12を穿け、第1図のビアホール3を形成
するため前記導体ペースト9を埋め込んだ。更に、上記
の導体ペーストの粘度を調整して、このグリーンシート
上にグランド層9′を印刷により形成した。Next, the green sheet 13 has a diameter
A hole 12 having a diameter of 100 μm was formed, and the conductive paste 9 was buried to form the via hole 3 shown in FIG. Further, the viscosity of the conductive paste was adjusted, and a ground layer 9 'was formed on the green sheet by printing.
一方、低誘電率層としては、ポリエステルフィルム10
上に前記の粘度を再調整した導体ペーストを用いて、厚
さ15μm×幅50μmの信号層5を印刷配線し、この上に
低誘電率層用のスラリ11を印刷塗布した。なお、該スラ
リは、平均粒径5μmのガラス粉60重量%と平均粒径1
μmのSiO2粉40重量%を配合したものを用い、前記の高
強度層と同様にして作製した。用いたガラス粉末の組成
は、高強度層に使用したガラス粉末と同じ組成のもので
ある。またこのガラスは、焼成時に2Al2O3・B2O3の結晶
を析出する結晶化ガラスである。On the other hand, a polyester film 10
The signal layer 5 having a thickness of 15 μm and a width of 50 μm was printed and wired on the conductive paste whose viscosity was readjusted above, and a slurry 11 for a low dielectric constant layer was printed thereon. The slurry was composed of 60% by weight of glass powder having an average particle size of 5 μm and an average particle size of 1 μm.
It was prepared in the same manner as the above-mentioned high-strength layer, using a mixture containing 40% by weight of a 2 μm SiO 2 powder. The composition of the glass powder used was the same as that of the glass powder used for the high-strength layer. The glass is a crystallized glass which precipitates crystals of 2Al 2 O 3 · B 2 O 3 during sintering.
前記スラリ11を乾燥後、レーザーで所定の位置に直径
100μmφの穴12を穿け、前記Cu系導体ペースト9を印
刷法により埋め込んだ。After drying the slurry 11, use a laser to set the diameter
A hole 12 having a diameter of 100 μm was formed, and the Cu-based conductor paste 9 was embedded by a printing method.
次に、上記ポリエステルフィルム10上に形成した低誘
電率層を、前記高強度層用のグリーンシート13上に位置
合せして圧着,積層しポリエステルフィルム10を剥がし
た。Next, the low dielectric layer formed on the polyester film 10 was positioned on the green sheet 13 for the high-strength layer, pressed and laminated, and the polyester film 10 was peeled off.
次に、この上に同様にしてビアホールのみの層あるい
は信号層5を同様に転写積層し3層からなる低誘電率層
7を形成した。さらにこの積層体上へ前記Cu系導体ペー
ストでグランド9′を印刷した。Next, a layer having only a via hole or a signal layer 5 was similarly transferred and laminated thereon in the same manner to form a low dielectric constant layer 7 composed of three layers. Further, a ground 9 'was printed on the laminate with the above-mentioned Cu-based conductor paste.
こうして得た高強度層1層と低誘電率層3層からなる
積層体を5組積層し、熱間プレスにより圧着した。圧着
条件は、温度100℃、圧力は50kgf/mm2である。Five sets of the laminate composed of one high-strength layer and three low-dielectric-constant layers thus obtained were laminated and pressed by hot pressing. Crimping conditions are a temperature of 100 ° C. and a pressure of 50 kgf / mm 2 .
こうして作製した積層体は、100℃/hの昇温速度で室
温から昇温してバインダ抜きを行い、980℃で1時間焼
成して焼成品を得た。なお、焼成雰囲気としては、30容
量%の水蒸気を含む窒素中である。The laminate thus produced was heated from room temperature at a rate of 100 ° C./h to remove the binder, and fired at 980 ° C. for 1 hour to obtain a fired product. The firing atmosphere was nitrogen containing 30% by volume of water vapor.
このようにして作製したセラミック多層回路板は、高
強度層の厚さ350μm、低誘導率層の厚さ80μmで、導
体層(信号層,電源層,グランド層)およびビアホール
の回りにクラックや剥離等は認められなかった。The ceramic multilayer circuit board thus manufactured has a high-strength layer thickness of 350 μm and a low-inductance layer thickness of 80 μm, and cracks and peels around conductor layers (signal layer, power layer, ground layer) and via holes. Was not recognized.
更に、第1図に示すように、焼成品にピン8を付け、
LSIチップ1をはんだ2により装着した。ピン8の周辺
にもクラック等は認められなかった。また基板の反りや
変形等も認められなかった。Further, as shown in FIG. 1, a pin 8 is attached to the fired product,
The LSI chip 1 was mounted with the solder 2. No crack or the like was observed around the pin 8. No warping or deformation of the substrate was observed.
該セラミック多層回路板の曲げ強さは15kgf/mm2であ
り、信号伝播速度は比誘電率4の材料中を伝播する時の
速度1.5×108m/秒と同じで、高強度化と信号伝播速度の
高速化を両立したセラミック多層回路板を得ることがで
きる。The flexural strength of the ceramic multilayer circuit board is 15 kgf / mm 2 , and the signal propagation speed is the same as the speed of 1.5 × 10 8 m / sec when propagating through a material having a relative dielectric constant of 4. It is possible to obtain a ceramic multi-layer circuit board compatible with increasing the propagation speed.
また、グリーンシートとして積層が困難であった薄い
絶縁層の形成が、前記のようにすることにより比較的容
易に行うことができた。本実施例は、絶縁層が薄く形成
できるので、インダクタンスが小さく、電気的ノイズの
発生率も従来のものに比べて少ない。 Further, the formation of a thin insulating layer, which was difficult to laminate as a green sheet, could be performed relatively easily by the above-described method. In this embodiment, since the insulating layer can be formed thin, the inductance is small and the rate of occurrence of electric noise is smaller than that of the conventional one.
〔実施例2〕 実施例1と同様にして、第1,2表に示すガラスを用い
て第3表に示す組成のセラミックスで高強度層用のグリ
ーンシート13を作製した。[Example 2] In the same manner as in Example 1, a green sheet 13 for a high-strength layer was produced from the ceramics shown in Table 3 using the glasses shown in Tables 1 and 2.
次に実施例1と同様に穴を穿け、第3表に示す導体ペ
ーストを充填し、導体層を印刷形成した。Next, holes were made in the same manner as in Example 1, the conductive paste shown in Table 3 was filled, and a conductive layer was formed by printing.
更に、第3表に示す低誘電率層用のセラミックスのス
ラリを調製して、実施例1と同様にポリエステルフィル
ム上に薄膜を形成した後、これを転写,積層したものを
複数組積層して積層体とし、焼成してセラミック多層回
路板とした。Further, a slurry of ceramics for a low dielectric constant layer shown in Table 3 was prepared, a thin film was formed on a polyester film in the same manner as in Example 1, and this was transferred and laminated. The laminate was fired to obtain a ceramic multilayer circuit board.
得られたセラミック多層回路板の導体層やビアホール
の回りにはクラックや剥がれ等は認められず、基板に反
り、変形なども認められなかった。また、装着したLSI
チップ−セラミック多層回路板−ピン8の電気的な接続
不良は発生しなかった。なお、前記のセラミック多層回
路板の低誘電率層の厚さは60μm、配線幅は20μmであ
る。No cracks or peeling were observed around the conductor layers and via holes of the obtained ceramic multilayer circuit board, and no warping or deformation of the substrate was observed. In addition, the installed LSI
No defective electrical connection between the chip, the ceramic multilayer circuit board, and the pins 8 occurred. The thickness of the low dielectric constant layer of the ceramic multilayer circuit board is 60 μm, and the wiring width is 20 μm.
〔実施例3〕 第3図は高強度層に繊維を複合化したセラミック多層
回路板の概要を示す断面図である。Example 3 FIG. 3 is a cross-sectional view showing an outline of a ceramic multilayer circuit board in which fibers are combined with a high-strength layer.
酸化物に換算してSiO278重量%、B2O314.5重量%、ア
ルカリ土類金属酸化物(MgO)2重量%、アルカリ金属
酸化物(K2O)3重量%、Al2O31.5重量%、不純物1重
量%の平均粒径5μmのホウケイ酸ガラス粉末70重量%
と、平均粒径1μmのSiO230重量%とを配合し、実施例
1と同様にスラリを調製した。In terms of oxide, 78% by weight of SiO 2, 14.5% by weight of B 2 O 3 , 2 % by weight of alkaline earth metal oxide (MgO), 3% by weight of alkali metal oxide (K 2 O), Al 2 O 3 70% by weight of borosilicate glass powder with an average particle size of 5 μm containing 1.5% by weight and 1% by weight of impurities
And 30% by weight of SiO 2 having an average particle diameter of 1 μm, and a slurry was prepared in the same manner as in Example 1.
次に、第3図に示すようにAl2O3長繊維18をクロス状
に編んだ厚さ約100μmのシートの両面に、前記スラリ
を約50μmの厚さに塗布した。次に機械加工により100
μmφの穴を穿け、導体ペーストを埋め込んでビアホー
ル3を形成し、導体層(電源層またはグランド層)4を
両面に印刷し高強度層6を形成した。なお、用いた導体
ペーストは、Pt1重量%とAg99重量%からなる導体粉末
およびアクリル系バインダ、ブチルカルビトールアセテ
ートを混合し適当な粘度に調整したものである。Next, as shown in FIG. 3, the slurry was applied to both sides of a sheet having a thickness of about 100 μm in which Al 2 O 3 long fibers 18 were knitted in a cross shape to a thickness of about 50 μm. Next, 100
A via hole 3 was formed by piercing a hole having a diameter of μm and burying a conductive paste, and a conductive layer (power supply layer or ground layer) 4 was printed on both sides to form a high-strength layer 6. The conductor paste used was prepared by mixing a conductor powder composed of 1% by weight of Pt and 99% by weight of Ag, an acrylic binder, and butyl carbitol acetate to adjust the viscosity to an appropriate value.
一方、低誘電率層7のグリーンシートは、セラミック
ス原料としてホウケイ酸ガラスを60重量%、SiO2ガラス
を40重量%配合した混合粉末を用い、実施例1と同様に
してスラリを調製し、ドクターブレードを用いてシリコ
ーンコートしたポリエステルフィルム上に700μm厚さ
に塗布,乾燥し、厚さ230μmのグリーンシートを作製
した。On the other hand, for the green sheet of the low dielectric constant layer 7, a slurry was prepared in the same manner as in Example 1 by using a mixed powder containing 60% by weight of borosilicate glass and 40% by weight of SiO 2 glass as a ceramic raw material. It was applied to a thickness of 700 μm on a silicone-coated polyester film using a blade and dried to produce a 230 μm thick green sheet.
前記の低誘電率層用グリーンシート3枚に100μmφ
の穴を穿け、前記Pt−Agペーストを充填してビアホール
3とし、更に信号層5を印刷した。配線幅は130μmで
ある。該グリーンシートを前記高強度層用グリーンシー
ト上に位置合わせして転写,積層した。100μmφ for the three green sheets for low dielectric constant layer
And a via hole 3 was filled with the Pt-Ag paste, and a signal layer 5 was printed. The wiring width is 130 μm. The green sheet was transferred and laminated on the green sheet for the high-strength layer while being positioned.
次に、前記繊維を含んだ高強度層シート1層に対し
て、信号層または導体層を印刷した繊維を含まない低誘
電率層シート3層を1組とする積層体を5組積層し、実
施例1と同様に加圧して積層体を作製した。Next, for one layer of the high-strength layer sheet containing the fibers, five sets of laminates each including three layers of the low-dielectric-constant layer sheet containing no fibers printed with the signal layer or the conductor layer are laminated, Pressing was performed in the same manner as in Example 1 to produce a laminate.
上記の積層体を大気中,100℃/hの昇温速度で室温より
昇温し、900℃、1時間焼成して焼成品を得た。該焼成
品にピン付けおよびLSIチップを装着しセラミック多層
回路板を得た。The above-mentioned laminate was heated from the room temperature in the atmosphere at a rate of 100 ° C./h and fired at 900 ° C. for 1 hour to obtain a fired product. Pins and LSI chips were attached to the fired product to obtain a ceramic multilayer circuit board.
該多層回路板の導体層4およびビアホール3の回りに
クラックや剥離等は認められなかった。また基板に反り
や変形等も認められなかった。No crack or peeling was observed around the conductor layer 4 and the via hole 3 of the multilayer circuit board. Also, no warping or deformation of the substrate was observed.
本実施例のセラミック多層回路板は、繊維が面方向の
焼成収縮を抑えるため、面方向の焼成収縮率が約1%で
あり、高寸法精度のセラミック多層回路板とすることが
できる。またAl2O3繊維が、セラミック多層回路板の強
度を向上し、その曲げ強さは15kgf/mm2であり、信号伝
播速度は、比誘電率4の材料中を伝播する時と同じ速度
での1.5×108m/秒であった。In the ceramic multilayer circuit board of this embodiment, since the fiber suppresses the firing shrinkage in the surface direction, the firing shrinkage in the surface direction is about 1%, and a ceramic multilayer circuit board with high dimensional accuracy can be obtained. Also, Al 2 O 3 fiber improves the strength of the ceramic multilayer circuit board, its bending strength is 15 kgf / mm 2 , and the signal propagation speed is the same as when propagating in a material having a relative dielectric constant of 4. 1.5 × 10 8 m / sec.
〔実施例4〕 高強度層用グリーンシートとして、酸化物に換算して
MgO25mol%、Al2O315mol%、B2O340mol%、SiO220mol%
を基本組成とする平均粒径5μmのガラス粉末70重量%
と、平均粒径1μmのAl2O3粉末30重量%とを混合し、
実施例1と同様にしてスラリを調製した。該スラリをド
クターブレードを用いて、シリコーンコートしたポリエ
ステルフィルム上に1mm厚さに塗布し、乾燥してグリー
ンシートを作製した。Example 4 As a green sheet for a high-strength layer, in terms of oxides
MgO 25 mol%, Al 2 O 3 15 mol%, B 2 O 3 40 mol%, SiO 2 20 mol%
70% by weight of glass powder having a basic composition of 5 μm in average particle size
And 30% by weight of Al 2 O 3 powder having an average particle size of 1 μm,
A slurry was prepared in the same manner as in Example 1. The slurry was applied on a silicone-coated polyester film to a thickness of 1 mm using a doctor blade and dried to produce a green sheet.
第7図に示すように前記グリーンシート13に、機械加
工により100μmφの穴12を穿け、この穴に実施例1で
使用したCu系導体ペースト9を充填した。さらに実施例
1と同様にしたCu系導体ペースト9で導体層を印刷し
た。As shown in FIG. 7, a hole 12 having a diameter of 100 μm was drilled in the green sheet 13 by machining, and the hole was filled with the Cu-based conductor paste 9 used in Example 1. Further, a conductor layer was printed with the Cu-based conductor paste 9 in the same manner as in Example 1.
次に、、低誘電率層グリーンシートとして、SiO2ガラ
ス短繊維をランダムに並べて、布状にして厚さ50μmの
セラミックペーパ16の両面にスラリ11を20μmずつ塗布
した。該スラリ11は、平均粒径5μmのガラス粉を60重
量%、平均粒径1μmのSiO2ガラス粉を40重量%配合
し、実施例1と同様にして作製した。ここで用いた平均
粒径5μmのガラス粉は、高強度層に使用したものと同
じ、MgO−Al2O3−B2O3−SiO2系のガラスである。前記ス
ラリ11を塗布した低誘電率層シートに100μmの穴12を
穿け、実施例1で使用したCuペースト9を充填した。Next, as a low dielectric constant layer green sheet, SiO 2 glass short fibers were randomly arranged, and the slurry 11 was applied to both sides of a 50 μm-thick ceramic paper 16 in the form of a cloth in an amount of 20 μm. The slurry 11 was prepared in the same manner as in Example 1 by mixing 60% by weight of glass powder having an average particle diameter of 5 μm and 40% by weight of SiO 2 glass powder having an average particle diameter of 1 μm. The glass powder having an average particle size of 5 μm used here is the same MgO—Al 2 O 3 —B 2 O 3 —SiO 2 glass used in the high-strength layer. A hole 12 having a thickness of 100 μm was formed in the low dielectric constant layer sheet to which the slurry 11 was applied, and the Cu paste 9 used in Example 1 was filled.
次に、感光性樹脂とセラミック原料を用いてスラリ11
を作製し、ポリエステルフィルム10上に厚さ20μmに塗
布し、さらに配線パターン状のマスクをして紫外線照射
後、配線部分の感光性樹脂を含むスラリを溶剤で現像し
て除去し、配線パターンを形成後該パターン以外にマス
クをし、Cuを蒸着して配線パターンに無電解Cuメッキを
施し厚さ20μm、幅40μmのCu配線を形成した。該シー
トを2枚作製してX方向の信号層5、Y方向の信号層5
とした。Next, a slurry 11 was prepared using a photosensitive resin and a ceramic raw material.
Is prepared, coated on a polyester film 10 to a thickness of 20 μm, further irradiating ultraviolet rays with a wiring pattern mask, and developing a solvent-containing slurry containing a photosensitive resin with a solvent to remove the wiring pattern. After the formation, a mask was applied to the pattern other than the pattern, Cu was deposited, and electroless Cu plating was applied to the wiring pattern to form a Cu wiring having a thickness of 20 μm and a width of 40 μm. Two sheets are prepared and the signal layer 5 in the X direction and the signal layer 5 in the Y direction
And
前記スラリ11を塗布した低誘電率層用の繊維を含んだ
シート16の両面に位置合せしてX方向の信号層、Y方向
の信号層を転写,積層した。A signal layer in the X direction and a signal layer in the Y direction were transferred and laminated on both sides of the sheet 16 containing the fibers for the low dielectric constant layer to which the slurry 11 was applied.
次に、空洞15を有する層を作製した。空洞の作製方法
は、繊維の両面に塗布したものと同じスラリ11を金属板
上へ塗布し、所定の位置に電子ビームで穴を穿け、この
穴に上記のCu導体ペーストを印刷法で充填しビアホール
3を形成した。Next, a layer having the cavity 15 was produced. The method of manufacturing the cavity is to apply the same slurry 11 as that applied to both sides of the fiber on a metal plate, make holes in predetermined positions with an electron beam, and fill the holes with the above-mentioned Cu conductor paste by printing. Via hole 3 was formed.
第5図に示すように、信号層ターンと同じパターン状
の突起部を有する電極14と、導体14′を一対とする電極
間に低誘電率層用のグリーンシート11′を挾んで高周波
電圧を印加した。高周波電圧による放電によって、グリ
ーンシート内に空洞15が形成される。該空洞15の形状は
信号の高速化に適した形状とする。As shown in FIG. 5, a high frequency voltage is applied by sandwiching a green sheet 11 'for a low dielectric constant layer between an electrode 14 having a projection in the same pattern as the signal layer turn and a pair of conductors 14'. Applied. A cavity 15 is formed in the green sheet by the discharge by the high frequency voltage. The shape of the cavity 15 is a shape suitable for speeding up a signal.
次に第7図に示すように、前記の繊維を含む層16、X
およびY方向の信号層5を含む層を積層したものの両面
に、上記の空洞を形成したシート21を転写,積層した。
更に、この積層体に導体層4を印刷した。そしてこの積
層体と上記で作製した高強度層のグリーンシート13を1
組とし、合計5組積層した。Next, as shown in FIG. 7, the layer 16, X
The sheet 21 in which the above-mentioned voids were formed was transferred and laminated on both sides of the layer including the layer including the signal layer 5 in the Y direction.
Further, the conductor layer 4 was printed on the laminate. Then, this laminate and the green sheet 13 of the high-strength layer prepared above were
A total of five sets were stacked.
前記積層体は実施例1と同様にバインダ抜きし、980
℃で1時間焼成して、信号層4に接した空洞15を有する
焼成品を得た。The binder was removed from the laminate in the same manner as in Example 1, and 980 was removed.
C. for one hour to obtain a fired product having a cavity 15 in contact with the signal layer 4. FIG.
前記空洞15の形成法は、グリーンシートにレーザーを
照射することにより形成してもよい。また、セラミック
スのバインダとして感光性樹脂を使用し、配線パターン
のマスクをして紫外線を照射し、該感光性樹脂の溶剤へ
の溶解性の差を利用してパターンを形成する、いわゆる
フォトリソグラフィ技術を用いても空洞を形成すること
ができる。The cavity 15 may be formed by irradiating the green sheet with a laser. In addition, a so-called photolithography technique is used in which a photosensitive resin is used as a ceramic binder, a wiring pattern is masked, ultraviolet rays are irradiated, and a pattern is formed by utilizing the difference in solubility of the photosensitive resin in a solvent. Can be used to form a cavity.
また、繊維状シートに前記スラリを塗布すると、スラ
リ中のセラミックス粉末は、繊維の内部にほとんど侵入
せず、該シート表面が緻密でシート内部に気孔を多く含
むものが得られる。Further, when the slurry is applied to the fibrous sheet, the ceramic powder in the slurry hardly penetrates into the inside of the fiber, so that a sheet having a dense sheet surface and many pores inside the sheet is obtained.
信号層のまわりに、前記空洞や気孔を多く含んだ繊維
層を存在させることにより、信号層の単位長さ当りのキ
ャパシタンスを小さくすることができ、信号伝播速度を
高速化することができる。By providing a fiber layer containing many cavities and pores around the signal layer, the capacitance per unit length of the signal layer can be reduced, and the signal propagation speed can be increased.
なお、第6図に示す本実施例のセラミック多層回路板
は、導体層4およびビアホール3の周りにクラックや剥
離等は認められなかった。更に、焼成品にピン付けおよ
びLSIチップをCCB接合により装着した。ピン付部の周辺
にはクラック等に認められず、基板に反り、変形等も認
められなかった。In addition, in the ceramic multilayer circuit board of this example shown in FIG. 6, no crack, peeling or the like was observed around the conductor layer 4 and the via hole 3. Furthermore, pins were attached to the fired product, and an LSI chip was mounted by CCB bonding. No cracks or the like were observed around the pinned portion, and no warping or deformation of the substrate was observed.
本実施例のセラミック多層回路板の曲げ強さは10kgf/
mm2であり、信号伝播速度は1.9×108m/秒である。The bending strength of the ceramic multilayer circuit board of the present embodiment is 10 kgf /
mm 2 and the signal propagation speed is 1.9 × 10 8 m / sec.
〔実施例5〕 第4図に示すように、高強度層用グリーンシートとし
て酸化物に換算してSiO275重量%、B2O318重量%、MgO2
重量%、Li2O+K2Oを3重量%、Al2O32重量%からなる
組成の平均粒径5μmのガラス粉末50重量%と、平均粒
径1μmのAl2O3粉末50重量%とを配合し、実施1と同
様にスラリとした。Example 5 As shown in FIG. 4, as a green sheet for a high-strength layer, 75% by weight of SiO 2 , 18% by weight of B 2 O 3 , and MgO 2 were converted into oxides.
% By weight, 3% by weight of Li 2 O + K 2 O, 2 % by weight of Al 2 O 3, 50% by weight of glass powder having an average particle size of 5 μm, and 50% by weight of Al 2 O 3 powder having an average particle size of 1 μm. And a slurry was prepared in the same manner as in Example 1.
次に実施例4と同様にしてグリーンシートを作製し
た。該グリーンシートに100μmφ穴を穿け実施例3で
使用したPt−Agペーストを充填した。さらに、該導体ペ
ーストで導体層4を印刷形成した。Next, a green sheet was produced in the same manner as in Example 4. The Pt-Ag paste used in Example 3 was filled in the green sheet by making a 100 μm φ hole. Further, the conductor layer 4 was formed by printing with the conductor paste.
次に、低誘電率層用グリーンシートとして、前記のホ
ウケイ酸ガラス粉60重量%と内部に気孔を有する平均粒
径20μmのSiO2中空微小球28を40重量%配合し、実施例
1と同様にスラリを作製し、ドクターブレードを用いて
シリコーンコートしたポリエステルフィルム上に300μ
m厚さに塗布,乾燥し、厚さ100μmのグリーンシート
を5枚作製した。該グリーンシートに100μmφの穴を
穿け、前記Pt−Agペーストを充填して低誘電率層7を作
製した。Next, as the low dielectric constant layer green sheet, 40% by weight of the above-mentioned borosilicate glass powder 60% by weight and SiO 2 hollow microspheres 28 having an average particle diameter of 20 μm and having pores therein were mixed at 40% by weight. A slurry is prepared on a silicone-coated polyester film using a
It was applied to a thickness of m and dried to prepare five green sheets having a thickness of 100 μm. A hole having a diameter of 100 μm was made in the green sheet, and the Pt-Ag paste was filled therein, thereby producing a low dielectric constant layer 7.
次に、前記低誘電率層用グリーンシートの2枚を配線
幅100μmのX方向信号層用に、他の2枚を配線幅100μ
mのY方向信号層用とし、残り1枚には導体層4を前記
導体ペーストを用いて印刷した。Next, two sheets of the low dielectric constant layer green sheet were used for an X-direction signal layer having a wiring width of 100 μm, and the other two sheets were used for a wiring width of 100 μm.
m for the Y-direction signal layer, and the remaining one was printed with the conductor layer 4 using the conductor paste.
このSiO2中空微小球を含むグリーンシート21と、前記
の高強度層用のグリーンシートを1組とし、5組積層し
た。The green sheet 21 containing the SiO 2 hollow microspheres and the green sheet for the high-strength layer were set as one set, and five sets were laminated.
次に実施例1と同様に、該積層体のバインダ抜きを行
なった後、大気中950℃で1時間焼成して焼成品を得
た。Next, in the same manner as in Example 1, after the binder was removed from the laminate, it was fired in the air at 950 ° C. for 1 hour to obtain a fired product.
得られた多層回路板の信号層5のまわりに気孔を多く
含む低誘電率層7を形成したことにより、信号層5の単
位長さ当りのキャパシタンスを小さくすることができ、
信号伝播速度を高速化することができた。また、導体層
4およびビアホール3の周りにクラックや剥れ等は認め
られなかった。By forming the low dielectric constant layer 7 including many pores around the signal layer 5 of the obtained multilayer circuit board, the capacitance per unit length of the signal layer 5 can be reduced,
The signal propagation speed could be increased. No crack, peeling, or the like was observed around the conductor layer 4 and the via hole 3.
更にピン8けおよびLSIチッ1の装着を行なったが、
ピン付け部分の周辺にはクラック等は認められず、ま
た、基板に反り,変形なども認められなかった。In addition, the pin 8 and the LSI chip 1 were installed.
No cracks or the like were found around the pinned portion, and no warping or deformation of the substrate was found.
本実施例のセラミック多層回路板の曲げ強さは10kgf/
mm2であり、信号伝播速度は1.6×108である。The bending strength of the ceramic multilayer circuit board of the present embodiment is 10 kgf /
mm 2 and the signal propagation speed is 1.6 × 10 8 .
〔実施例6〕 平均粒径0.1μmのAl2O3粉末99重量%とMgO粉末1重
量%の混合比の原料粉末を用いて、実施例1と同様にス
ラリを作製した。次に、Al2O3長繊維18をクロス状に編
んだ厚さ400μmのシートの両面に、上記のスラリを厚
さ200μmずつ塗布し乾燥後、200μmの穴を穿け、該穴
にWペーストを充填し、水素と水蒸気を含む窒素中で16
00℃、1時間焼成して第8図に示すAl2O3板19を作製し
た。Example 6 A slurry was prepared in the same manner as in Example 1, except that a raw material powder having a mixing ratio of 99% by weight of Al 2 O 3 powder having an average particle diameter of 0.1 μm and 1% by weight of MgO powder was used. Next, the above-mentioned slurry was applied to both sides of a 400 μm thick sheet in which the Al 2 O 3 long fibers 18 were knitted in a cross shape at a thickness of 200 μm, and after drying, a hole of 200 μm was made. Fill and place in nitrogen with hydrogen and steam
Firing at 00 ° C. for one hour produced the Al 2 O 3 plate 19 shown in FIG.
このように繊維18を複合化したことにより、比較的大
面積の焼結体でも反りの発生を防止することができる。By combining the fibers 18 in this manner, the occurrence of warpage can be prevented even with a sintered body having a relatively large area.
次に前記Al2O3板19の両面を研磨した後、実施例3,実
施例4の繊維を含んだ積層体と、前記Al2O3板とを位置
合せして圧着し、実施例3同じ条件で焼成して、Al2O3
板19とガラスセラミックスが一体化されたセラミック多
層回路板を作製した。Next, after both surfaces of the Al 2 O 3 plate 19 were polished, the laminated body containing the fibers of Examples 3 and 4 and the Al 2 O 3 plate were aligned and pressure-bonded. Firing under the same conditions, Al 2 O 3
A ceramic multilayer circuit board in which the board 19 and the glass ceramic were integrated was manufactured.
W部分にNiおよびAuの無電解メッキをした後、電気信
号入出力のピン8をはんだ付けした。繊維を含んだ積層
体は、面方向の焼成収縮率が小さいため、Al2O3焼結体
と一体焼成を行うことができる。またピン付けは、強度
の高いAl2O3板に行うことができ、信頼性の高いピン付
けが可能となる。After electroless plating of Ni and Au on the W portion, pins 8 for inputting and outputting electric signals were soldered. Since the laminate containing fibers has a small firing shrinkage in the plane direction, it can be integrally fired with the Al 2 O 3 sintered body. In addition, pinning can be performed on an Al 2 O 3 plate having high strength, and pinning with high reliability can be performed.
〔実施例7〕 第9図に本発明の多層回路板を用いた半導体モジュー
ルの概要を示す。Embodiment 7 FIG. 9 shows an outline of a semiconductor module using the multilayer circuit board of the present invention.
前記実施例において作製したセラミック多層回路板と
LSIチップ1との接続に、ポリイミド29を絶縁材料としC
uを導体層5とした銅ポリイミド薄膜多層配線23を形成
し、この上にキャリア基板27を介してLSIチップ1を装
着した。キャリア基板27にはAlNキャップ22を装着し、
冷却フィンを介して冷却用ベローズ20を装着した。ま
た、電源回路板30にピン8を介して接続できるようにし
た。With the ceramic multilayer circuit board produced in the above embodiment
For connection to LSI chip 1, use polyimide 29 as insulating material and C
A copper-polyimide thin-film multilayer wiring 23 having u as the conductor layer 5 was formed, and the LSI chip 1 was mounted thereon via a carrier substrate 27. An AlN cap 22 is attached to the carrier substrate 27,
The cooling bellows 20 was mounted via cooling fins. In addition, it can be connected to the power supply circuit board 30 via the pins 8.
該半導体モジュールは優れた信号伝播速度と過酷なヒ
ートサイクルにも耐え得る高強度特性を有している。The semiconductor module has an excellent signal propagation speed and high strength characteristics that can withstand a severe heat cycle.
[発明の効果] 本発明によれば、低誘電率層と高強度層の界面に導体
層が形成されていることにより、低誘電率層と高強度層
は電気的に分離されており、低誘電率層に形成された信
号層は高強度層の影響が少なく高信号伝播速度のセラミ
ック多層回路板が得られる。[Effects of the Invention] According to the present invention, since the conductor layer is formed at the interface between the low dielectric constant layer and the high strength layer, the low dielectric constant layer and the high strength layer are electrically separated from each other. The signal layer formed on the dielectric layer is less affected by the high-strength layer, so that a ceramic multilayer circuit board having a high signal propagation speed can be obtained.
また、セラミック多層回路板に加わる外力を高強度層
が受けるので強度の高いセラミック多層回路板が得られ
る。Further, since the high-strength layer receives an external force applied to the ceramic multilayer circuit board, a ceramic multilayer circuit board having high strength can be obtained.
また積層数の多い多層回路板を歩留りよく作製するこ
とができる。Further, a multilayer circuit board having a large number of laminations can be manufactured with high yield.
第1図は本発明のセラミック多層回路板の断面模式図、
第2図は本発明のセラミック多層回路板の製造工程のフ
ロー図、第3図は高強度層に繊維を複合化したセラミッ
ク多層回路板の断面模式図、第4図は低誘電率層にSiO2
中空微小球を適用したセラミック多層回路板の断面模式
図、第5図はグリーンシートに高周波電流で空洞を形成
する方法の原理図、第6図は低誘電率層に空洞を形成し
たセラミック多層回路板の断面模式図、第7図は第6図
のセラミック多層回路板の製造工程のフロー図、第8図
は補強板付きセラミック多層回路板の断面模式図、第9
図は本発明のセラミック多層回路板を用いた半導体モジ
ュールの断面模式図である。 1……LSIチップ、2……はんだ、3……ビアホール、
4……導体層、5……信号層、6……高強度層、7……
低誘電率層、8……ピン、9……導体ペースト、10……
ポリエステルフィルム、11……スラリ、11′,21……低
誘電率層用グリーンシート、12……穴、13……高強度層
用グリーンシート、14,14′……電極、15……空洞、16
……セラミックペーパ、17……高周波電源、18……繊
維、19……補強板、20……冷却用ベローズ、22……AlN
キャップ、23……銅ポリイミド薄膜多層配線、24……銅
導体、25……プリント板、26……冷媒流路、27……キャ
リア基板、28……SiO2中空微小球、29……ポリイミド、
30……電源回路板。FIG. 1 is a schematic sectional view of a ceramic multilayer circuit board of the present invention,
FIG. 2 is a flow chart of the manufacturing process of the ceramic multilayer circuit board of the present invention, FIG. Two
FIG. 5 is a schematic view of a method of forming a cavity in a green sheet by a high-frequency current, and FIG. 6 is a ceramic multilayer circuit in which a cavity is formed in a low dielectric constant layer. FIG. 7 is a flow chart of a manufacturing process of the ceramic multilayer circuit board of FIG. 6, FIG. 8 is a schematic sectional view of a ceramic multilayer circuit board with a reinforcing plate, FIG.
The figure is a schematic sectional view of a semiconductor module using the ceramic multilayer circuit board of the present invention. 1 ... LSI chip, 2 ... solder, 3 ... via hole,
4 ... conductor layer, 5 ... signal layer, 6 ... high strength layer, 7 ...
Low dielectric constant layer, 8 Pin, 9 Conductor paste, 10
Polyester film, 11 Slurry, 11 ', 21 ... Green sheet for low dielectric constant layer, 12 ... Hole, 13 ... Green sheet for high strength layer, 14, 14' ... Electrode, 15 ... Cavity, 16
... ceramic paper, 17 ... high frequency power supply, 18 ... fiber, 19 ... reinforcing plate, 20 ... cooling bellows, 22 ... AlN
Cap, 23 ...... copper polyimide thin film multi-layer wiring, 24 ...... copper conductor, 25 ...... printed circuit board, 26 ...... coolant channel 27 ...... carrier substrate, 28 ...... SiO 2 hollow microspheres, 29 ...... polyimide,
30 ... Power supply circuit board.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 荻原 覚 茨城県日立市久慈町4026番地 株式会社 日立製作所日立研究所内 (56)参考文献 特開 昭60−132393(JP,A) 特開 昭60−136294(JP,A) 特開 昭61−22939(JP,A) 特開 平2−83255(JP,A) (58)調査した分野(Int.Cl.7,DB名) H05K 3/46 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Satoru Ogihara 4026 Kuji-cho, Hitachi City, Ibaraki Prefecture Within Hitachi Research Laboratory, Hitachi, Ltd. (56) References JP-A-60-132393 (JP, A) 136294 (JP, A) JP-A-61-22939 (JP, A) JP-A-2-83255 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H05K 3/46
Claims (7)
積層され、各絶縁層間には導体が形成されており、各層
の導体を電気的に接続するビアホールを有するセラミッ
ク多層回路板において、 前記絶縁層は高強度層と低誘電率層の2種類の絶縁層の
積層体からなり、高強度層は低誘電率層よりも高強度材
で構成され、該積層体の内層部分に低誘電率層に挟まれ
た高強度層を1層以上含み、 低誘電率層は信号層を有し、該低誘電率層と前記高強度
層の間に電源層またはグランド層が設けられていること
を特徴とするセラミック多層回路板。1. A ceramic multilayer circuit board having a plurality of insulating layers made of a ceramic insulating material, a conductor formed between each insulating layer, and a via hole for electrically connecting the conductor of each layer. Consists of a laminate of two types of insulating layers, a high-strength layer and a low-permittivity layer. The high-strength layer is composed of a higher-strength material than the low-permittivity layer. The low-permittivity layer includes a signal layer, and a power supply layer or a ground layer is provided between the low-permittivity layer and the high-strength layer. Ceramic multilayer circuit board.
積層され、各絶縁層間には導体が形成されており、各層
の導体を電気的に接続するビアホールを有するセラミッ
ク多層回路板において、 前記絶縁層は高強度層と低誘電率層の2種類の絶縁層の
複数積層体からなり、 前記積層体の高強度層は低誘電率層よりも高強度材で構
成され、該高強度層の少なくとも一層が内層部分に形成
され、その両面には電源層またはグランド層が設けられ
ており、かつ、該電源層またはグランド層を介して前記
低誘電率層が設けられており、該低誘電率層は信号層を
有することを特徴とするセラミック多層回路板。2. A ceramic multilayer circuit board having a plurality of insulating layers made of a ceramic insulating material, a conductor formed between the insulating layers, and a via hole electrically connecting the conductors of each layer. Comprises a plurality of laminates of two types of insulating layers, a high-strength layer and a low-permittivity layer, wherein the high-strength layer of the laminate is made of a higher-strength material than the low-permittivity layer; Is formed in an inner layer portion, a power supply layer or a ground layer is provided on both surfaces thereof, and the low dielectric constant layer is provided via the power supply layer or the ground layer, and the low dielectric constant layer is A ceramic multilayer circuit board having a signal layer.
積層され、各絶縁層間には導体が形成されており、各層
の導体を電気的に接続するビアホールを有するセラミッ
ク多層回路板において、 前記絶縁層は高強度層と2層以上の低誘電率層の2種類
の絶縁層から成る積層構成の2回以上のくり返しを含む
複数積層体からなり、 信号層は低誘電率層間に形成されており、該低誘電率層
の信号層を形成していない側に電源層またはグランド層
が設けられており、該電源層またはグランド層を挾んで
前記高強度層が設けられており、該高強度層は低誘電率
層よりも高強度材で構成されていることを特徴とするセ
ラミック多層回路板。3. A ceramic multilayer circuit board having a plurality of insulating layers made of a ceramic insulating material, a conductor formed between the insulating layers, and a via hole for electrically connecting the conductors of each layer. Consists of a multi-layered structure including two or more repetitions of a laminated structure composed of two types of insulating layers, a high-strength layer and two or more low-permittivity layers, and a signal layer is formed between the low-permittivity layers. A power layer or a ground layer is provided on a side of the low dielectric layer where the signal layer is not formed, and the high-strength layer is provided across the power layer or the ground layer. A ceramic multilayer circuit board comprising a material having a higher strength than a low dielectric constant layer.
つ、該低誘電率層の前記電源層またはグランド層に近い
側に該信号層に隣接して空洞部が設けられていることを
特徴とする請求項第1項〜第3項のいずれかに記載のセ
ラミック多層回路板。4. A cavity is provided along a signal layer provided in the low dielectric constant layer and on a side of the low dielectric constant layer close to the power supply layer or the ground layer and adjacent to the signal layer. The ceramic multilayer circuit board according to any one of claims 1 to 3, wherein:
セラミックのガラス成分が同じで、前者の無機フィラが
Al2O3、B4C、SiCの少なくとも1種、後者の無機フィラ
がα石英、SiO2、SiO2中空微小球の少なくとも1種を含
むことを特徴とする請求項第1項〜第3項のいずれかに
記載のセラミック多層回路板。5. The ceramic material constituting the high-strength layer and the low-dielectric-constant layer has the same glass component.
4. The method according to claim 1, wherein at least one of Al 2 O 3 , B 4 C, and SiC, and the latter inorganic filler contains at least one of α-quartz, SiO 2 , and SiO 2 hollow microspheres. Item 10. A ceramic multilayer circuit board according to any one of the above items.
以上であることを特徴とする請求項第1項〜第3項のい
ずれかに記載のセラミック多層回路板。6. The ceramic multilayer circuit board according to claim 1, wherein a signal propagation speed of said signal layer is 1.2 × 10 8 m / sec or more.
体素子を搭載し、前記キャリヤ基板により多層回路板と
半導体素子を電気的に接続した半導体モジュールにおい
て、 前記多層回路板が、セラミック絶縁材料からなる絶縁層
が複数積層され、各絶縁層間には導体が形成されてお
り、各層の導体を電気的に接続するビアホールを有し、 前記絶縁層は高強度層と低誘電率層の2種類の絶縁層の
積層体からなり、 高強度層は低誘電率層よりも高強度材で構成され、該積
層体の内層部分に、低誘電率層に挟まれた高誘電率層を
1層以上含み、 低誘電率層には信号層を有し、該低誘電率層と前記高強
度層の間に電源層またはグランド層が設けられているこ
とを特徴とする半導体モジュール。7. A semiconductor module in which a semiconductor element is mounted on a multilayer circuit board via a carrier substrate and the multilayer circuit board and the semiconductor element are electrically connected by the carrier substrate, wherein the multilayer circuit board is made of a ceramic insulating material. A plurality of insulating layers are laminated, conductors are formed between the insulating layers, and there are via holes for electrically connecting the conductors of the respective layers. The insulating layers are of two types: a high strength layer and a low dielectric constant layer. The high-strength layer is composed of a higher-strength material than the low-dielectric-constant layer, and at least one high-dielectric-constant layer sandwiched between the low-dielectric-constant layers is provided in the inner layer of the laminate. A semiconductor module comprising: a signal layer in the low dielectric constant layer; and a power supply layer or a ground layer provided between the low dielectric constant layer and the high strength layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2112513A JP3061282B2 (en) | 1990-04-27 | 1990-04-27 | Ceramic multilayer circuit board and semiconductor module |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2112513A JP3061282B2 (en) | 1990-04-27 | 1990-04-27 | Ceramic multilayer circuit board and semiconductor module |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0410591A JPH0410591A (en) | 1992-01-14 |
JP3061282B2 true JP3061282B2 (en) | 2000-07-10 |
Family
ID=14588533
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2112513A Expired - Fee Related JP3061282B2 (en) | 1990-04-27 | 1990-04-27 | Ceramic multilayer circuit board and semiconductor module |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3061282B2 (en) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06260768A (en) * | 1993-03-03 | 1994-09-16 | Sumitomo Metal Ind Ltd | Ceramic multilayer circuit board |
JP3591894B2 (en) * | 1994-11-24 | 2004-11-24 | キヤノン株式会社 | Multilayer printed circuit board |
JPH09172258A (en) * | 1995-12-19 | 1997-06-30 | Sumitomo Metal Ind Ltd | Glass-ceramic multilayer wiring board and manufacturing method thereof |
JPH1154696A (en) * | 1997-08-01 | 1999-02-26 | Mitsubishi Electric Corp | High frequency multilayered dielectric substrate and multichip module |
JP2001320167A (en) * | 2000-05-10 | 2001-11-16 | Ibiden Co Ltd | Method of manufacturing multilayer circuit board |
JP4416342B2 (en) * | 2001-02-28 | 2010-02-17 | 京セラ株式会社 | Circuit board and manufacturing method thereof |
JP4416346B2 (en) * | 2001-03-22 | 2010-02-17 | 京セラ株式会社 | Circuit board manufacturing method |
JP2002368420A (en) | 2001-06-05 | 2002-12-20 | Murata Mfg Co Ltd | Method for manufacturing glass ceramic multilayer substrate and glass ceramic multilayer substrate |
JP2008032445A (en) * | 2006-07-27 | 2008-02-14 | Sii Nanotechnology Inc | Piezoelectric actuator and scanning probe microscope using the same |
EP3367764A4 (en) * | 2015-10-19 | 2019-06-26 | Hitachi Metals, Ltd. | Multilayer ceramic substrate and method for manufacturing same |
DE102020105005A1 (en) * | 2020-02-26 | 2021-08-26 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | SUBSTRATE AND SEMICONDUCTOR LASER |
-
1990
- 1990-04-27 JP JP2112513A patent/JP3061282B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH0410591A (en) | 1992-01-14 |
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