JP3019453B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming a contact for electrically connecting an impurity diffusion layer formed on a semiconductor substrate to an upper wiring.

[0002]

2. Description of the Related Art As shown in FIG. 3A, a conventional method of forming a contact of this kind is to form an element isolation region 2 in a semiconductor substrate 1 and then implant an impurity diffusion layer 3 by ion implantation or thermal diffusion. Form. Further, an interlayer insulating film 4 such as an oxide film is formed on the surface of the semiconductor substrate by, for example, a CVD method. Subsequently, as shown in FIG.
A contact hole 5 is formed in the interlayer insulating film 4 by a selective etching technique using the method. Next, as shown in FIG. 3C, after the photoresist 12 is removed, a metal 13 is selectively grown in the contact hole 5, and further, FIG.
As shown in (d), a metal film is formed on the entire surface including the contact hole 5 by a sputtering method, and the metal film 10 is formed by patterning the metal film. Thus, the metal wiring 10 and the impurity diffusion layer 3 are electrically connected via the metal 13.

[0003] As a selective growth technique for the metal 13, for example, in the case of growing tungsten, tungsten is deposited at a temperature of 200 to 300 ° C. using WF ₆ + H ₂ gas under reduced pressure. Tungsten grows only on the surface of the semiconductor substrate (silicon) in the contact hole,
Thereafter, tungsten is deposited on the tungsten so as to fill the contact hole.

[0004]

According to this conventional manufacturing method, when the metal 13 is selectively grown (in this example, when tungsten is grown), the tungsten that first grows at the bottom of the contact hole 5 is formed on the semiconductor substrate 1. Silicon and a reaction gas (WF ₆ ) cause a reaction of 2WF ₆ + 3Si → W + 3SiF ₄ , and grow while etching the semiconductor substrate 1. In particular, gas quickly infiltrates the interface between the semiconductor substrate 1 and the insulating film 4, and the plan view and AA in FIGS.
As shown in the line cross-sectional view, undesirable lateral growth of tungsten 13a occurs.

The growth of tungsten 13a in the lateral direction at the interface between semiconductor substrate 1 and insulating film 4 usually takes 1000 to 30
Therefore, when this tungsten grows outside the impurity diffusion layer 3, the impurity diffusion layer 3 and the semiconductor substrate 1 are short-circuited. For this reason, the distance a between the contact hole 5 and the impurity diffusion layer 3 needs to be adjusted in advance in consideration of the overlay accuracy of photolithography and the lateral growth distance b of the tungsten 13a, which hinders miniaturization of the semiconductor device. There was a problem. SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device manufacturing method capable of miniaturizing a semiconductor device by suppressing lateral growth of a metal to be selectively grown and preventing a short circuit between an impurity diffusion layer and a semiconductor substrate. Is to do.

[0006]

According to a method of manufacturing a semiconductor device of the present invention, a contact hole for exposing the surface of an impurity diffusion layer is formed in an interlayer insulating film covering an impurity diffusion layer formed on a semiconductor substrate. Forming a thin insulating film on the surface of the exposed impurity diffusion layer in the contact hole, forming a material for selective growth of metal on the inner wall of the contact hole, and using the material Selectively growing a first metal on the inner wall of the contact hole; removing the thin insulating film at the bottom of the contact hole using the first metal as a mask;
Selectively growing the metal in the contact hole, and forming a metal wiring on the interlayer insulating film while being in contact with the second metal.

[0007]

Next, the present invention will be described with reference to the drawings. 1A to 1D are cross-sectional views showing an embodiment of the present invention in the order of steps. First, as shown in FIG. 1A, an oxide film 2 for element isolation is formed on a semiconductor substrate 1, and then an impurity of the opposite conductivity type to that of the semiconductor substrate 1 is introduced by an ion implantation method, and heat treatment is performed. To form an impurity diffusion layer 3. Next, an oxide film 4 is deposited as an interlayer insulating film on the semiconductor substrate 1 by, for example, a CVD method, and a contact hole 5 is opened in the oxide film 4 by a photolithography technique using a photoresist (not shown) and an etching technique. Further, the surface of the impurity diffusion layer 3 exposed at the inner bottom of the contact hole 5 is coated with, for example, a thermal oxidation method by 80-200.
A thin oxide film 6 having a thickness of about Å is formed, and a polycrystalline silicon film 7 is formed on the surface of the semiconductor substrate 1 by a CVD method.
Deposit 300Å

Next, as shown in FIG. 1B, the polycrystalline silicon film 7 is etched by anisotropic etching to leave the polycrystalline silicon film 7 only on the inner side wall of the contact hole 5. Here, since the etching condition of the polycrystalline silicon film 7 is set so as to hardly etch the oxide film 6, the oxide film 6 is formed at the bottom of the contact hole 5.
Remains. Next, a first metal, here, first tungsten 8, is selectively grown on the polycrystalline silicon film 7 on the inner side wall of the contact hole by 1500 to 3000 °. At this time, the tungsten 8 is grown, for example, under reduced pressure at a temperature of 200 to
This is performed at 300 ° C. using WF ₆ + H ₂ gas.

Subsequently, as shown in FIG. 1C, using the first tungsten 8 as a mask, the oxide film 6 at the bottom of the contact hole is removed by an etching technique, and the impurity diffusion layer 3 is removed.
Expose the surface. At this time, the first tungsten 8
The oxide film 6 below the polycrystalline silicon film 7, in other words, the oxide film 6 in the peripheral portion inside the contact hole 5 is left without being etched.

Then, as shown in FIG. 1D, a second metal, here a second tungsten 9, is selectively grown on the exposed surface of the impurity diffusion layer 3. This growth can be performed in the same manner as the first tungsten 8. This makes it possible to fill the contact hole 5 with the second tungsten 9. At this time, the lateral growth of tungsten 9 is suppressed by oxide film 6 remaining at the peripheral portion at the bottom of the contact hole, so that metal 9 a along the surface of impurity diffusion layer 3 outside contact hole 5 is formed. It is possible to suppress the spread of growth. Thereafter, the metal wiring 10 is formed, and the metal wiring 10 and the impurity diffusion layer 3 can be electrically connected via the first and second tungstens 8 and 9.

Therefore, in this manufacturing method, at the time of selective growth of the second tungsten 9, on the surface of the impurity diffusion layer 3, the oxide film 6 left on the inner peripheral portion of the contact hole 5 causes the metal 9 a to extend in the lateral direction. Since the growth is suppressed, it is possible to prevent the impurity diffusion layer 3 from being short-circuited to the semiconductor substrate 1 and to prevent the contact hole 5 and the impurity diffusion layer 3
It is no longer necessary to secure a large distance between the semiconductor device and the semiconductor device, and the semiconductor device can be miniaturized. Also, in this embodiment,
Even when a mask for etching the oxide film 6 is formed on the inner side wall of the contact hole 5, the effective area of the contact hole is reduced because the mask is made of the first tungsten 8 which is a conductive material. It will not be reduced,
There is no increase in contact resistance.

FIG. 2A is a cross-sectional view of another embodiment of the present invention. Here, after opening a contact hole, an impurity of the same conductivity type as that of the impurity diffusion layer 3 is introduced by, for example, an ion implantation method. The second impurity diffusion layer 11 is formed by annealing. Then, the first method is performed in the same manner as in the above embodiment.
And the second tungsten is formed in the contact hole. By forming the second impurity diffusion layer 11 in this manner, even if the overlap margin between the impurity diffusion layer 3 and the contact hole 5 is small as shown in FIG. Can be kept in the second impurity diffusion layer 11, so that short circuit between the impurity diffusion layer 3 and the semiconductor substrate 1 can be prevented.

The above embodiment is an example of the present invention. For example, metal may be used as the polycrystalline silicon formed on the inner wall of the contact hole, and a metal other than tungsten may be used as the metal selectively grown in the contact hole. Can be used.

[0014]

As described above, according to the present invention, a thin insulating film is formed on the inner bottom of a contact hole, and a material for selective growth of metal is formed on the inner wall of the contact hole. Since the metal is selectively grown on the inner wall of the contact hole, the thin insulating film is removed using the first metal as a mask, and the second metal is selectively grown on the inner wall of the contact hole. In addition, the lateral spread of tungsten from the opening of the contact hole to the outside can be suppressed. Thus, the overlapping margin between the contact hole and the impurity diffusion layer can be reduced or eliminated, and the semiconductor device can be miniaturized.

[Brief description of the drawings]

FIGS. 1A to 1D are cross-sectional views showing an embodiment of the present invention in the order of steps.

FIG. 2A is a cross-sectional view showing a part of a process in another embodiment of the present invention, and FIG. 2B is a cross-sectional view for explaining the effect.

3A to 3D are cross-sectional views showing a conventional manufacturing method in the order of steps.

FIG. 4A is a plan view showing a conventional problem, and FIG. 4B is a sectional view taken along the line AA.

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 3 impurity diffusion layer 4 oxide film (interlayer insulating film) 5 contact hole 6 thin oxide film 7 polycrystalline silicon film 8 first tungsten (first metal) 9 second tungsten (second metal)

Claims (1)

(57) [Claims] A step of forming a contact hole for exposing the surface of the impurity diffusion layer in an interlayer insulating film covering the impurity diffusion layer formed on the semiconductor substrate; and the step of forming the contact hole in the contact hole. Forming a thin insulating film on the surface of the contact hole, forming a material for selective growth of metal on the inner wall of the contact hole, and selectively growing a first metal on the inner wall of the contact hole using this material Removing the thin insulating film at the bottom of the contact hole using the first metal as a mask;
A semiconductor device comprising: a step of selectively growing a second metal in a contact hole; and a step of forming a metal wiring on the interlayer insulating film while being in contact with the second metal. Manufacturing method.