JP3015763B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming an insulating film having good flatness.
Technology.

[0002]

2. Description of the Related Art In recent years, in order to further increase the degree of integration of semiconductor integrated circuits, it has been required to advance wiring miniaturization and multilayering. In order to multi-layer the wiring, an interlayer insulating film is provided between each wiring, but if the surface of the interlayer insulating film is not flat, a step is generated in the wiring formed on the upper part of the interlayer insulating film and a failure such as disconnection may occur. Is caused.

Therefore, the surface of the interlayer insulating film (that is, the surface of the device) must be as flat as possible. As described above, a technique for planarizing the surface of a device is called a planarization technique, and has become more and more important with miniaturization and multilayering of wiring. For example, JP-A-5-22
JP-A-6334 (H01L21 / 3205) discloses the following two techniques as a planarization technique.

1) Flattening using SOG (Spin On Glass) film In the flattening technology, there is an SOG film as an interlayer insulating film most frequently used. In particular, in the flattening technology using the fluidity of the interlayer insulating film material. Active studies are being made. SO
G is a general term for a solution in which a silicon compound is dissolved in an organic solvent, and a film mainly composed of silicon dioxide formed from the solution.

To form an SOG film, first, a solution in which a silicon compound is dissolved in an organic solvent is dropped on a substrate, and the substrate is rotated. Then, the film of the solution is formed thicker in the concave portion and thinner in the convex portion, so as to relieve the step on the substrate formed by the wiring.
As a result, the surface of the coating of the solution is planarized. Next, when heat treatment is performed, the organic solvent evaporates and the polymerization reaction proceeds, so that an SOG film having a flat surface is formed.

[0006] As shown in the general formula (1), the SOG film includes an inorganic SO containing no organic component in the silicon compound.
There are a G film and an organic SOG film containing an organic component in a silicon compound as represented by the general formula (2). [SiO ₂ ] _n ··· (1) [R _X SiO _Y ] _n ··· (2) (n, X, Y: integer, R: alkyl group or aryl group) The inorganic SOG film has high hygroscopicity On top, CVD (Chemical
It is more fragile than a silicon oxide film formed by a vapor deposition method, and has a disadvantage that cracks are likely to occur during heat treatment when the thickness is 0.5 μm or more.

On the other hand, the organic SOG film has high hygroscopicity,
The generation of cracks in the heat treatment is suppressed, and the film thickness is reduced to 0.
It can be about 5 to 1 μm. Therefore, the organic SO
When the G film is used, an interlayer insulating film having a large thickness can be obtained, and sufficient flattening can be performed even on a large step on the substrate. 2) Chemical mechanical polishing method
Flattening using shing (hereinafter, referred to as CMP method) CMP method is a method of processing by adding a chemical action to mechanical polishing, and a silicon oxide film or the like is formed on a substrate by a plasma CVD method or the like. Thickly deposited insulating film of
Polishing is performed to a predetermined film thickness by the MP method. This CMP is
This is performed while flowing an abrasive mainly composed of colloidal silica or the like.

[0008]

In the case of the flattening method using SOG, better flatness can be obtained as compared with a method in which an insulating film is simply deposited by the CVD method.
It is feared that it is difficult to cope with a demand for further improvement in the flatness of the interlayer insulating film as the degree of integration increases.

On the other hand, in the case of planarization using the CMP method, S
A better flat surface can be obtained as compared with the flattening method using OG. However, as in the conventional example, an insulating film (for example, a silicon oxide film) formed by a CVD method as an interlayer insulating film.
When only the insulating film is used, it is difficult to embed the insulating film without any gap between the fine wirings, and there is a problem that voids are generated. Even if the insulating film is buried, the insulating film formed by CVD has a high relative dielectric constant, and The inter-capacity increases, for example,
There is a problem that the operation speed of the LSI is reduced due to the RC delay.

[0010] Therefore, by a flattening method using SOG,
It is conceivable that after obtaining a good flat surface to some extent, this is polished by the CMP method to further flatten the surface. However, when the SOG film is polished by the CMP method, the following problems occur. (1) The polishing rate is low, the throughput is low, and the manufacturing cost is high.

(2) Defects such as scratches (scratches generated during polishing) are likely to occur on the surface of the SOG film. The present invention
To solve such a problem in a method for manufacturing a semiconductor device.
That is its purpose.

[0012]

Means for Solving the Problems] The method according to claim 1, including in the film by the impurity is introduced
And modified to reduce water and hydroxyl groups
Polishing rate increases in mechanical and mechanical polishing processes
The surface of the first insulating film made of the organic SOG film after the polishing is flattened by polishing. Claim 2
The method of manufacturing a semiconductor device according to the above includes a step of forming a first insulating film made of an SOG film on a substrate; a step of forming a second insulating film on the first insulating film; Before or after forming the second insulating film, at least a surface of the first insulating film is formed.
Chemical and mechanical research by introducing impurities into the surface layer
The method includes a step of increasing a polishing rate in a polishing process, and a step of polishing and flattening the first and second insulating films.

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a first insulating film made of an SOG film on a substrate; and forming a second insulating film on the first insulating film. a step of, before or after forming the second insulating film, an impurity is introduced into at least the surface layer of the first insulating film
This reduces the amount of water and hydroxyl groups contained in the film.
Polishing in chemical and mechanical polishing process
A step of increasing the rate and a step of planarizing the second insulating film by polishing the second insulating film.

According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor device, the second insulating film is formed of a silicon oxide film formed by a plasma CVD method. A method of manufacturing a semiconductor device according to claim 5, the organic SOG film on a substrate
Forming a first insulating film made of, depending on the introduction of impurities into at least the surface layer of the first insulating film
To reduce moisture and hydroxyl groups in the film
Together with the polishing rate in chemical and mechanical polishing
And a step of planarizing the first insulating film by polishing the first insulating film.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a first insulating film made of an organic SOG film on a substrate; and introducing an impurity into a surface layer of the first insulating film.
Reduces the amount of water and hydroxyl groups contained in the film.
And in chemical and mechanical polishing processes
The method includes a step of increasing a polishing rate and a step of planarizing the first insulating film by polishing the first insulating film. Further, in the method of manufacturing a semiconductor device according to claim 7, a photoresist film is formed on a device surface before introducing an impurity into the first insulating film, and the impurity is introduced through the photoresist film. It is.

In the method of manufacturing a semiconductor device according to the present invention, a step of forming a third insulating film on the device surface after polishing is performed. In a method of manufacturing a semiconductor device according to a ninth aspect, a fourth insulating film is formed on a device surface before forming the first insulating film. According to a tenth aspect of the present invention, in the method of manufacturing a semiconductor device, an organic SOG is used as the first insulating film.

Further, in the method of manufacturing a semiconductor device according to the present invention, the first insulating film after the impurity is introduced may be a film.
A material whose pure water contact angle is 30 degrees or less
is there.

A method of manufacturing a semiconductor device according to claim 12
Are those using inorganic SOG as the first insulating film
It is. The method of manufacturing a semiconductor device according to claim 13 is:
The polishing is performed using a chemical / mechanical polishing method.

According to a fourteenth aspect of the present invention, in the method of manufacturing a semiconductor device, the step of introducing the impurity imparts kinetic energy to the impurity and introduces the impurity into the first insulating film, as in an ion implantation method. is there. Further, in the method for manufacturing a semiconductor device according to claim 15 , the impurity is argon, boron,
At least one selected from the group consisting of nitrogen and phosphorus
It contains two elements.

That is , when impurities such as ions are introduced into the first insulating film, the polishing rate by CMP or the like becomes CV.
The polishing workability is improved due to the silicon oxide film formed by the method D, and defects such as scratches hardly occur.

In particular, according to the fifth aspect of the present invention, since the impurity is introduced through the photoresist film having a very flat surface, the impurity introduction depth is substantially uniform. Further, according to the invention of claim 6, a portion in which impurities are not introduced and the polishing rate remains low serves as a polishing stopper, and it is easy to detect the end of polishing. Claim 7 or 8
According to the invention, the mechanical strength of the interlayer insulating film is increased.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) A first embodiment of the present invention will be described with reference to the drawings. FIGS. 1 and 2 are cross-sectional views showing the manufacturing process of the semiconductor device according to the first embodiment.

Step 1 (see FIG. 1A): A silicon oxide film 2 (thickness: 300 to 800 nm) is formed on the surface of a silicon substrate 1.
To form The Si oxide film 2 covers elements such as a gate electrode on the Si substrate 1. In addition, any method (an oxidation method, a CVD method, a PVD method, or the like) may be used for the formation. A metal film is formed on the Si oxide film 2 using a magnetron sputtering method, and the metal film is patterned to form a metal wiring 3. This metal wiring 3
For example, TiN (film thickness 20 nm) / Ti (film thickness 30 n
m) / AlSiCu alloy (thickness 550 nm) / TiN
It has a laminated structure of (film thickness 100 nm) / Ti (film thickness 50 nm).

Step 2 (see FIG. 1b): TEOS (Tetra-e
thoxy Silane: Plasma T is deposited on metal wiring 3 by plasma CVD using Si (OC ₂ H ₅ ) ₄ ) and oxygen.
An EOS oxide film 4 (200 nm thick) is formed. The film thickness of the plasma TEOS oxide film 4 is adjusted to be thicker if the step is large, and to be thin if the step is small, according to the base step.

Step 3 (see FIG. 1c): Plasma TEOS
An organic SOG film 5 is formed on the oxide film 4. Organic SOG
The composition of the film 5 is [CH ₃ Si (OH) ₃ ], and the total film thickness when there is no pattern is 400 nm. First, an alcohol-based solution (for example, IPA + acetone) of a silicon compound having the above composition is dropped on the substrate 1 and the substrate is rotated at a rotation speed of 2300 rpm for 20 seconds. On top of. At this time, the film of the alcohol-based solution is formed so as to be thicker in the concave portion and thinner in the convex portion than the step on the substrate 1 so as to reduce the step. As a result, the surface of the film of the alcohol-based solution is flattened.

Next, in a nitrogen atmosphere, 100 ° C. for 1 minute, 200 ° C. for 1 minute, 300 ° C. for 1 minute, 22 ° C.
For 1 minute and then at 300 ° C for 30 minutes.
As the alcohol evaporates, the polymerization reaction proceeds, and a 200 nm-thick organic SOG film having a flat surface is formed. By repeating this film formation-heat treatment operation once more, an organic SOG film 5 having a thickness of 400 nm is obtained. The organic SOG film 5 is a silicon oxide containing 1% or more of carbon atoms.

Step 4 (see FIG. 1D): The organic SOG film 5 is doped with argon ions (Ar ⁺ ) 6 by using an ion implantation method. The ion implantation conditions here are, for example, acceleration energy: 140 KeV, dose: 1 × 1
Use 0 ¹⁵ atms / cm ² . Thus, ions are introduced to a depth of about 3000 ° of the surface layer of the organic SOG film 5.

As described above, by implanting ions into the organic SOG film 5, the organic components in the film are decomposed and the moisture and hydroxyl groups contained in the film are reduced. as a result,
The organic SOG film 5 is changed to an SOG film (hereinafter referred to as a modified SOG film) 7 containing no organic components and containing only a small amount of water and hydroxyl groups. FIG. 8 shows that the organic SOG film 5 (untreated: unimplanted) and the modified SOG film 7 (ion implantation: Ar ⁺ -implanted) are each subjected to a heat treatment for 30 minutes in a nitrogen atmosphere, and are subjected to a TDS method (Thermal Desorption Spectr).
oscopy).

The ion implantation conditions are as follows: acceleration energy:
140 KeV, dose amount: 1 × 10 ¹⁵atms / cm^TwoIt is.
This figure shows H_TwoTable showing the desorption amount for O (m / e = 18)
As is clear from the figure, the modified SOG film
7 is H_TwoLow desorption of O (m / e = 18)
I understand. This means that ion implantation is performed on the organic SOG5.
Thus, by forming the modified SOG film 7, the organic SOG film
5 indicates that the water and hydroxyl groups contained in 5 decrease.
You.

FIG. 9 shows an organic SOG film 5 and a modified SOG film 7.
Organic SOG film 5 (no treatmen)
t), the organic SOG film 5 exposed to oxygen plasma (O ₂ Pl
Asma) and the modified SOG film 7 (Ar ⁺ ) are left in the air in a clean room, and the results of evaluating the moisture in the film are shown. The amount of water in the film was determined by the FT-IR method (Fourier Transform
Using Infrared Spectroscopy), the area intensity of the absorption (around 3500 cm ⁻¹ ) of the O—H group in the infrared absorption spectrum was used as an index. The ion implantation conditions are acceleration energy:
140 KeV, dose amount: 1 × 10 ¹⁵ atms / cm ² .

When exposed to oxygen plasma, it can be seen that not only the moisture before and after the treatment increased, but also the moisture increased one day later. On the other hand, not only does the modified SOG film 7 not increase after ion implantation, but the increase in moisture is smaller than that of the organic SOG film 5 even when left in the air in a clean room. That is, it is understood that the modified SOG film 7 has lower hygroscopicity than the organic SOG film 5.

FIG. 10 shows a pressure cooker test (PCT) (humidification test) for examining the moisture permeability of the modified SOG film 7 and the organic SOG film 5. 2 was performed in a saturated water vapor atmosphere at 2 atm). Using the FT-IR method, the absorption peak of O—H in the organic SOG film 5 (3
The area intensity (around 500 cm ^-1 ) was determined, and the relationship with the PCT time was plotted.

A sample (Ar ⁺ 20 KeV) whose surface was modified only by ion implantation was prepared, and the entire film was modified (Ar ⁺ 140 KeV) or unmodified (organic SOG film 5: Untreatment), the following was found. (1) When the unmodified organic SOG film 5 is subjected to PCT, the absorption intensity around 3500 cm ^-1 (related to the OH group) shows a dramatic increase.

(2) In the modified SOG film 7, 3500 cm ^-1
The increase in absorption intensity around (with respect to the OH group) is small.
A sample in which only the film surface was modified is comparable to a sample in which the entire film has been modified. From the above results, it can be seen that a layer that suppresses moisture permeability can be formed by implanting ions.

Step 5 (see FIG. 2A): Plasma TEOS
A plasma TEOS oxide film 8 (film thickness of 1 to 2 μm) is formed on the modified SOG film 7 in the same manner as the oxide film 4. Step 6 (see FIG. 2B): The surface of the device formed in the above steps is polished by using the CMP method. Here, a polishing solution in which a polishing agent such as silica is suspended in an aqueous potassium hydroxide solution or an aqueous ammonia solution is used.

FIG. 11 shows the modified SOG film 7 and the organic SOG film 5
3 shows a polishing rate when the plasma TEOS oxide film 8 (P-TEOS) is polished by the CMP method. As is apparent from the figure, the polishing rates of the modified SOG film 7 and the plasma TEOS oxide film 8 are almost the same, and the polishing rate of the organic SOG film 5 is a fraction of these.

Therefore, the plasma TEO is formed by the CMP method.
Even if the S oxide film 8 is polished and the modified SOG film 7 is exposed, both the plasma TEOS oxide film 8 and the modified SOG film 7 are polished on average because the polishing rates are equal. Therefore, the polished surface is very flat and smooth. In addition, defects such as scratches when polishing an SOG film that has not been ion-implanted are less likely to occur.

Polishing by the CMP method, as shown in FIG.
The process may be performed until the plasma TEOS oxide film 4 is exposed, or may be terminated before the plasma TEOS oxide film 4 is exposed. Step 7 (see FIG. 2c): Although the remaining modified SOG film 7 is very low in both water content and hygroscopicity, it prevents any adverse effect from moisture contained in the atmosphere, and at the same time, mechanical strength as an interlayer insulating film In order to further increase the
In the same manner as the OS oxide film 4, the plasma TEOS oxide film 9 (thickness: 200) is formed on the film planarized by the CMP method.
nm).

The plasma TEOS oxide film 9 has good flatness because the underlying surface is flat. On the plasma TEOS oxide film 9, an upper layer wiring (not shown) connected to the metal wiring 3 via a contact hole (via hole) is formed. At this time, plasma TEO
Since the interlayer insulating film 10 including the S oxide film 4, the organic SOG film 5, the modified SOG film 7, the plasma TEOS oxide film 8, and the plasma TEOS oxide film 9 has very good flatness,
The work for forming the upper layer wiring becomes very easy,
The probability of disconnection of the upper layer wiring is very low. (Second Embodiment) A second embodiment of the present invention will be described with reference to the drawings. The second embodiment differs from the first embodiment only in the step corresponding to step 6 (see FIG. 2B), and the other steps 1 to 5 and step 7 are the same. Therefore, only the different steps will be described here, and the description of the other steps will be omitted.

Step 8 (see FIG. 3): The surface of the device formed in Steps 1 to 5 is polished by the CMP method.
At this time, the polishing is completed before the modified SOG film 7 is exposed, so that the plasma TEOS oxide film 8 remains on the entire surface of the device. By doing so, the next step 7 (the step of depositing the plasma TEOS oxide film 9) can be omitted as appropriate.

In the second embodiment, the modified SOG film 7 is not exposed during polishing by the CMP method, but the CMP method uses a large amount of water, and the SOG film is exposed due to a polishing error. It is necessary to modify the organic SOG film 5 into the modified SOG film 7 because of the possibility that the SOG film may be exposed on the side surface of the via hole and may cause a contact failure. (Third Embodiment) A third embodiment of the present invention will be described with reference to the drawings. However, the same reference numerals are used for the same components as in the first embodiment, and detailed description thereof is omitted.

FIGS. 4 and 5 are cross-sectional views showing the manufacturing process of the semiconductor device according to the third embodiment. Step (1) (see FIG. 4A): A silicon oxide film 2 is formed on the surface of a silicon substrate 1, and a metal wiring 3 is formed on the Si oxide film 2. Step (2) (see FIG. 4B): Plasma T
An EOS oxide film 4 is formed.

Step (3) (see FIG. 4c): Plasma TEO
An organic SOG film 5 is formed on the S oxide film 4. Here, it is formed thicker than in the first embodiment. That is, organic SO
After applying 300 nm of G, the same heat treatment as in the above step 3 is performed, and this operation is repeated 4 to 5 times so that the total film thickness in the case where there is no pattern is 1.2 μm.

Step (4) (see FIG. 4D): Organic SOG film 5
In response to this, argon ions (Ar
⁺ ) Modified SOG by improving film quality by injecting 6
A film 7 is formed. Step (5) (see FIG. 5A): The surface of the modified SOG film 7 is
Polishing using the MP method.

At this time, the modified SOG film 7 is
Polishing is performed at a rate substantially equal to that of the OS oxide film. And
Since the hygroscopicity is very low, even if a large amount of polishing liquid is used during CMP, it is not adversely affected. Step (6) (see FIG. 5b): The remaining modified SOG film 7 is
Although the water content and the hygroscopicity are very low, the plasma T is used to prevent any adverse effect from the moisture contained in the atmosphere and to further increase the mechanical strength as an interlayer insulating film.
In the same manner as the EOS oxide film 4, a plasma TEOS oxide film 9 is formed on the film planarized by the CMP method.

On this plasma TEOS oxide film 9,
Although not shown, an upper layer wiring connected to the metal wiring 3 via a contact hole (via hole) is formed. The flatness of the interlayer insulating film 10 composed of the plasma TEOS oxide film 4, the organic SOG film 5, the modified SOG film 7, the plasma TEOS oxide film 8, and the plasma TEOS oxide film 9 is very good. Is very easy, and the probability of disconnection of the upper layer wiring is very low. (Fourth Embodiment) A fourth embodiment of the present invention will be described with reference to FIGS. The fourth embodiment is the first
The difference from the embodiment is that Step 4 (see FIG. 1D) to Step 7
Only the steps corresponding to (see FIG. 2c) are the same, and the steps corresponding to the preceding steps 1 to 3 are the same.

Therefore, here, only the different steps will be described, and the description of the other steps will be omitted. Step 9 (see FIG. 6A): A photoresist film 11 is formed on the organic SOG film 5 by coating. Photoresist film 11
Like the organic SOG film 5, is formed so as to be thicker in the concave portion and thinner in the convex portion, and is formed so as to relieve the step, so that the surface is very flat. Becomes

Step 10 (see FIG. 6B): Organic SOG film 5
In response to this, argon ions (Ar
⁺ ) Inject 6. Here, ion implantation is performed under such a condition that only the surface layer of the organic SOG film 5 (the portion above the uppermost surface of the plasma TEOS oxide film 4 in the fourth embodiment) is modified through the photoresist film 11. A modified SOG film 7 is formed in the portion.

Since the surface of the photoresist film 11 is extremely flat, when ions are implanted through the photoresist film 11, the depth of arrival of the ions becomes substantially uniform, and the region where the organic SOG film 5 is modified is formed. Is flattened. Step 11 (see FIG. 6C): After the photoresist film 11 is removed by ashing, the modified SOG film 7 (organic SOG film 5)
A plasma TEOS oxide film 8 is formed thereon.

Step 12 (see FIG. 7A): The surface of the device formed in the above steps is polished by CMP until the plasma TEOS oxide film 4 is exposed. At this time, as described above, since the lower surface of the modified SOG film 7 is extremely flat, the unmodified organic SOG film 5 having a low polishing rate is exposed at the same time as the plasma TEOS oxide film 4 is exposed. Thus, the end point of polishing can be easily detected.

Step 13 (see FIG. 7B): A plasma TEOS oxide film 9 is formed on the polished device surface. On the plasma TEOS oxide film 9, an upper layer wiring (not shown) connected to the metal wiring 3 via a contact hole (via hole) is formed. In each of the above embodiments, the modified SOG film 7 and the plasma TEOS oxide film 8 are used.
The polishing rate is adjusted so as to be substantially equal to the polishing rate. However, an intended object of the present invention is to make it easy to polish the organic SOG film 5.

Therefore, the present inventor has conducted experiments on organic S
The relationship between the wettability of the OG film and the polishing rate by CMP was confirmed. As the one corresponding to the wettability of the organic SOG film,
Pure water dropped on the organic SOG film (specific resistance 18M at 25 ° C)
Ω · cm) was measured. As shown in FIG. 12, the contact angle refers to an angle θ between pure water dropped on an organic SOG film and a base film (SOG film).

FIG. 13 shows the polishing rates of five kinds of organic SOG films (indicated by ● in the figure) having different contact angles and the respective organic SOG films.
It is a plot of the contact angle and the polishing rate (indicated by a circle in the figure) of each film when ions are implanted into the OG film under the same conditions. It can be seen that the polishing rate increases as the contact angle decreases with a contact angle of 30 degrees. this is,
The organic SOG film has poor wettability due to its high content of methyl groups, but methyl groups are decomposed by ion implantation,
It is considered that the wettability is improved. That is, organic S
By implanting ions into the OG film and setting the contact angle to 30 degrees or less, a high polishing rate can be obtained.

The wettability (contact angle) of the organic SOG film (modified SOG film) can be adjusted by changing the dose. By the way, if the contact angle is adjusted to be 25 degrees,
A polishing rate similar to that of a plasma TEOS oxide film (PE-TEOS) or a thermal oxide film (th-SiO ₂ ) can be obtained. (Fifth Embodiment) In the first to fourth embodiments, the organic SOG
By implanting ions into the film 5, the organic SOG film 5 (modified S
Although the polishing rate of the OG film 7) is increased, in the present embodiment, the wettability of the polishing liquid itself used in the CMP to the organic SOG film 5 is improved (the polishing is performed with a small contact angle when dropped onto the organic SOG film 5). Using a liquid)
The polishing rate of the OG film 5 is increased.

For example, a surfactant (for example, formic acid, acetic acid, propionic acid, butyric acid) is added to the polishing liquid (a polishing agent such as silica suspended in an aqueous potassium hydroxide solution or an aqueous ammonia solution) used in the above embodiment. (For example, a fatty acid compound such as 0.1 to 0.5 mol / l), a polishing liquid having good wettability can be obtained. (Sixth Embodiment) In the fifth embodiment, the modified SO
As described above, the G film 7 has an advantage that, besides increasing the polishing rate, it also has the advantage that the moisture in the film is removed and the film is less likely to absorb moisture. , The ion implantation may be performed on the organic SOG film 5 after the CMP.

Hereinafter, a sixth embodiment of the present invention will be described with reference to the drawings. However, the same reference numerals are used for the same components as in the first embodiment, and detailed description thereof is omitted. 14 and 15 are cross-sectional views showing the manufacturing process of the semiconductor device according to the sixth embodiment, and the description will be made with reference to this drawing.

Step (A) (see FIG. 14A): A silicon oxide film 2 is formed on the surface of a silicon substrate 1, and
The metal wiring 3 is formed. Step (b) (see FIG. 14B): A plasma TEOS oxide film 4 is formed on the metal wiring 3. Step (c) (see FIG. 14C): An organic SOG film 5 is formed on the plasma TEOS oxide film 4.

Step (d) (see FIG. 14d): Plasma T
A plasma TEOS oxide film 8 (1 to 2 μm in thickness) is formed on the organic SOG film 5 in the same manner as the EOS oxide film 4. Step (e) (see FIG. 15A): The surface of the device formed in the above steps is polished by using the CMP method. Here, the same polishing liquid containing a surfactant as that described in the fifth embodiment is used. The polishing by the CMP method is completed before the plasma TEOS oxide film 4 is exposed, as shown in FIG.

Step (f) (see FIG. 15b): ion implantation
Argon ion (Ar ⁺) Is an organic SOG film
Dope 5 The ion implantation here is at least
Ion is implanted into the exposed part during the hole processing
By modifying the SOG film 5 as the modified SOG film 7,
Not modified on the side of via hole to be formed later
When the SOG film is exposed, the gas emitted from the SOG film
Contact when forming an electrode in a via hole due to
Trouble can be effectively prevented.
You.

Step (g) (see FIG. 15c): In order to prevent even a slight adverse effect from moisture contained in the atmosphere and further increase the mechanical strength as an interlayer insulating film, the same as the plasma TEOS oxide film 4 is used. The plasma TEOS oxide film 9 is formed on the film planarized by the CMP method.
(Thickness: 200 nm). The present invention is not limited to the above embodiment, and the same effects can be obtained even if the present invention is implemented as follows.

1) Instead of the organic SOG film 5, a polyimide or a siloxane-knitted polyimide is used. 2) An inorganic SOG film is used instead of the organic SOG film 5, and ions are implanted into the inorganic SOG film. In this case, moisture and hydroxyl groups contained in the inorganic SOG film can be reduced.

3) Each plasma TEOS oxide film 4, 8, 9
Instead of the silicon oxide film, a method other than the plasma CVD method (normal pressure CVD method, low pressure CVD method, ECR plasma CVD method, photo-excited CVD method, TEOS-CVD method, PV
D method) is used. In this case, the gas used in the normal pressure CVD method is monosilane and oxygen (SiH ₄ + O ₂ ), and the film formation temperature is 400
It is below ° C. The gas used in the low pressure CVD method is monosilane and nitrous oxide (SiH ₄ + N ₂ O), and the film formation temperature is 900 ° C. or less.

4) Each plasma TEOS oxide film 4, 8, 9
Is replaced by another insulating film (such as a silicon nitride film or a silicate glass film) having a property of high mechanical strength in addition to a property of blocking moisture and a hydroxyl group. This insulating film may be formed by any method such as a CVD method and a PVD method. 5) In the above embodiment, argon ions were used as ions to be implanted into the organic SOG film 8, but as a result, organic S
Any ion may be used as long as it modifies the OG film 8.

Specifically, ions having a relatively small mass such as argon, boron, nitrogen, and phosphorus are suitable, but the following ions can also be expected to have a sufficient effect. : Inert gas ions other than argon (helium ions,
Neon ion, krypton ion, xenon ion, radon ion). Since the inert gas does not react with the organic SOG film 8, there is no possibility that an adverse effect is caused by the ion implantation.

: IIIb, IVb, Vb, VI other than boron and nitrogen
b, VIIb Elemental simple ions of each group and their compound ions. In particular, oxygen, aluminum, sulfur, chlorine, gallium,
Elemental elemental ions of germanium, arsenic, selenium, bromine, antimony, iodine, indium, tin, tellurium, lead, bismuth and their compound ions. Among these, with respect to metal element ions, the dielectric constant of the organic SOG film 8 after ion implantation can be kept low.

Elemental ions of group IVa and Va and their compound ions. In particular, titanium, vanadium, niobium,
Elemental ions of hafnium and tantalum and their compound ions. Since the oxides of the IVa and Va group elements have a high dielectric constant, the dielectric constant of the organic SOG film 8 after ion implantation is also high. However, it is practically used except when an interlayer insulating film having a particularly low dielectric constant is required. No problem.

A plurality of types of ions are used in combination. In this case, a more excellent effect can be obtained by the synergistic action of each ion. 6) The modified SOG film 7 is subjected to a heat treatment. In this case, the modified S
Since the number of dangling bonds in the OG film 7 is reduced, the hygroscopicity is further reduced, and the permeation of moisture is further reduced.

7) In each of the above embodiments, the organic SOG film 5
Are implanted, but not limited to ions, but may be electrons, atoms, molecules, or particles (in the present invention, these are collectively referred to as impurities). 8) The modified SOG film 7 has much better moisture absorption, water resistance and mechanical strength than the organic SOG film 5. Therefore, in each embodiment, the plasma TEOS oxide film 9 may be omitted as appropriate.

[0069]

According to the present invention, polishing workability by CMP or the like is improved, and defects such as scratches are less likely to occur. Therefore, an interlayer insulating film having excellent flatness and excellent characteristics can be obtained, and further contributes to an improvement in throughput and a reduction in manufacturing cost as a semiconductor device.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a manufacturing process of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view illustrating a manufacturing process of the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a sectional view illustrating a manufacturing process of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a sectional view illustrating a manufacturing process of a semiconductor device according to a third embodiment of the present invention.

FIG. 5 is a sectional view illustrating a manufacturing process of a semiconductor device according to a third embodiment of the present invention.

FIG. 6 is a sectional view illustrating a manufacturing process of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 7 is a sectional view illustrating a manufacturing process of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 8 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 9 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 10 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 11 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 12 is a diagram illustrating an embodiment of the present invention.

FIG. 13 is a characteristic diagram for explaining the embodiment of the present invention.

FIG. 14 is a sectional view illustrating a manufacturing process of a semiconductor device according to a sixth embodiment of the present invention.

FIG. 15 is a sectional view illustrating a manufacturing process of a semiconductor device according to a sixth embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 1 silicon substrate (substrate) 3 metal wiring 4 plasma TEOS oxide film (fourth insulating film) 5 organic SOG film (first insulating film) 6 argon ion (impurity) 7 modified SOG film (first insulating film) Reference Signs List 8 plasma TEOS oxide film (second insulating film) 9 plasma TEOS oxide film (third insulating film) 10 interlayer insulating film 11 photoresist

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-7-99195 (JP, A) JP-A-2-253643 (JP, A) JP-A-2-7451 (JP, A) JP-A 8- 17770 (JP, A) U.S. Pat. No. 5,429,990 (US, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/31-21/3213 H01L 21/768

Claims (15)

(57) [Claims] 1. The method according to claim 1, wherein the impurities are introduced into the film.
It is modified so that the moisture and hydroxyl groups contained are reduced and
The polishing rate in chemical / mechanical polishing is large.
A method of manufacturing a semiconductor device, comprising flattening a surface of a first insulating film made of an organic SOG film after polishing by polishing the surface. 2. A step of forming a first insulating film made of an SOG film on a substrate, a step of forming a second insulating film on the first insulating film, and forming the second insulating film on the substrate. Before or after formation, an impurity is introduced into at least a surface layer of the first insulating film.
Increase the polishing rate in chemical and mechanical polishing
Step and the first and the manufacturing method of a semiconductor device and a step, a planarizing by polishing the second insulating film. A step of forming a first insulating film made of an SOG film on a substrate; a step of forming a second insulating film on the first insulating film; and a step of forming the second insulating film on the substrate. Before or after formation, an impurity is introduced into at least a surface layer of the first insulating film.
To reduce moisture and hydroxyl groups in the film
Together with the polishing rate in chemical and mechanical polishing
A method for manufacturing a semiconductor device, comprising: a step of polishing and a step of planarizing the second insulating film by polishing the second insulating film. 4. The method according to claim 2, wherein the second insulating film is formed of a silicon oxide film formed by a plasma CVD method. 5. A step of forming a first insulating film made of an organic SOG film on a substrate, and introducing an impurity into at least a surface layer of the first insulating film .
Reduces the amount of water and hydroxyl groups contained in the film
And polishing in chemical and mechanical polishing
A method for manufacturing a semiconductor device, comprising: a step of increasing a polishing rate; and a step of planarizing by polishing the first insulating film. 6. A step of forming a first insulating film made of an organic SOG film on a substrate, and introducing an impurity into a surface layer of the first insulating film .
To reduce moisture and hydroxyl groups contained in the film.
And the polishing rate in chemical and mechanical polishing
A method of manufacturing a semiconductor device, comprising: a step of increasing the size; and a step of polishing and planarizing the first insulating film. 7. The method according to claim 1, wherein a photoresist film is formed on a device surface before introducing an impurity into the first insulating film, and the impurity is introduced through the photoresist film. 7. The method for manufacturing a semiconductor device according to claim 6. 8. The method of manufacturing a semiconductor device according to claim 1, wherein a step of forming a third insulating film on a device surface after polishing is performed. 9. The semiconductor device according to claim 1, wherein a fourth insulating film is formed on a device surface before the first insulating film is formed. Method. 10. An organic SOG film as the first insulating film.
4. The method for manufacturing a semiconductor device according to claim 2 , wherein said method is used. 11. A first insulator after the impurity is introduced.
When the contact angle of pure water to the membrane is 30 degrees or less,
The method for manufacturing a semiconductor device according to claim 1, wherein: 12. An inorganic SOG film as the first insulating film.
4. The method for manufacturing a semiconductor device according to claim 2 , wherein said method is used. 13. The method according to claim 1, wherein the polishing is performed by using a chemical / mechanical polishing method. 14. introducing said impurities, such as ion implantation, according to claim 1 to 12 characterized by giving kinetic energy to the impurity is a step of introducing into said first insulating film 13. The method for manufacturing a semiconductor device according to claim 1. 15. The method according to claim 14, wherein the impurities include at least one element selected from the group consisting of argon, boron, nitrogen, and phosphorus.