JP2979558B2 - Method of forming multilayer wiring interlayer insulating film of semiconductor device - Google Patents
Method of forming multilayer wiring interlayer insulating film of semiconductor deviceInfo
- Publication number
- JP2979558B2 JP2979558B2 JP1325107A JP32510789A JP2979558B2 JP 2979558 B2 JP2979558 B2 JP 2979558B2 JP 1325107 A JP1325107 A JP 1325107A JP 32510789 A JP32510789 A JP 32510789A JP 2979558 B2 JP2979558 B2 JP 2979558B2
- Authority
- JP
- Japan
- Prior art keywords
- forming
- formula
- insulating film
- interlayer insulating
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
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- Paints Or Removers (AREA)
- Local Oxidation Of Silicon (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Compositions Of Macromolecular Compounds (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の多層配線層間絶縁膜の形成方法
に関し、特に弗素樹脂膜を層間絶縁膜に用いる半導体装
置の多層配線間絶縁膜の形成方法に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a multilayer wiring interlayer insulating film of a semiconductor device, and more particularly, to a method of forming a multilayer wiring insulating film of a semiconductor device using a fluorine resin film as an interlayer insulating film. About the method.
従来、弗素樹脂膜をこの種の多層配線層間絶縁膜とし
て用いた配線構造としては、例えば、特開昭62−194643
号公報にあるように、PSG膜上にプラズマ気相成長法で
弗素樹脂膜を形成した後に、アルミニウム配線を形成す
ることによって、配線構造体を形成している。Conventionally, a wiring structure using a fluorine resin film as this kind of multilayer wiring interlayer insulating film is disclosed in, for example, Japanese Patent Application Laid-Open No. 62-196443.
As disclosed in Japanese Patent Application Laid-Open Publication No. H11-207, a wiring structure is formed by forming a fluorine resin film on a PSG film by a plasma vapor deposition method and then forming an aluminum wiring.
しかしながら、上述した従来の層間絶縁膜構造は、以
下のような欠点がある。However, the above-described conventional interlayer insulating film structure has the following disadvantages.
すなわち、一般に、弗素樹脂膜は、ガラス膜等の無機
絶縁膜に対する接着強度が小さいために、これらを接着
するには、接着剤を用いる必要がある。したがって、上
述した従来の技術においても、同様に、弗素樹脂膜とPS
G膜との接着強度が小さく、はがれやすいという欠点を
有している。That is, generally, since the fluorine resin film has a low adhesive strength to an inorganic insulating film such as a glass film, it is necessary to use an adhesive in order to bond them. Therefore, also in the above-described conventional technology, the fluorine resin film and the PS
It has the disadvantage that the adhesive strength with the G film is small and it is easily peeled off.
本発明の目的は、ガラス膜等の無機絶縁膜に対する接
着強度が大きく、はがれのない半導体装置の多層配線層
間絶縁膜の形成方法を提供することにある。An object of the present invention is to provide a method for forming a multilayer wiring interlayer insulating film of a semiconductor device which has high adhesion strength to an inorganic insulating film such as a glass film and does not peel off.
本発明の半導体装置の多層配線層間絶縁膜の形成方法
は、下記の式(1)で表わされる芳香族テトラカルボン
酸二無水物と、式(2)で表わされるジアミンと、式
(3)で表わされるアミノシリコン化合物とを混合反応
せしめることによって形成されるポリアミック酸シリコ
ン型中間体を含有してなる溶液を基板上に塗布し、100
〜200℃の温度で熱処理せしめることによってシリコン
含有ポリイミド膜を形成する工程と、続いて、弗素樹脂
膜を形成する工程と、続いて、300〜400℃の温度で熱処
理せしめる工程とを含むことを特徴とする。The method of forming a multilayer wiring interlayer insulating film of a semiconductor device according to the present invention comprises the steps of: forming an aromatic tetracarboxylic dianhydride represented by the following formula (1); a diamine represented by the formula (2); A solution comprising a polyamic acid silicon type intermediate formed by mixing and reacting with the amino silicon compound represented is coated on a substrate,
Forming a silicon-containing polyimide film by heat-treating at a temperature of ~ 200 ° C, subsequently forming a fluororesin film, and subsequently heat-treating at a temperature of 300-400 ° C. Features.
(式(1)〜(3)において、R1は、4価の炭素環式芳
香族基を表わし、R2は、炭素数6〜30個の芳香族基、又
は炭素数6〜30個の炭素環式芳香族基、R3及びR4は、独
立に炭素数1〜6のアルキル基、又はフェニル基であ
り、Kは、1≦K≦3の整数である。) さらに、上記の弗素樹脂膜は、ポリテトラフルオロエ
チレン(化学式CF2 m,m:正の整数)とテトラフルオ
ロエチレン−パーフルオロアルキルビニルエーテル共重
合体(化学式CF2 mCFORn、m,n:正の整数、R:
アルキル基)とテトラフルオロエチレン−ヘキサフルオ
ロプロピレン共重合体(化学式CF2 mCF−CF
3 n、m,n:正の整数)とテトラフルオロエチレン−エ
チレン共重合体(化学式CF2 mCH2 n、m,n:正の
整数)とポリビニリデンフルオライド(化学式CF2−C
H2 m、m:正の整数)とのうちの少くとも1種からなる
弗素化合物の微粒子を純水又はトルエン,メタノール等
の有機溶剤中に分散せしめたディスパージョンをスピン
コート法,ディップ法等により塗布し、熱処理せしめる
ことによって形成されることを特徴とする。 (In the formulas (1) to (3), R 1 represents a tetravalent carbocyclic aromatic group, and R 2 represents an aromatic group having 6 to 30 carbon atoms, or an aromatic group having 6 to 30 carbon atoms. The carbocyclic aromatic group, R 3 and R 4 are each independently an alkyl group having 1 to 6 carbon atoms or a phenyl group, and K is an integer of 1 ≦ K ≦ 3.) The resin film is made of polytetrafluoroethylene (chemical formula CF 2 m , m: a positive integer) and a tetrafluoroethylene-perfluoroalkylvinyl ether copolymer (chemical formula CF 2 m CFOR n , m, n: a positive integer, R:
Alkyl group) and tetrafluoroethylene-hexafluoropropylene copolymer (chemical formula CF 2 m CF-CF
3 n, m, n: positive integer) and tetrafluoroethylene - ethylene copolymer (Formula CF 2 m CH 2 n, m , n: positive integer) and polyvinylidene fluoride (Formula CF 2 -C
H 2 m , m: a positive integer) and a dispersion obtained by dispersing at least one type of fine particles of a fluorine compound in pure water or an organic solvent such as toluene or methanol. And heat-treated.
次に、本発明の実施例について図面を参照して説明す
る。Next, embodiments of the present invention will be described with reference to the drawings.
以下の実施例では、シリコン含有ポリイミド膜形成用
塗布溶液として、ベンゾフェノンテトラカルボン酸二無
水物とジアミノジフェニルエーテルとP−アミノフェニ
ルトリメトキシシランとを混合反応せしめて形成したも
のを用いた。また、溶媒として、ジメチルアセトアミド
を用いた。固形分濃度は10重量%、溶液粘度は5cm−Poi
seである。In the following examples, a coating solution formed by mixing and reacting benzophenonetetracarboxylic dianhydride, diaminodiphenyl ether and P-aminophenyltrimethoxysilane was used as a coating solution for forming a silicon-containing polyimide film. In addition, dimethylacetamide was used as a solvent. Solid content concentration is 10% by weight, solution viscosity is 5cm-Poi
se.
また、弗素樹脂膜は、テトラフルオロエチレン−パー
フルオロアルキルビニルエーテル共重合体の直径約0.1
〜0.5μmの微粒子を純水中に約30重量%の濃度で分散
させたディスパージョンを回転塗布,熱処理せしめて形
成した。The fluororesin film has a diameter of about 0.1 of a tetrafluoroethylene-perfluoroalkylvinyl ether copolymer.
A dispersion in which fine particles of about 0.5 μm were dispersed in pure water at a concentration of about 30% by weight was formed by spin coating and heat treatment.
第1図は本発明の第1の実施例である層間絶縁膜の形
成方法を示すフローチャートである。FIG. 1 is a flowchart showing a method for forming an interlayer insulating film according to a first embodiment of the present invention.
第1の実施例は、まず、P型シリコン基板上に、厚さ
約1μmのアルミニウム膜,シリコン酸化膜,シリコン
窒化膜をそれぞれ形成した基板上に、シリコン含有ポリ
イミド膜形成用塗布溶液を毎分4000回転で30秒間回転塗
布した後,窒素ガス雰囲気のオーブン内で150℃,30分間
熱処理し、厚さ約0.2μmのシリコン含有ポリイミド膜
を形成する。In the first embodiment, first, a coating solution for forming a silicon-containing polyimide film is applied per minute on a substrate in which an aluminum film, a silicon oxide film, and a silicon nitride film having a thickness of about 1 μm are formed on a P-type silicon substrate. After spin coating at 4,000 rpm for 30 seconds, heat treatment is performed at 150 ° C. for 30 minutes in an oven in a nitrogen gas atmosphere to form a silicon-containing polyimide film having a thickness of about 0.2 μm.
続いて、上記のディスパージョンを毎分4000回転で30
秒間回転塗布し、窒素ガス雰囲気のオーブン内で80℃,1
0分間熱処理し水分を除去した後、窒素ガス雰囲気の電
気炉内で380℃,10分間の熱処理を行い、溶融,成膜す
る。Then, apply the above dispersion at 4,000 rpm for 30 minutes.
Spin coating for 80 seconds, 80 ° C, 1 in oven in nitrogen gas atmosphere
After heat treatment for 0 minutes to remove water, heat treatment is performed at 380 ° C. for 10 minutes in an electric furnace in a nitrogen gas atmosphere to melt and form a film.
以上のように形成した弗素樹脂膜の基板との接着性を
ピーリングテストによって調べたところ、すべての基板
について、はがれは全くないものであった。When the adhesion of the fluororesin film formed as described above to the substrate was examined by a peeling test, no peeling was observed for all substrates.
第2の実施例では、シリコン含有ポリイミド膜形成時
の熱処理温度を100,150,200℃の3種類とし、第1の実
施例と同条件で弗素樹脂膜を形成した後、各基板との接
着強度をピーリングテストによって調べた。In the second embodiment, the heat treatment temperature for forming the silicon-containing polyimide film was set to 100, 150, and 200 ° C., and after forming the fluorine resin film under the same conditions as in the first embodiment, the peeling test was performed for the adhesive strength with each substrate. Investigated by.
第2図は本発明の第2の実施例のシリコン含有ポリイ
ミド膜形成時の熱処理温度を変化させたときの弗素樹脂
膜のはがれ頻度を示す特性図である。FIG. 2 is a characteristic diagram showing the peeling frequency of the fluorine resin film when the heat treatment temperature during the formation of the silicon-containing polyimide film according to the second embodiment of the present invention is changed.
第2図に示すように、100〜200℃の熱処理では、はが
れ頻度は0%であった。As shown in FIG. 2, in the heat treatment at 100 to 200 ° C., the peeling frequency was 0%.
以上説明したように本発明は、弗素樹脂膜と、表面に
無機絶縁膜、あるいは、金属配線との間にシリコン含有
ポリイミド膜を介在させることによって、弗素樹脂膜と
無機絶縁膜、あるいは、金属配線との間の接着強度を高
める効果がある。したがって、半導体装置の製造工程に
おける弗素樹脂膜のはがれは全くなく、歩留りが向上す
る効果がある。As described above, the present invention provides a fluorine resin film and an inorganic insulating film or a metal wiring by interposing a silicon-containing polyimide film between the fluorine resin film and the surface of the inorganic insulating film or metal wiring. This has the effect of increasing the adhesive strength between them. Therefore, there is no peeling of the fluorine resin film in the manufacturing process of the semiconductor device, and the yield is improved.
また、弗素樹脂膜の比誘電率が2.0〜2.1と小さいこと
から、半導体装置の信号遅延時間が短縮でき、したがっ
て、信号処理スピードの高速化が可能となるという効果
も併せ持つようになる。Further, since the relative dielectric constant of the fluorine resin film is as small as 2.0 to 2.1, the signal delay time of the semiconductor device can be reduced, and therefore, the effect that the signal processing speed can be increased can be obtained.
第1図は本発明の第1の実施例である層間絶縁膜の形成
方法を示すフローチャート、第2図は本発明の第2の実
施例のシリコン含有ポリイミド膜形成時の熱処理温度を
変化させたときの弗素樹脂膜のはがれ頻度を示す特性図
である。FIG. 1 is a flow chart showing a method of forming an interlayer insulating film according to a first embodiment of the present invention, and FIG. 2 is a graph showing a heat treatment temperature during the formation of a silicon-containing polyimide film according to the second embodiment of the present invention. FIG. 7 is a characteristic diagram showing the frequency of peeling of the fluorine resin film at the time.
Claims (2)
カルボン酸二無水物と式(2)で表わされるジアミンと
式(3)で表わされるアミノシリコン化合物とを混合反
応せしめることによって形成されるポリアミック酸シリ
コン型中間体を含有してなる溶液を基板上に塗布し、10
0〜200℃の温度で熱処理せしめることによってシリコン
含有ポリイミド膜を形成する工程と、続いて、弗素樹脂
膜を形成する工程と、続いて、300〜400℃の温度で熱処
理せしめる工程とを含むことを特徴とする半導体装置の
多層配線層間絶縁膜の形成方法。 (式(1)〜(3)において、R1は、4価の炭素環式芳
香族基を表わし、R2は、炭素数6〜30個の芳香族基、又
は炭素数6〜30個の炭素環式芳香族基、R3及びR4は、独
立に炭素数1〜6のアルキル基、又はフェニル基であ
り、Kは、1≦K≦3の整数である。)A compound formed by reacting an aromatic tetracarboxylic dianhydride represented by the following formula (1) with a diamine represented by the formula (2) and an aminosilicon compound represented by the formula (3). A solution comprising a polyamic acid silicon type intermediate to be applied is applied on a substrate, and 10
Forming a silicon-containing polyimide film by heat-treating at a temperature of 0 to 200 ° C., subsequently forming a fluororesin film, and subsequently performing a heat treatment at a temperature of 300 to 400 ° C. A method for forming a multi-layer wiring interlayer insulating film of a semiconductor device, characterized by comprising: (In the formulas (1) to (3), R 1 represents a tetravalent carbocyclic aromatic group, and R 2 represents an aromatic group having 6 to 30 carbon atoms, or an aromatic group having 6 to 30 carbon atoms. The carbocyclic aromatic group, R 3 and R 4 are each independently an alkyl group having 1 to 6 carbon atoms or a phenyl group, and K is an integer of 1 ≦ K ≦ 3.)
フルオロエチレン(化学式CF2 m,m:正の整数)とテ
トラフルオロエチレン−パーフルオロアルキルビニルエ
ーテル共重合体(化学式CF2 mCFORn、m,n:正
の整数、R:アルキル基)とテトラフルオロエチレン−ヘ
キサフルオロプロピレン共重合体(化学式CF2 mC
F−CF3 n、m,n:正の整数)とテトラフルオロエチレン
−エチレン共重合体(化学式CF2 mCH2 n、m,n:
正の整数)とポリビニリデンフルオライド(化学式CF
2−CH2 m、m:正の整数)とのうちの少くとも1種から
なる弗素化合物の微粒子を純水又はトルエン,メタノー
ル等の有機溶剤中に分散せしめたディスパージョンをス
ピンコート法,ディップ法等により塗布し、熱処理せし
めることによって形成されることを特徴とする半導体装
置の多層配線層間絶縁膜の形成方法。2. The fluororesin film according to claim 1, wherein the polytetrafluoroethylene (chemical formula CF 2 m , m: a positive integer) and a tetrafluoroethylene-perfluoroalkylvinyl ether copolymer (chemical formula CF 2 m CFOR n) , M, n: positive integers, R: alkyl group) and a tetrafluoroethylene-hexafluoropropylene copolymer (chemical formula CF 2 m C
F-CF 3 n, m, n: positive integer) and tetrafluoroethylene - ethylene copolymer (Formula CF 2 m CH 2 n, m , n:
Positive integer) and polyvinylidene fluoride (chemical formula CF
2- CH 2 m , m: a positive integer) and a dispersion obtained by dispersing at least one type of fluorine compound fine particles in pure water or an organic solvent such as toluene or methanol. A method for forming a multi-layer wiring interlayer insulating film of a semiconductor device, wherein the method is formed by applying by a method or the like and performing heat treatment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1325107A JP2979558B2 (en) | 1989-12-14 | 1989-12-14 | Method of forming multilayer wiring interlayer insulating film of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1325107A JP2979558B2 (en) | 1989-12-14 | 1989-12-14 | Method of forming multilayer wiring interlayer insulating film of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH03185726A JPH03185726A (en) | 1991-08-13 |
JP2979558B2 true JP2979558B2 (en) | 1999-11-15 |
Family
ID=18173198
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1325107A Expired - Lifetime JP2979558B2 (en) | 1989-12-14 | 1989-12-14 | Method of forming multilayer wiring interlayer insulating film of semiconductor device |
Country Status (1)
Country | Link |
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JP (1) | JP2979558B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4492471B2 (en) | 2005-07-25 | 2010-06-30 | トヨタ自動車株式会社 | Power steering device. |
KR101644335B1 (en) * | 2014-09-18 | 2016-08-01 | 삼성중공업 주식회사 | Container Storing Apparatus for Offshore Structure |
-
1989
- 1989-12-14 JP JP1325107A patent/JP2979558B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH03185726A (en) | 1991-08-13 |
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