JP2963515B2 - Plasma display panel and driving method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] A plasma display panel that performs matrix display by using three electrodes, a sustaining electrode pair and an address electrode, is capable of improving display brightness by increasing the light emitting area of a phosphor. For this purpose, a pair of substrates facing each other via a discharge space is provided with a pair of discharge sustaining electrodes defining a main discharge cell on one substrate side, and an address electrode defining a selected discharge cell is provided on the other substrate side. In a plasma display panel, a conductive phosphor having a pattern continuous along the address electrodes is provided on the address electrodes.

[Industrial applications]

The present invention relates to a plasma display panel that performs a matrix display by using three electrodes, a sustaining electrode pair and an address electrode.

Plasma display panels (PDPs) are excellent in the visibility of display among flat-type display devices, and their applications to OA equipment are expanding. Accordingly, it is desired to improve the luminance particularly in color display.

[Conventional technology]

2. Description of the Related Art Conventionally, in a dot matrix display type PDP that displays characters and figures by combining dots (pixels) to emit light, a surface discharge type PDP that enables multicolor display by providing a phosphor that emits light by discharge is known. Have been.

FIG. 6 is a plan view of a conventional surface discharge type PDP 2, and FIG. 7 is a sectional view taken along the line VII-VII of FIG.

In these figures, PDP2 is the glass substrate 1 on the display side.
1. A plurality of pairs of sustaining electrodes 12, consisting of a pair of main discharge electrodes 13, 14, extending in the X (horizontal) direction on the inner surface of a glass substrate 11, a dielectric layer 17, a grid-like partition wall 19, and a rear glass substrate 21, a plurality of partition walls 2 extending in the Y (vertical) direction on the inner surface of the glass substrate 21
9, an address electrode 22 provided between the partition walls 29, a phosphor 28j of a predetermined emission color, and the like. In FIG. 7, the upper surface of the glass substrate 11 becomes a display surface 10j.

For example, a mixed gas of neon and xenon is sealed in the internal discharge space 30, and the discharge space 30 has a unit light emitting region EU.
Each is partitioned by partition walls 19 and 29.

Also, as shown in FIG. 7, one phosphor 28j is provided for each unit light emitting region EU so as to expose a part of the address electrode 22 to the discharge space 30.

The main discharge electrodes 13 and 14 are transparent electrodes made of a Nesa film (tin oxide film), and a bus electrode (not shown) is stacked on the back side to reduce the line resistance value. A protective film made of MgO is provided on the surface of the dielectric layer 17 (not shown).

In the PDP 2 configured as described above, at the intersection of the main discharge electrode 13 and the address electrode 22 facing each other via the discharge space 30,
Selective discharge cell W for selection (address) of each phosphor 28j
C is defined, and the selected phosphors 28 are disposed on the opposing portions of the main discharge electrodes 13 and 14 near the selected discharge cell WC.
The main discharge cell SC for emitting light is defined. Thereby, the phosphor 28j corresponding to each unit light emitting region EU can selectively emit light. However, in the PDP 2, in order to perform multi-color display for each pixel (pixel), a single pixel is associated with a predetermined number (for example, three) of unit light-emitting regions EU, that is, phosphors 28j of a plurality of light-emitting colors. The display color of the pixel is determined by the combination of the light emission of the phosphors 28j.

At the time of display, for example, first, a voltage exceeding the discharge start voltage is applied between the main discharge electrode 13 and the main discharge electrode 14 to start line-by-line discharge, and then, for each line, unnecessary display is performed. A discharge erase pulse (pulse of positive polarity) is applied to the address electrode 22 corresponding to the main discharge cell SC to erase the wall charges of the dielectric layer 17 and stop the discharge.

A discharge sustaining voltage lower than the discharge starting voltage is applied to the discharge sustaining electrode pair 12, and the main discharge cells SC corresponding to the display pixels maintain the discharge. As a result, the phosphors 28 corresponding to the main discharge cells SC during the discharge are excited by the ultraviolet rays generated by the discharge to emit light.

[Problems to be solved by the invention]

In the conventional PDP 2, the discharge sustaining electrode pair 12 is provided on one (display surface side) glass substrate 11, and the phosphor 28j and the address electrode 22 are provided on the other (back side). As a result, the phosphor 28j is opposed to the discharge sustaining electrode pair 12 via the discharge space 30, so that the phosphor 28j is discharged by the discharge of the main discharge cell SC.
The ion bombardment of the phosphor 28j is prevented, and the life of the phosphor 28j is extended. Also, as compared with the case where the discharge sustaining electrode pair 12 and the address electrode 22 are provided so as to overlap with one glass substrate 11 or 21,
The structure of P2 is simple, and manufacturing and drive control are easy.

However, since the conventional phosphor 28j is an insulator, when providing the phosphor 28j and the address electrode 22 on the glass substrate 21, as described above, at least the selective discharge cell WC on the surface of the address electrode 22 is provided. Must be exposed to the discharge space 30.

Therefore, the surface area of the phosphor 28j in the unit light emitting region EU,
That is, there is a problem that the light emitting area is reduced by the amount of exposing the address electrode 22, and the display luminance is low.

Further, in the conventional driving method of the PDP 2, after discharging the main discharge cell SC line by line, a positive rectangular pulse voltage is applied to the address electrode 22, and the selected discharge cell WC is discharged to cause the dielectric layer 17 to discharge. Main discharge cells that do not need to be displayed by utilizing the re-discharge (self-erasing discharge) of the selected discharge cells WC that generate excessive wall charges and are generated by the wall charges when the rectangular pulse voltage falls
This is to stop the discharge of SC.

For this reason, in the related art, ion impact is applied to the phosphor 28j and the address electrode 22 during the self-erasing discharge.
There was a problem that 28j was scattered by ion bombardment.

The present invention has been made in view of the above circumstances, and has as its object to improve display brightness by increasing the light emitting area of a phosphor.

Another object of the present invention is to stabilize the display by reducing ion impact on the phosphor.

[Means for solving the problem]

In order to solve the above problems, a PD according to the invention of claim 1
P1, as shown in FIG. 1, a pair of substrates 11 and 12 facing each other via a discharge space 30 is provided with a pair of discharge sustaining electrodes 12 defining a main discharge cell SC on one substrate 11 side, and the other substrate In the plasma display panel 1 provided with an address electrode 22 defining a selective discharge cell WC on the 21 side, conductive phosphors 28R, 28G, 28B of a continuous pattern are provided along the address electrode above the address electrode. It is composed.

As shown in FIGS. 4 and 5, the driving method according to the second aspect of the present invention provides an address voltage for selecting the discharge of the selected discharge cell WC to the address electrode 22 via a current limiting resistor 53. It is configured by applying VA.

(Operation)

On the substrate 21 side, conductive phosphors 28R, 28G, 28B are provided so as to cover the address electrodes 22.

The light-emitting areas of the phosphors 28R, 28G, 28B increase by the amount covering the address electrodes 22, and the display brightness increases.

An address voltage VA is applied to the address electrode 22 via a current limiting resistor 53.

In the selected discharge cell WC, a discharge is generated between the address electrode 22 and the sustain electrode pair 12 via the phosphors 28R, 28G, 28B.

Address electrode by the voltage drop of resistor 53 due to discharge current
Since the voltage applied to 22 decreases and the discharge current is limited, the amount of charges (ions) accumulated on the discharge sustaining electrode pair 12 side is suppressed to a level that does not cause self-erasing discharge.

〔Example〕

 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a plan view of the PDP 1 according to the present invention, FIG. 2 is a sectional view taken along the line II-II of FIG. 1, and FIG. 3 is a sectional view taken along the line III-III of FIG.

In these figures, components having the same functions as those in FIG. 6 are denoted by the same reference numerals, and description thereof will be omitted. Components corresponding to those in FIG. 6 are denoted by reference numerals without the suffix “j”.

In the PDP 1, the phosphors 28R, 28G, 28B having different emission colors from each other so as to fill the space between the rear partition walls 29.
The entire surface of the address electrode 22 is covered with each phosphor 28.
Covered by R, 28G, 28B. As a result, as is well shown in FIG. 1, the phosphors 28R, 28
G, 28B will be present.

In other words, the PDP1 uses the address electrodes in the conventional PDP1.
The light-emitting area of the phosphors 28R, 28G, 28B in the unit light-emitting region EU is increased by an amount corresponding to the exposure of the pixel 22, and the display brightness is high.

Each of the phosphors 28R, 28G, and 28B is made into a conductor by mixing an appropriate amount of In ₂ O ₃ (indium oxide) into a phosphor of a predetermined emission color, thereby increasing the driving voltage particularly in the PDP1. In addition, a display operation can be performed by a driving method similar to the related art.

 Next, a driving method of the PDP 1 will be described.

FIG. 4 is a circuit diagram of the drive output section 50 of the address electrode 22, and FIG. 5 is a view showing an example of a drive voltage waveform of the PDP1.

The drive output unit 50 is provided with an address power supply line (power supply voltage VA
Is about 90 to 100 volts) and a switching transistor 52 connected in series between a ground line (0 volt),
It comprises a current limiting resistor 53, a bias power supply 54 and the like. The address electrode 22 is connected to a connection point p between the resistor 53 and the bias power supply 54. In other words, the bias voltage Vb of the bias power supply 54 is always applied to the address electrode 22, so that the withstand voltage of the transistor 52 is reduced. The transistor 52 is provided with a coupling capacitance from a drive logic circuit (not shown).
A switching operation is performed in accordance with the address signal SA input via 51.

The drive output section 50 is provided for each address electrode 22.

As shown in FIG. 5, a negative sustain voltage pulse SP (pulse width t1) having a peak value Vs is alternately and periodically applied to each of the main discharge electrodes 13 and 14 of the discharge sustain electrode pair 12. Has been applied.

Here, a negative write pulse WP having a peak value Zw (Xw> Vs) is applied to the main discharge electrode 13 instead of the sustain voltage pulse SP, and the address pulse AP is applied to the transistor 52.
To turn on the transistor 52.

When the transistor 52 is turned on, the voltage applied to the address electrode 22 rises from the bias voltage Vb according to the time constant of the address electrode 22. The voltage of the address electrode 22 is a predetermined voltage Va
, The selected discharge cell defined at the intersection of the address electrode 22 and the main discharge electrode 13 to which the address pulse WP is applied.
Discharge occurs in WC, dielectric layer covering main discharge electrode 13
17 generates wall charges.

At this time, in the drive output unit 50, the resistance 53
, The potential of the connection point p is reduced by the voltage drop, and the discharge current is limited.

As a result, the amount of charge stored in the dielectric layer 17 is suppressed to such an extent that self-erase discharge does not occur in the selected discharge cell WC.

Then, when the sustain voltage pulse SP is applied to the other main discharge electrode 14, a discharge occurs in the main discharge cell SC due to the wall charges accumulated on the main discharge electrode 13 side. Main discharge cell SC
Until an erasing pulse is applied to each main discharge electrode 13 thereafter, the discharge occurs every time the sustain voltage pulse SP is applied, and the corresponding phosphors 28R, 28G, 28B
Are excited to emit light.

According to the above-described embodiment, since each of the phosphors 28R, 28G, and 28B is provided in a stripe shape continuous in the Y direction, application by a screen printing method or the like becomes easy.

According to the above-described embodiment, by providing the resistor 53,
Since self-erasing discharge in the selected discharge cell WC is prevented, scattering of the phosphors 28R, 28G, 28B due to ion bombardment is suppressed. In particular, in the PDP 1, the phosphors 28R, 28G, and 28B have conductivity, and when the phosphors 28R, 28G, and 28B are scattered and adhere to the dielectric 17, the wall charges leak and the display operation is not performed. May be stable. Therefore, by suppressing the scattering of the phosphors 28R, 28G, 28B, not only the life of the phosphors 28R, 28G, 28B is extended, but also the display operation becomes stable.

In the above embodiment, the sustaining electrode pairs 12 are provided on the glass substrate 21 on the back side, and the address electrodes 22 and the phosphors 28R, 28G,
28B may be provided on the glass substrate 11 on the display surface side. In that case, it is desirable that the address electrode 22 be a transparent electrode.

In the above-described embodiment, the substance to be mixed for imparting conductivity to the phosphors 28R, 28G, and 28B and the amount of the substance can be appropriately selected according to the size of the selected discharge cell WC. In addition, power supply voltage VA for address and bias voltage V
b, driving conditions such as peak values Vs and Vw can be appropriately changed according to the size, shape, structure, and the like of the PDP 1.

〔The invention's effect〕

According to the present invention, display brightness can be improved by increasing the light emitting area of the phosphor.

According to the second aspect of the present invention, the ion bombardment of the phosphor is reduced, so that the leakage of electric charges caused by the scattering of the conductive phosphor on the sustain electrode is suppressed, and the display is stabilized. Can be.

[Brief description of the drawings]

 1 is a plan view of a PDP according to the present invention, FIG. 2 is a sectional view taken along the line II-II of FIG. 1, FIG. 3 is a sectional view taken along the line III-III of FIG. 1, and FIG. FIG. 5 is a diagram showing an example of a drive voltage waveform of a PDP, FIG. 6 is a plan view of a conventional surface discharge type PDP, FIG. 7 is a VII-VII of FIG. It is arrow sectional drawing. In the figure, 1 is a PDP (plasma display panel), 11 is a glass substrate (one substrate), 12 is a pair of sustaining electrodes, 21 is a glass substrate (the other substrate), 22 is an address electrode, and 28R, 28G, and 28B are Phosphor, 30 is a discharge space, 53 is a resistor SC is a main discharge cell, VA is a power supply voltage (address voltage), and WC is a selected discharge cell.

────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shinoda Den 1015 Kamidadanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (56) References JP-A-2-148645 (JP, A) JP-A-1-304638 (JP, A) JP-A-59-108240 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) H01J 11/00-11/02

Claims (2)

(57) [Claims] A pair of substrates facing each other via a discharge space are provided with a pair of discharge sustaining electrodes defining a main discharge cell on one of the substrates, and an address electrode defining a selective discharge cell on the other substrate. A plasma display panel, comprising: a conductive phosphor having a pattern continuous along the address electrodes provided above the address electrodes. 2. The method for driving a plasma display panel according to claim 1, wherein an address voltage for selecting discharge of the selected discharge cell is applied to the address electrode via a current limiting resistor. A method for driving a plasma display panel, comprising: