JP2959133B2 - Thin film transistor matrix and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor (TFT) matrix used for driving a liquid crystal display panel and a method of manufacturing the same.

A liquid crystal display panel driven by a TFT matrix is
It has already been put to practical use in small TVs, etc., and demand for large TVs and laptop PCs is expected.

In particular, when used for information terminal equipment, even if there is one pixel defect, it may be read as erroneous information. The present invention can be used for the structure and manufacturing method of a TFT matrix that meets this need.

[0004]

2. Description of the Related Art In a liquid crystal display panel using an active matrix drive system, TFTs are arranged in a matrix corresponding to individual pixels for dot display, and each pixel has a memory function to display multi-line display with high contrast. Is going.

In such a liquid crystal display panel, for example, a drive voltage is applied to a large number of scan bus lines (gate bus lines) and data bus lines (drain bus lines) arranged to intersect in the X and Y directions. Then, by selectively driving the TFTs provided at the intersections of the bus lines, the corresponding desired pixels are displayed in dots. 1) FIG. 8 is a circuit diagram of a TFT matrix according to a conventional example of Invention 1.

In the figure, 1 is a TFT, 2 is a pixel electrode, 3
Is a scan bus line, 3G is a gate, and 4 is a data bus line. In this example, one TFT is connected to one pixel electrode, and the gate of this TFT is the scan bus line 3
The drain is connected to the data bus line 4 and the source is connected to the pixel electrode 2, so that a data voltage is written to the pixel electrode 2 through a TFT.

Here, during the patterning of TFTs, data bus lines, pixel electrodes, etc., TF
A disconnection defect may occur in which the connection between T and the data bus line (part A) or the connection between the TFT and the pixel electrode (part B) is not established. In such a case, normal data is not written to the pixel electrode, which causes a pixel defect on the display and lowers the display quality.

FIG. 9 shows an example of a TFT matrix having redundancy so as not to cause a pixel defect even if a disconnection occurs. FIG. 9 is a TFT matrix circuit diagram according to another conventional example of the first invention.

In this example, two TFTs are connected to one pixel electrode.
These TFTs are connected to separate scan bus lines 3 to which the same drive signal is applied. According to such a configuration, even if a disconnection defect occurs in one of the A and B portions of the two TFTs, normal data is written to the pixel by the TFT having no defect. No pixel defects occur.

However, the gate and scan bus line 3
If a disconnection defect occurs in the middle (C part), the gate potential of the TFT that caused the disconnection in the C part is in a floating state, so that the resistance between the source and the drain is about 1 MΩ and the TFT is always on. . 2) FIGS. 10 (A) to 10 (C) are plan views for explaining the manufacturing method of the conventional example of the second invention.

In FIG. 10A, a gate electrode 3A, a gate bus line 3, and a gate terminal 3B for connecting a driver are formed on a glass substrate by patterning the same conductive film.
In FIG. 10 (B), a gate insulating film, a working semiconductor film, a channel protective film, and a contact film are formed by a plasma vapor deposition (P-CVD) method, and a drain electrode 4D, a drain bus line 4, and a The drain terminal 4B for driver connection is formed by patterning the same conductive film.

In FIG. 10C, a pixel electrode 2 is formed of a transparent conductive film.

[0013]

1) In the conventional example having two TFTs per pixel, even if one of the TFTs is normal, erroneous data is written due to the TFT having a disconnection defect in the C portion. Therefore, there is a problem that a pixel defect occurs. 2) In the conventional manufacturing method, the TFT is in a floating state via the gate insulating film during the manufacturing process, and when a voltage such as static electricity is applied between the gate and the drain for some reason during the manufacturing process, the TFT is turned off. There has been a problem of destruction and pixel defects.

The present invention relates to a TF having two TFTs per pixel.
In the T matrix, prevent pixel defects due to disconnection,
It aims at improving the reliability of the display panel.

[0015]

[Means for Solving the Problems] To solve the above problems, 1) A thin film transistor (TFT) (1), a pixel electrode (2), a scan bus line (3), and a data bus line are formed on an insulating substrate.
(4) is integrated and has two TFTs per pixel.
The two TFTs have a drain connected to the data bus line (4), a source connected to the pixel electrode (2), and a gate connected to separate scan bus lines (3) to which the same drive signal is applied. And a thin film transistor matrix in which the gates of the two TFTs are connected to each other, or 2) a scan bus formed of a thin film transistor (TFT) (1), a pixel electrode (2), and a gate electrode film on an insulating substrate. line
(3), data bus line formed of drain electrode film (4)
Forming a residual gate electrode film (3A) and a residual drain electrode film (4A) while leaving an electrode film other than a display portion; and forming the residual gate electrode film (3A) and the residual drain electrode film (4A). Forming a gate terminal (3B) and a drain terminal (4B) for driving driver connection by patterning the remaining gate electrode film (3A) and the residual drain electrode. film
(4A) is achieved by the method of manufacturing a thin film transistor matrix described above.

[0016]

1) Invention 1 FIG. 1 is an explanatory view of the principle of invention 1.

FIG. 1 is a diagram showing a TFT matrix circuit according to the present invention. Similar to the conventional example, 1 is a TFT, 2 is a pixel electrode, 3 is a scan bus line, 3G is a gate, and 3C is a connection between gates of two TFTs. Wiring 4 indicates a data bus line.

In this example, two TFTs are connected to one pixel electrode.
Are connected to different scan bus lines 3 to which the same driving signal is applied, respectively, in the same manner as in the conventional example, but two TFTs connected to one pixel electrode are connected. Are connected to each other.

In the first aspect, since the gates of the two TFTs connected to one pixel are connected, even if the connection between the gate of one of the TFTs and the scan bus line is broken, the problem is solved. The TFT gate does not float and operates normally, causing no pixel defects.

Further, even if a disconnection defect occurs between one of the TFTs and the data bus line or between the TFT and the pixel electrode,
It goes without saying that pixel defects do not occur as in the conventional example. 2) Invention 2 FIGS. 3A to 3C are explanatory diagrams of the principle of invention 2. FIG.

In FIG. 3A, a gate electrode 3G and a gate bus line 3 are formed on a glass substrate by patterning the same conductive film, and the conductive film other than the display portion is left. The remaining solid conductive film is referred to as a residual gate electrode film 3A.

In FIG. 3 (B), plasma vapor phase epitaxy (PC
A gate insulating film, a working semiconductor film, a channel protective film, and a contact film are formed by the VD) method, and a drain electrode 4D and a drain bus line 4 are formed thereon by patterning the same conductive film. Leave the membrane. The remaining solid conductive film is referred to as a residual drain electrode film 4A. Fig. 3 (B)
Then, the pixel electrode 2 is formed of a transparent conductive film.

Next, the remaining gate insulating film 3A and the remaining drain electrode 4A are patterned to form a gate terminal 3B and a drain terminal 4B for connecting a driving driver.

According to a second aspect of the present invention, there is provided a method for connecting a gate and a drain in order to prevent a failure such as static electricity during a manufacturing process.
By making the connection on the solid electrode film outside the display part, the connection is easy and reliable. As a result, short-circuit defects due to TFT destruction due to static electricity during the process are reduced.

[0025]

FIG. 2 is a plan view of a TFT matrix according to an embodiment of the present invention.

In the figure, when patterning a scan bus line 3 connected to the gates of two TFTs, two
Leave the wiring 3C between the TFT gates. The gates of the two TFTs are connected to each other on the side opposite to the side connected to the scan bus line 3 by the wiring 3C. 2) Invention 2 FIGS. 4 to 7 are a plan view and a cross-sectional view illustrating a process for manufacturing a TFT matrix according to an embodiment of the invention 2. FIG.

In FIG. 4A, an 80 nm-thick titanium (Ti) film was formed on a transparent insulating glass substrate as a gate electrode film.
Then, a two-layer film of aluminum (Al) having a thickness of 100 nm is formed and patterned to form a gate electrode 3G and a gate bus line 3.

At this time, the Ti / Al film other than the display portion is left.
The remaining solid Ti / Al film is used as a residual gate electrode film 3A. FIG.
In (B) and (C), a 300-nm-thick silicon nitride (Si ₃ N ₄ ) film 12 as a gate insulating film and a 100-nm-thick n-type amorphous silicon (aS
i) Film 13, a 100 nm thick silicon dioxide (SiO ₂ ) film as a channel protective film, and a 50 nm thick n as a contact film
^{A +} type a-Si film 14 is formed.

A 100 nm thick drain electrode film is formed thereon.
Is deposited and patterned to form a drain electrode 4D and a drain bus line 4. At this time, the film Ti other than the display portion is left. Remaining solid Ti film is replaced with residual drain electrode film 4A
And

Next, the residual gate electrode film 3A and the residual drain electrode film 4A, which are insulated by the gate insulating film, are connected by a laser shot. FIG. 4C shows a cross section of the connection portion.

In the figure, 11 is a glass substrate, 2 is a gate electrode film, 12 is a gate insulating film, 13 is a working semiconductor layer, 14 is a contact layer, and 4 is a drain electrode film. In FIG. 5, a 200 nm-thick ITO (transparent film made of an oxide of indium and tin) film is deposited on a substrate by sputtering and patterned to form a pixel electrode 2.

In FIGS. 6A and 6B, the remaining gate electrode film 3A and the remaining drain electrode film 4A are patterned by ordinary lithography to form a gate terminal 3B and a drain terminal 4B for connecting a driver. I do.

7A and 7B, the display portion and the gate terminal 3B are covered with a resist film 15, and the Ti film, the a-Si film, and the Si ₃ N ₄ film are etched by dry etching. The gate terminal 3B made of an Al film is exposed.

At this time, the Ti / Al film is a Ti film, a-Si film, Si ₃ N
It remains in the shape of a gate terminal due to the selectivity of etching between the _four films. Next, an example of growth and etching conditions will be described. a-Si growth conditions Reactive gas: 20% SiH ₄ / H ₂ , 200 SCCM Gas pressure: 0.3 Torr RF power: 50 W Substrate temperature: 250 ° C. n ⁺ type a-Si growth conditions Reactive gas: 20% SiH ₄ / H ₂ , 150 SCCM 1% PH ₃ / H ₂ , 300 SCCM Gas pressure: 0.3 Torr RF power: 50 W Substrate temperature: 120 ° C. SiO ₂ growth conditions Reactive gas: 20% SiH ₄ / H ₂ , 65 SCCM N ₂ O, 188 SCCM Gas pressure: 0.15 Torr RF power: 50 W Substrate temperature: 260 ° C. Growth condition of Si ₃ N ₄ Reaction gas: 20% SiH ₄ / H ₂ , 50 SCCM NH ₃ , 65 SCCM Gas pressure: 0.20 Torr RF power: 50 W Substrate temperature: 260 ° C a-Si etching conditions (RIE, reactive ion etching) Reactive gas: CF ₄ , 100 SCCM Gas pressure: 40 Pa RF power: 300 W Substrate temperature: room temperature Si ₃ N ₄ etching conditions (CDE, chemical dry etching) reaction gas: CF _4, 270 SCCM gas pressure: 30 Pa RF power: 500 W substrate temperature: etching conditions the reaction gas at room temperature _{Ti: CCl 4, 100 SCCM O} 2, 5 SCCM Scan Pressure: 10 Pa RF power: 500 W Substrate temperature: room temperature

[0035]

As described above, in a TFT matrix having two TFTs per pixel, pixel defects due to disconnection are prevented, the reliability of the display panel is improved, and a high quality display device is obtained.

Further, it is possible to reduce the short-circuit defect between the gate and the drain of the TFT due to static electricity or the like during the manufacturing process.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of invention 1.

FIG. 2 is a plan view of a TFT matrix according to an embodiment of the invention 1;

FIG. 3 is a diagram illustrating the principle of invention 2;

FIG. 4 is a plan view and a cross-sectional view for explaining a method of manufacturing a TFT matrix according to an embodiment of the invention 2 (1).

FIG. 5 is a plan view for explaining a method of manufacturing a TFT matrix according to an embodiment of the second invention (2).

FIG. 6 is a plan view and a cross-sectional view illustrating a method of manufacturing a TFT matrix according to one embodiment of Invention 2 (3).

FIG. 7 is a plan view and a cross-sectional view for explaining a method of manufacturing a TFT matrix according to one embodiment of Invention 2 (4).

FIG. 8 is a circuit diagram of a TFT matrix according to a conventional example of Invention 1;

FIG. 9 is a TFT matrix circuit diagram according to another conventional example of the first invention.

FIG. 10 is a plan view illustrating a manufacturing method of a conventional example of Invention 2.

[Explanation of symbols]

Reference Signs List 1 TFT 2 pixel electrode 3 canvas line (gate electrode film) 3A residual gate electrode film 3B gate terminal 3C connection wiring between two TFT gates 3G gate electrode 4 data bus line (drain electrode film) 4A residual drain electrode film 4B Drain terminal 4D Drain electrode 11 Transparent insulating substrate glass substrate 12 Gate insulating film 13 Working semiconductor layer n-type a-Si layer 14 Contact layer n ⁺ -type a-Si layer 15 Resist film

Continued on the front page (72) Inventor Hideaki Takizawa 1015 Uedanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Co., Ltd. References JP-A-2-281133 (JP, A) JP-A-2-51129 (JP, A) JP-A 64-44419 (JP, A) JP-A 55-530 (JP, A) JP-A 2 JP-A-244126 (JP, A) JP-A-62-66665 (JP, A) JP-A-60-209780 (JP, A) JP-A-61-121080 (JP, A) JP-A-4-261521 (JP, A) JP-A-4-220627 (JP, A) JP-A-4-278914 (JP, A) JP-A-4-278925 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G02F 1/136 500 G02F 1/1345

Claims (3)

(57) [Claims] 1. A thin film transistor (TF) on an insulating substrate.
T), pixel electrodes, scan bus lines, and data bus lines are integrated, and each pixel has two TFTs.
Each of the TFTs has a drain connected to the data bus line, a source connected to the pixel electrode, a gate connected to a separate scan bus line to which the same drive signal is applied, and the gates of the two TFTs connected to each other. A thin film transistor matrix which is connected. 2. A thin film transistor (TF) is formed on an insulating substrate.
T), when forming a scan bus line formed of a pixel electrode and a gate electrode film, and a data bus line formed of a drain electrode film, a residual gate electrode film and a residual drain electrode film except for an electrode film other than a display portion. And forming a gate terminal and a drain terminal for driving driver connection by patterning the residual gate electrode film and the residual drain electrode film. 3. The method of manufacturing a thin film transistor matrix according to claim 2, wherein the residual gate electrode film and the residual drain electrode film are connected.